½睿
Document #:
13-52-12
Title:
QMA7981 Datasheet
Rev:
C
Single-Chip 3-Axis Accelerometer
QMA7981
The QMA7981 is a single chip three-axis accelerometer. This surface-mount, small sized
chip has integrated acceleration transducer with signal conditioning ASIC, sensing tilt, motion,
shock and vibration, targeted for applications such as screen rotation, step counting, sleep quality,
gaming and personal navigation in mobile and wearable smart devices.
The QMA7981 is based on our state-of-the-art, high resolution single crystal silicon MEMS
technology. Along with custom-designed 14-bit ADC ASIC, it offers the advantages of low noise,
high accuracy, low power consumption, and offset trimming. The device supports digital interface
IIC and SPI.
The QMA7981 is in a 2x2x0.95mm3 surface mount 12-pin land grid array (LGA) package.
Abstract
Advanced Information
FEATURES
3-Axis Accelerometer in a 2x2x0.95 mm
3
Land
Grid Array Package (LGA), guaranteed to
operate over a temperature range of -40 °C to
+85 °C.
sensor
BENEFIT
Small size for highly integrated products.
Signals have been digitized and factory
trimmed.
14-Bit ADC with low noise accelerometer
I
2
C Interface with Standard and Fast modes.
Support SPI digital interface
High resolution allows for motion and tilt
sensing
High-Speed
Interfaces
communications.
for
fast
data
Built-In Self-Test
Wide range operation voltage (1.71V To
Enables low-cost functionality test after
assembly in production
3.6V) and low power consumption (2-50uA
low power conversion current)
Automatically maintains sensor’s sensitivity
under wide operation voltage range and
compatible
with
battery
powered
applications
protection
and
RoHS compliant , halogen-free
Built–in motion algorithm
Environmental
applications
wide
Low power and easy applications including
step counting, sleep quality, gaming and
personal navigation
The information contained herein is the exclusive property of QST, and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of QST.
2 / 30
Document #:
½睿
13-52-12
Title:
QMA7981 Datasheet
Rev: C
CONTENTS
CONTENTS....................................................................................................................................................................................... 3
1
INTERNAL SCHEMATIC DIAGRAM ................................................................................................................................... 4
1.1
Internal Schematic Diagram ..................................................................................................................................... 4
2
SPECIFICATIONS AND I/O CHARACTERISTICS .............................................................................................................. 5
2.1
Product Specifications .............................................................................................................................................. 5
2.2
Absolute Maximum Ratings ..................................................................................................................................... 6
2.3
I/O Characteristics .................................................................................................................................................... 6
3
PACKAGE PIN CONFIGURATIONS ..................................................................................................................................... 6
3.1
Package 3-D View .................................................................................................................................................... 6
3.2
Package Outlines ...................................................................................................................................................... 7
4
EXTERNAL CONNECTION ................................................................................................................................................. 10
4.1
I2C Dual Supply Connection.................................................................................................................................. 10
4.2
I2C Single Supply connection ................................................................................................................................ 10
4.3
SPI Dual Supply Connection .................................................................................................................................. 11
4.4
SPI Single Supply connection ................................................................................................................................ 11
5
BASIC DEVICE OPERATION .............................................................................................................................................. 12
5.1
Acceleration sensor................................................................................................................................................. 12
5.2
Power Management ................................................................................................................................................ 12
5.3
Power On/Off Time ................................................................................................................................................ 12
5.4
Communication Bus Interface I
2
C and Its Addresses ............................................................................................. 13
6
MODES OF OPERATION ..................................................................................................................................................... 14
6.1
Modes Transition .................................................................................................................................................... 14
6.2
Description of Modes ............................................................................................................................................. 15
7
Functions and interrupts .......................................................................................................................................................... 15
7.1
STEP_ INT ............................................................................................................................................................. 15
7.2
DRDY_INT ............................................................................................................................................................ 16
7.3
ANY_MOT_INT .................................................................................................................................................... 16
7.4
SIG_MOT_INT ...................................................................................................................................................... 17
7.5
NO_MOT_INT ....................................................................................................................................................... 17
7.6
RAISE_INT ............................................................................................................................................................ 17
7.7
Interrupt configuration ............................................................................................................................................ 18
8
I
2
C COMMUNICATION PROTOCOL .................................................................................................................................. 19
8.1
I
2
C Timings ............................................................................................................................................................ 19
8.2
I
2
C R/W Operation ................................................................................................................................................. 19
9
REGISTERS ........................................................................................................................................................................... 21
9.1
Register Map .......................................................................................................................................................... 21
9.2
Register Definition ................................................................................................................................................. 22
The information contained herein is the exclusive property of QST, and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of QST.
3 / 30
Document #:
½睿
13-52-12
Title:
QMA7981 Datasheet
Rev: C
1 INTERNAL SCHEMATIC DIAGRAM
1.1 Internal Schematic Diagram
Sinc
FS
CVA
Offset
MUX
G-SENSOR
SDM
INT1
INT2
AD0
IF
Gain
Interrupt
SDA
VPMXYZ
BG
OSC
Trim
Reg File
SCL
OTP
GND
SENB
RESV1
POWER(A+D)
POR
Mode
FSM
SelfTest
RESV2
VDDIO
GND
VDD
Figure 1.
Table 1.
Block Diagram
Block Function
Function
3-axis acceleration sensor
Charge-to-Voltage amplifier for sensor signals
Digital interrupt engine, to generate interrupt signal on data conversion, and
motion function
Finite state machine, to control device in different mode
Interface logic data I/O
Internal oscillator for internal operation
Power block, including LDO
Block
Transducer
CVA
Interrupt
FSM
I
2
C/SPI
OSC
Power
The information contained herein is the exclusive property of QST, and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of QST.
4 / 30
Document #:
½睿
13-52-12
Title:
QMA7981 Datasheet
Rev: C
2 SPECIFICATIONS AND I/O CHARACTERISTICS
2.1
Product Specifications
Specifications (* Tested and specified at 25°C and 3.0V VDD except stated otherwise.)
Conditions
VDD, for internal blocks
VDDIO, for IO only
VDD and VDDIO on
ODR=268 Hz
ODR=134 Hz
ODR=67 Hz
ODR=33.6 Hz
ODR=13.4 Hz
ODR=6.7 Hz
ODR=32.5 Hz
ODR=21.6 Hz
ODR=13 Hz
ODR=6.5 Hz
Programmable bandwidth
2*BW
From the time when VDD reaches to
90% of final value to the time when
device is ready for conversion
From the time device enters into
active mode to the time device is
ready for conversion
-40
±2/±4/±8/
±16/±32
4096
2048
1024
512
256
±0.02
±4
±80
±2
200
±0.5
1
Min
1.71
1.71
Typ
3.3
3.3
1
50
25.3
12.9
6.7
2.9
1.7
100
83.3
50
25
0.16~168
0.32~336
2
Max
3.6
VDD
Unit
V
V
μA
Table 2.
Parameter
Supply voltage VDD
I/O voltage VDDIO
Standby current
Low power current
μA
Low noise current
μA
BW
Data output rate
(ODR)
Startup time
Hz
Samples
/sec
ms
Wakeup time
Operating
temperature
Acceleration Full
Range
Sensitivity
1
85
ms
℃
g
FS=±2g
FS=±4g
FS=±8g
FS=±16g
FS=±32g
FS=±2g, Normal VDD Supplies
Gain accuracy
FS=±2g, Normal VDD Supplies
FS=±2g, Normal VDD Supplies
FS=±2g, run state
FS=±2g, Best fit straight line,
LSB/g
Sensitivity
Temperature Drift
Sensitivity tolerance
Zero-g offset
Zero-g offset
Temperature Drift
Noise density
Nonlinearity
Cross Axis Sensitivity
%/℃
%
mg
mg/℃
μg/√Hz
%FS
%
The information contained herein is the exclusive property of QST, and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of QST.
5 / 30
Document #:
½睿
2.2
Absolute Maximum Ratings
13-52-12
Title:
QMA7981 Datasheet
Rev: C
Table 3.
Absolute Maximum Ratings (Tested at 25°C except stated otherwise.)
Condition
Min
-0.3
-0.3
Max
5.4
5.4
2
10000
150
Units
V
V
kV
g
℃
Parameters
VDD
VDDIO
ESD
Shock Immunity
Storage temperature
HBM
Duration < 200
μ
S
-50
2.3 I/O Characteristics
Table 4.
I/O Characteristics
Symbol
V
IH
1
V
IL
1
V
OH
V
OL
Pin
SDA, SCL
SDA, SCL
INT1, INT2
INT1, INT2,
SDA
Output Current
≥-100μA
Output Current
≤100μA(INT)
Output Current
≤1mA
(SDA)
Condition
Min.
0.7*VDDI
O
-0.3
0.8*VDDI
O
0.2*VDDI
O
TYP.
Max.
VDDIO+0
.3
0.3*VDDI
O
Unit
V
V
V
V
Parameter
Voltage Input
High Level 1
Voltage Input
Low Level 1
Voltage Output
High Level
Voltage Output
Low Level
3
PACKAGE PIN CONFIGURATIONS
3.1 Package 3-D View
Arrow indicates direction of g field that generates a positive output reading in normal measurement configuration.
12
1
2
3
4
AD0
SCX
x
11
RES
V2
SEN
B
GND
GND
IO
VDD
10
Z
QMA7981
Top View
SDX
VDD
IO
RES
V1
y
9
8
7
X
QMA7981
INT
1
INT
2
Y
5
Figure 2.
Package View
6
The information contained herein is the exclusive property of QST, and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of QST.
6 / 30
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