PESDHC3D12VU
ESD Protector
Description
The PESDHC3D12VU ESD protector is designed to replace multilayer varistors (MLVs) in
portable applications such as cell phones, notebook computers, and PDA’s. They feature
large cross-sectional area junctions for conducting high transient currents, offer desirable
electrical characteristics for board level protection, such as fast response time, lower
operating voltage, lower clamping voltage and no device degradation when compared to
MLVs. The PESDHC3D12VU protects sensitive semiconductor components from damage
or upset due to electrostatic discharge (ESD) and other voltage induced transient events.
The PESDHC3D12VU is available in a SOD-323 package with working voltages of 12 volt.
It gives designer the flexibility to protect one unidirectional line in applications where arrays
are not practical. Additionally, it may be
“
sprinkled” around the board in applications
where board space is at a premium. It may be used to meet the ESD immunity
requirements of IEC 61000-4-2, (±30kV air, ±30kV contact discharge)
Feature
500W peak pulse power per line (t
P
= 8/20μs)
SOD-323 package
Replacement for MLV(0805)
Unidirectional configurations
Response Time is Typically < 1 ns
Protect one I/O or power line
Low clamping voltage
RoHS compliant
±30KV(contact); IEC 61000-4-4 (EFT) 40A (5/50ns)
Applications
Cell phone handsets and accessories
Personal digital assistants (PDA’s)
Notebooks, desktops, and servers
Portable instrumentation
Cordless phones
Digital cameras
Peripherals
MP3 players
Transient protection for data lines to IEC 61000-4-2(ESD) ±30KV(air),
Mechanical Characteristics
Lead finish:100% matte Sn(Tin)
Mounting position: Any
Qualified max reflow temperature:260℃
Pure tin plating: 7 ~ 17 um
Pin flatness:≤3mil
Rev.06.5
1
www.prisemi.com
ESD Protector
Electronics Parameter
Symbol
V
RWM
I
R
V
BR
I
T
I
PP
V
C
P
PP
C
J
I
F
V
F
PESDHC3D12VU
Parameter
Peak Reverse Working Voltage
Reverse Leakage Current @ V
RWM
Breakdown Voltage @ I
T
Test Current
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
PP
Peak Pulse Power
Junction Capacitance
Forward Current
Forward Voltage @ I
F
V
C
V
BR
V
RWM
I
F
I
V
I
R
V
F
I
T
I
PP
Electrical characteristics per line@25℃( unless otherwise specified)
Parameter
Working Voltage
Breakdown Voltage
Reverse Leakage Current
Forward Voltage
Clamping Voltage
Clamping Voltage
Junction Capacitance
Symbol
V
RWM
V
BR
I
R
V
F
V
C
V
C
C
j
Conditions
Min.
Typ.
Max.
12
Units
V
V
I
t
=1mA
V
RWM
=12V
I
F
=10mA
I
PP
=5A
I
PP
=20A
V
R
=2.5V
t
P
= 8/20μS
t
P
= 8/20μS
f = 1MHz
13.5
1
0.8
19.0
27.0
100
μA
V
V
V
pF
Absolute maximum rating@25℃
Rating
Unidirectional Peak Pulse Power (t
p
=8/20μS)
Maximum Peak Pulse Current ( t
P
= 8/20μS )
Lead Soldering Temperature
Operating Temperature
Storage Temperature
Symbol
P
pp
I
pp
T
L
T
J
T
STG
Value
500
20
260 (10 sec)
-55 to +125
-55 to +150
Units
W
A
℃
℃
℃
Rev.06.5
2
www.prisemi.com
ESD Protector
Solder Reflow Recommendation
Peak Temp=257℃, Ramp Rate=0.802deg.
℃/sec
280
PESDHC3D12VU
240
200
160
120
80
40
0
0
30
60
90
120
150
180
210
240
270
300
330
360
390
420
450
480
Time (sec)
PCB Design
For TVS diodes a low-ohmic and low-inductive path to chassis earth is absolutely mandatory in order to achieve good ESD
protection. Novices in the area of ESD protection should take following suggestions to heart:
Do not use stubs, but place the cathode of the TVS diode directly on the signal trace.
Do not make false economies and save copper for the ground connection.
Place via holes to ground as close as possible to the anode of the TVS diode.
Use as many via holes as possible for the ground connection.
Keep the length of via holes in mind! The longer the more inductance they will have.
Rev.06.5
4
www.prisemi.com
FPGA/CPLD
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