GENERAL DESCRIPTION
24-bit I
2
S Audio DAC with 2 Vrms Output
FEATURES
•
•
•
•
•
•
ES7154
The ES7154 is a low cost 14-pin stereo
digital to analog converter. The ES7154 can
accept I²S serial audio data format up to 24-
bit word length. The device uses advanced
multi-bit ∆-∑ modulation technique to
convert data into two channel analog
outputs. The multi-bit ∆-∑ modulator makes
the device with very low sensitivity to clock
jitter and very low out of band noise.
The devices integrates a charge pump to
generate negative supply from 5V supply,
thus providing ground centered 2 Vrms
analog output.
102 dB SNR
-85 dB THD+N
Up to 100 kHz sampling frequency
I
2
S audio data format, 16-24 bits
Single power supply 4V to 5.25V
Support non standard audio clocks
like 25 MHz or 26 MHz
APPLICATIONS
•
•
•
•
OTT
STB
Digital TV
DVD player
ORDERING INFORMATION
ES7154 -40°C ~ +85°C
SOIC-14
1
Everest Semiconductor
Confidential
ES7154
1.
2.
3.
4.
5.
6.
7.
BLOCK DIAGRAM ................................................................................................................... 3
PIN OUT AND DESCRIPTION ................................................................................................ 3
TYPICAL APPLICATION CIRCUIT.......................................................................................... 4
CLOCK MODES AND SAMPLING FREQUENCIES ............................................................... 4
DIGITAL AUDIO INTERFACE.................................................................................................. 4
POWER UP AND DOWN ........................................................................................................ 5
ELECTRICAL CHARACTERISTICS ....................................................................................... 5
ABSOLUTE MAXIMUM RATINGS.................................................................................................. 5
RECOMMENDED OPERATING CONDITIONS ................................................................................ 5
DAC ANALOG AND FILTER CHARACTERISTICS AND SPECIFICATIONS .......................................... 5
POWER CONSUMPTION CHARACTERISTICS ................................................................................ 6
SERIAL AUDIO PORT SWITCHING SPECIFICATIONS ..................................................................... 6
8.
9.
PACKAGE ................................................................................................................................ 7
CORPORATE INFORMATION ................................................................................................ 8
Revision 4.0
2
September 2018
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
Everest Semiconductor
Confidential
ES7154
1. BLOCK DIAGRAM
SDATA
LRCK
SCLK
Audio
Data
Stereo
DAC
Ground Centered
Line Driver
LOUT
ROUT
Clock Mgr
Charge
Pump
Analog Reference
Power Supply
2. PIN OUT AND DESCRIPTION
CLKIN
PVDD
SDATA
CLKIN
LRCK
SCLK
DGND
VREF
CPP
CPN
CPVSSP
1
2
3
4
5
6
7
VREF
PVDD
DGND
VDD
AGND
ES7154
14
13
12
11
10
9
8
CPVSSP
CPN
CPP
VDD
AGND
ROUT
LOUT
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NAME
PVDD
SDATA
CLKIN
LRCK
SCLK
DGND
VREF
LOUT
ROUT
AGND
VDD
CPP
CPN
CPVSSP
I/O
Supply
I
I
I
I
Supply
O
O
Supply
Supply
DESCRIPTION
Digital IO supply
Audio data
Master clock
Audio data left and right clock
Audio data bit clock
Digital ground
Decoupling capacitor
Left analog output
Right analog output
Analog ground
Power supply
Charge pump capacitor top
Charge pump capacitor bottom
Charge pump filtering
Revision 4.0
3
September 2018
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
Everest Semiconductor
Confidential
ES7154
3. TYPICAL APPLICATION CIRCUIT
GND(SYS)
0R
In the layout, chip is treated as an analog device
ES7154
AGND
*
1uF
3R3
V
DD(+5V)
11
VDD
AGND
V
REF
7
*
1uF
AGND
LOUT
ROUT
470R
470R
CPU/DSP
PV
DD
3
5
4
2
1
CLKIN
SCLK
LRCK
SDATA
PV
DD
DGND
AGND
LOUT
8
9
13
ES7154
ROUT
CPN
*
100nF
AGND
*
1uF 2200pF
*
1uF
2200pF
AGND
AGND
6
10
AGND
CPP
CPVSSP
12
14
For the best performance,decoupling and filtering capacitors should be located as close to the device package as possible
Additional parallel capacitors(typically 0.1 μF) can be used, larger value capacitors(typically 10 μF) would also help
*
Note: for pin 14 capacitor, please use 1 uF if CLKIN frequency is higher than 15 MHz.
4. CLOCK MODES AND SAMPLING FREQUENCIES
According to the sampling rate, the device can work in two speed modes, single speed and
double speed. Table 1 lists the typical clock modes supported by the device.
Table 1 Speed Mode and CLKIN/LRCK Ratio
MODE
Single Speed
Double Speed
Sampling Rate
8kHz – 50kHz
84kHz – 100kHz
CLKIN/LRCK Ratio
32, 64, 128, 192, 256, 384, 512, 768, 1024
128, 192, 256, 384, 512, 768, 1024
5. DIGITAL AUDIO INTERFACE
The ES7154 can accept I²S serial audio input data from 16-bit to 24-bit. The device can detect
the data word length automatically. The relationship of SDATA, SCLK and LRCK for the format is
illustrated through Figures 2.
1 SCLK
SDATA
1
MSB
SCLK
LEFT CHANNEL
2
3
n-2 n-1
n
LSB
1 SCLK
1
MSB
2
3
n-2 n-1
n
LSB
LRCK
RIGHT CHANNEL
Figure 2 I
2
S Serial Audio Data Format Up To 24-bit
Revision 4.0
4
September 2018
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
Everest Semiconductor
Confidential
ES7154
6. POWER UP AND DOWN
Upon applying VDD, the device will reset itself and enter power down state. During this state,
the device clamps outputs to ground and power down the operation except for clock
management unit. Once proper CLKIN and LRCK clocks are applied, the device will leave power
down state and enter the normal operation.
Power down can be achieved by removal of VDD, or by first stopping LRCK and then stopping
CLKIN.
7. ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Continuous operation at or beyond these conditions may permanently damage the device.
PARAMETER
Supply Voltage Level
Input Voltage Range
Operating Temperature Range
Storage Temperature
RECOMMENDED OPERATING CONDITIONS
PARAMETER
VDD
PVDD
MIN
4
1.6
TYP
5
1.8
MAX
5.25
5.25
UNIT
V
V
MIN
-0.3V
DGND-0.3V
-40°C
-65°C
MAX
+5.5V
PVDD+0.3V
+85°C
+150°C
DAC ANALOG AND FILTER CHARACTERISTICS AND SPECIFICATIONS
Test conditions are as the following unless otherwise specify: VDD=5V, PVDD=1.8V, AGND=0V,
DGND=0V, ambient temperature=25°C, Fs=48 KHz, MCLK/LRCK=256.
PARAMETER
DAC Performance
Signal to Noise ratio (A-weigh)
THD+N
Channel Separation (1KHz)
Interchannel Gain Mismatch
Filter Frequency Response – Single Speed
Passband
Stopband
Passband Ripple
Stopband Attenuation
Filter Frequency Response – Double Speed
Passband
Stopband
Passband Ripple
Revision 4.0
MIN
95
-88
80
TYP
102
-85
85
0.05
MAX
105
-80
90
UNIT
dB
dB
dB
dB
Fs
Fs
dB
dB
Fs
Fs
dB
0
0.5465
40
0
0.5833
0.4535
±0.05
0.4167
±0.005
5
September 2018
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
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