CPC405X 应用设计指南
Subject:
Model Name:
应用文档
CPC405X
应用设计指南
AN40-005
V1.2 20180129
CPC405X
应用设计指南
1
CPC405X
概述
CPC405X
是一款专为½功耗系统设计的单节锂电池充电管理芯片,根据型号不同,分别带有
1~2
路脉冲控制可调输出电压的½功耗
LDO
和一路固定输出
LDO,待机时功耗½至 2uA。
芯片拥有
1
路固定输出
3.3V,其它 LDO
输出可通过脉冲控制,输出从
0.9V
到
3.3V。
锂电池线性充电电流可以通过外部电阻实现
40mA~600mA
调节。
CPC405X
型号如下表:
Device
CPC4050
CPC4051
CPC4052
CPC4053
Enable Signal
None
EN1
ENLP,EN1
ENLP,EN1,EN2
LDOs
1
2
2
3
1.1
CPC405X
封装引脚图
图
1
CPC4050 TSOT23-6L Pin Assignment(Top View)
图
2 CPC4051 DFN 1.5*1.5 8L Pin Assignment(Top View)
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CPC405X 应用设计指南
图
3 CPC4052 DFN2*2 8L Pin Assignment(Top View)
12 ISET
11 GND
10
9
LDO_LP 1
2
STA
ENLP
VBUS
8
BAT
LDO2
3
4
5
6
7
LDO1
EN2
图
4 CPC4053 QFN 2*2 12L Pin Assignment(Top View)
1.2
引脚定义
CPC4050
Name
ISET
GND
LDO_LP
BAT
VBUS
STA
I/O
I
G
O
P
P
O
Description
Charge Current Program
Ground
3.3V output
Li-ion battery
Power
Open-Drain Charge Status Output, pull down when charging
版权所有©2017 启攀微电子(上海)有限公司
EN1
NC
第 2 页 共 7 页
CPC405X 应用设计指南
CPC4051
Name
ISET
EN1
GND
LDO_LP
LDO1
BAT
VBUS
STA
I/O
I
I
G
O
O
P
P
O
Description
Charge Current Program
Configuration pin of LDO1
Ground
3.3V output
0.9~3.3V output
Li-ion battery
Power
Open-Drain Charge Status Output, pull down when charging
CPC4052
Name
ISET
ENLP
EN1
GND
LDO_LP
LDO1
BAT
VBUS
STA
I/O
I
I
I
G
O
O
P
P
O
Description
Charge Current Program
Enable pin of LDO_LP
Configuration pin of LDO1
Ground
3.3V output
0.9~3.3V output
Li-ion battery
Power
Open-Drain Charge Status Output, pull down when charging
CPC4053
Name
ISET
ENLP
EN1
I/O
I
I
I
Description
Charge Current Program
Enable pin of LDO_LP
Configuration pin of LDO1
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CPC405X 应用设计指南
EN2
GND
LDO_LP
LDO1
LDO2
BAT
VBUS
STA
I
G
O
O
O
P
P
O
Configuration pin of LDO2
Ground
3.3V output
0.9~3.3V output
0.9~3.3V output
Li-ion battery
Power
Open-Drain Charge Status Output, pull down when charging
2
2.1
CPC405X
参考设计
CPC405X
评估板原理图
VBUS
6
8
1
2
3
4
5
VBUS
D1
SD05C
7
2
VBAT
VBAT
C3
10uF
3
BAT
VBUS
4
C4
1uF
VBUS
C5
0.1uF
GND
LDO_LP
5
LDO_LP
C1
10uF
LDO_LP
C2
0.1uF
microUSB_B
9
R2
1
C6
10uF
C32
1uF
10K
R1
STA
STA
1
CPC4050_TSOT23
USB1
U1
STA
ISET
6
ISET
ISET
VBUS
D-
D+
ID
GND
R3
1K
R4
1K
2
LED1
2
LED2
1
1
VBUS
CPC4050_TSOT23
STA
CPC4051_DFN8_1.5x1.5
VBUS
LDO_LP
LDO_LP
LDO_LP
VBAT
VBAT
VBAT
VBUS
CPC4051_DFN8_1.5x1.5
U2
ISET
LDO_LP
VBUS
EN1
STA
GND
VBAT
LDO1
R5
10K
8
7
6
C11
5
10uF
LDO1
C13
10uF
C14
0.1uF
LDO1
STA
STA
VBUS
VBUS
STA
STA
ISET
LDO_LP
C7
0.1uF
C8
10uF
VBUS
C9
0.1uF
C10
1uF
EN1
ISET
LDO_LP
VBUS
EN1
1
2
3
4
GND
J1
GND
GND
J2
GND
VBAT
GND
GND
J4
GND
GND
J3
GND
J5
GND
Chiphomer Technology
www.chiphomer.com
Approv al:
Document Number:
CPC4050/51/52/53
Date:
Title:
CPC405x EVA KIT
Sheet
1
of
Design:
Size:
B
Rev :
V1.0
3
FANG YUE
Monday , Nov ember 20, 2017
版权所有©2017 启攀微电子(上海)有限公司
第 4 页 共 7 页
CPC405X 应用设计指南
ISET Selection
VBUS
R8
10K
STA
EN_LP
8
7
6
5
LDO1
C21
0.1uF
C22
10uF
STA
EN_LP
VBAT
C19
10uF
LDO1
STA
R10
EN_LP
R11
VBAT
25K
1
JP4
2
12.5K
1
JP3
2
R7
R9
3K
6K
1
1
JP1
JP2
2
2
ISET
CPC4052_DFN8_2x2
CPC4052_DFN8_2x2
ISET
LDO_LP
C15
0.1uF
C16
10uF
VBUS
C17
0.1uF
C18
1uF
EN1
4
VBUS
3
1
2
U3
ISET
LDO_LP
ISET
ISET
LDO_LP
GND
VBUS
EN1
GND
VBAT
LDO1
ILIM(A)=850/RSET(Ω)
9
VBAT
VBUS
EN_LP
1
2
EN_LP
3
sip3
EN1
CPC4053_QFN12
R14
10K
ISET
ISET
STA
11
10
STA
EN_LP
EN1
EN1
1
2
R15
10K
VBAT
12
EN2
EN2
9
8
7
EN_LP
VBAT
LDO1
C30
10uF
VBAT
C27
LDO1
10uF
LDO2
LDO2
EN2
1
2
ISET
GND
STA
R16
10K
VBAT
LDO_LP
LDO_LP
C23
0.1uF
C24
10uF
VBUS
C25
0.1uF
C26
1uF
LDO2
C28
0.1uF
LDO2
C29
10uF
VBUS
1
2
3
LDO_LP
VBUS
LDO2
EN2
EN_LP
VBAT
LDO1
EN1
NC
CPC4053_QFN12
U4
C31
0.1uF
4
5
EN2
6
EN1
Chiphomer Technology
www.chiphomer.com
Design:
Fang Y ue
Document Number:
CPC4050 /51 /52 /53
Date:
Title:
CPC405x EVA KIT
Sheet
2
of
Approv al:
Size:
B
Rev :
V1.0
3
Tuesday , January 23, 2018
CP2688 1 Wire-Pulse
JP6
1
2
3
4
I2C
R22
4.7K
VBAT
R23
4.7K
VBAT
C33
0.1uF
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
GPIO15
GPIO14
GPIO13
SDA
SCL
AVCC
S0
S1
VBAT
SCL
SDA
VBAT
R19
1K
R6
1K
LED3
LED4
W
W
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
MODE
DGND
AGND
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
S2
S3
U5
S4
S5
CP2688-QFN32
S6
S7
CS
DVCC
24
23
22
21
20
19
18
17
C34
1uF
C35
10nF
R21
10K
4
1
EN_SEL
VBAT
1
2
3
C12
0.1uF
sip3
EN_SEL=1
EN_SEL=0
EN_SEL
R24
10K
9
10
11
12
13
14
15
16
EN2
EN1
EN2
EN1
EN1触发,EN2保持
EN2触发,EN1保持
3
SW1
2
Chiphomer Technology
www.chiphomer.com
Design:
Fang Y ue
Title:
Document Number:
CPC4050 /51 /52 /53
CPC405x EVA KIT
Date:
Monday , Nov ember 20, 2017
Sheet
3
of
Approv al:
Size:
B
Rev :
V1.0
3
版权所有©2017 启攀微电子(上海)有限公司
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