Applications Note: SY5868
Dimming Interface Converter
Compatible With 0/1~10V Dimming
Resistor Dimming And PWM Dimming
Adaptive LED Current Filter
General Description
SY5868 integrate a dimming interface converter whose
input signal can be a 0/1~10V dimming signal, resistor,
or PWM signal. It recognizes the signal automatically.
The final output of SY5868 is a PWM signal which is
used to control a dimmable CC regulator or drive an
opto-coupler to achieve isolated dimming. The
frequency of output PWM signal and the source current
to drive passive 0~10V dimmer/Resistor can be set by
external capacitor and resistor.
SY5868 integrates an LED current remover to
eliminate low frequency current ripple, which is
compatible with dimming. It adopts adaptive control
scheme and no additional electrical design is needed.
Features
•
Compatible with 0/1~10V Dimming, Resistor
Dimming and PWM Dimming.
•
Recognize Different Dimming Signal
Automatically.
•
Integrate a 60V LDO Module to Simplify External
Circuit.
•
The Source Current for Passive 0~10V Dimmer
Can Be Set.
•
The Frequency of Output Can Be Set.
•
Current Filter for Single Stage LED Driver to
Eliminate Current Remover
•
Current Remover Suitable for Dimming
Application.
•
External MOS for Different Output Specification.
•
Compact Package: SO14
Ordering Information
SY5868
□(□□)□
Temperature Code
Package Code
Optional Spec Code
Ordering Number
SY5868FKC
Package type
SO14
Note
----
Applications
•
LED Lighting
Typical Applications
D1
L2
F1 1.5mH
AC
source
R1
1M
R2
1M
C1
100nF/X2
C
2
220nF/450V
R3
250K
R4
250K
C3 4.7nF/630V
R5 1
100K
3
D2
1N4007
C11
100nF/16V
T1
D8 MUR460
11
C10
6 470μF/50V
R16
51k
R18
0.05
Q1
R17
10k
Q2
LED-
LED+
Transition curve
C13
2.2uF
R21
100K
R22
100
80
LED+
D3
R6 10 Bav21 Q3
4
6
R7
C4
D4
12V
U2
VDD
D5
Bav21
C5
2.2uF
VDD
R10
20K
D7 3.3V
C8
220nF
D6 BAV21 R11 10
Q2
4N60C
D10
1N4148
C15
1nF
R19
20K
R24
510k
NC
DRV
VSEN
VIN
HLCLP
DIMO
DIMI
SY5868
C17
100pF
NC
ADJ
NC
GND
ISET
VLOW
FSET
C16
6.8nF
R27
200
R20
10K
D9 4.7
C12
1uF
VIN
R23
120K
R25
9.1K
R26
6.8K
C14
1nF
1K
VIN
200K 2.2uF
100%-DIMO(%)
60
COMP PWM/CLK
R8
C7
100pF
1k
C6
1uF
40
ZCS
ISEN
R9
11K
ADIM
VIN
DRV
For 0/1~10V or
PWM or Resistor
GND
20
R13
R12 100 10K
R14
1
R15
C9 1nF/Y1
1
0 VLOWI
DIMI(V)
9.5 10
Fig.1 High clamp mode application Schematic
AN_SY5868 Rev.0.9
© 2018 Silergy Corp.
Silergy Corp. Confidential- Prepared for Customer Use Only
1
All Rights Reserved.
AN_
_SY586
68
Pinou
(
top view
ut
w)
NC
C
ADJ
J
NC
C
GND
D
ISET
T
VLOW
W
FSET
T
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
DRV
VSEN
VIN
HLCLP
DIMO
DIMI
(SO14
4)
Top Mark:
BPUxyz
,
(Device
cod BPU;
x=ye code, y=w code, z= l number co
z
de:
ear
week
lot
ode)
Pin Name
NC
ADJ
NC
GND
Pin numbe
er
1
2
3
4
Pin Desc
cription
No conne
ect.
Average Voltage of Dra setting pin.
ain
This pin r
receives ripple info to regulate the output.
e
No conne
ect.
Ground p
pin.
ISET
5
Source c
current setting pin.
g
V
ISET
is a 1.5V voltage source.
This pin is used to set the source cu
n
t
urrent of DIM pin for passi
MI
ive
dimmer or resistor.
I
DIMI
=
5×1.5
R
ISET
VLOW
6
The lowe input setting pin.
est
g
This pin is used to set th lowest input voltage which c
he
corresponds to 0%
duty.
The real m
minimum 0~10 input is
0V
V
L
=
1.55⋅
V
LOW
−
0.72
26
LOWI
Dimming frequency sett
g
ting pin.
This pin is used to set th frequency of DIMO pin.
he
f
FSET
7
f
D
=
DIM
30u
(6.6
−
V
LOW
)
⋅C
FSE
ET
DIMI
8
DIMO
9
Dimming input pin.
g
Dimming signal is conn
g
nected to this pin It maybe is a 0/1~10 analog signal,
n.
g
resistor o a PWM signa
or
al.
Dimming output pin.
g
This pin w output a PW signal to d
will
WM
driver opto-coup for separati
pler
ion
dimming
g.
High clam and low clamp setting pin.
mp
If the vol
ltage of HLCLP pin is larger th 100mV dur
P
han
ring IC start-up, it
enters int low clamp m
to
mode, else it wor in high clam mode.
rks
mp
In low clamp mode, if V
DIMI
is less than the setting value, it is clampe
n
ed
internally
y.
V
HLCLP
10
LCLP
P
=
9.3
2
⋅
(V
HL
LCLP
−
0.2)
+
0.2
In High c
clamp mode, the clamp voltage is 9.5V fixedl and the resis
e
ly,
stor
connected to HLCLP is used to adjust t max duty.
the
D
MAX
=
mple
For Exam
R
H
=510k ohm
HCLP
.79
67.
⋅
R
HCLP
67.43⋅
R
HCLP
+
770.59
9
AN_SY
Y5868 Rev.0
0.9
© 2018 S
Silergy Corp.
.
Si
ilergy Corp Confident
p.
tial- Prepare for Custo
ed
omer Use Only
O
2
All Right Reserved.
ts
AN_
_SY586
68
D
M
=
MAX
VIN
VSEN
DRV
NC
11
12
13
14
79
67.7
⋅510
=
98.3%
67.43⋅510
+
770.59
Power su
upply pin.
This pin p
provides power supply for IC.
r
LED neg
gative sample pi
in.
This pin r
receives negativ node of LED waveform
ve
D
Gate driv pin.
ver
Connect this pin to the g of primary MOSFET.
gate
No conne
ect.
Block Diagra
k
am
DRV VSEN ADJ
D
N
VIN
UV
VLO
&BIAS
VINON
VINOFF
V
ISET
IS
SET
I
ISET
5xI
ISET
I
ADJ
DIMI
e
PWM Mode
Analog Dim M
Mode
Mod
de
Detec
ction
High Clam or
mp
Low clamp slection
DIM
MO
FSE
ET
P
HLCLP
VLOW
VLOWI
C
Charge
PWM_ MODE
or D
Discharge
VLOW`=k1*VLOW-k2
HIGH
VH
GN
ND
Fig.3 Block D
Diagram
Absol
lute Max
ximum Ratings
( 1)
R
(Note
VIN ---------------------------------------------------------------------------------------------------------------------- - -0.3V~60V
V
V
ADJ, VSEN, DRV ------------------------------------------------------------------------------------------------------- -0.3V~20V
SET, VLOW, H
V
ISET, FS
HLCLP -------------------------------------------------------------------------------------- - -0.3V~3.6V
DIMI,DI
IMO------------------------------------------------------------------------------------------------------------ -- 0.3V~20V
V
Power Dissipation, @ TA = 25°C SO 14 ---------------------------------------------------------------------------------- -- 1.3W
O
W
Package Thermal Resi
istance (Note 2
2)
SO14,θ
JA ------------------------
W
A
--------------------------
--------------------------
--------------------------
--------------------------
--------------------------
------------------------------------
94°C/W
SO14,
θ
JC -----------------------
W
C
--------------------------
--------------------------
--------------------------
--------------------------
--------------------------
------------------------------------
52°C/W
Maximum Junction Te
m
emperature -------------------------------------------------------------------------------------------- 125°C
C
Lead Tem
mperature (So
oldering, 10 se ------------------------------------------------------------------------------------- 260°C
ec.)
C
Storage T
Temperature R
Range ---------------------------------------------------------------------------------------- 6
65°C to 150°C
Recom
mmended Operatin Condit
ng
tions
VIN ----------------------------------------------------------------------------------------------------------------------------- V~55V
V
40°C to 125°C
Junction Temperature Range --------------------------------------------------------------------------------------- 4
AN_SY
Y5868 Rev.0
0.9
© 2018 S
Silergy Corp.
.
Si
ilergy Corp Confident
p.
tial- Prepare for Custo
ed
omer Use Only
O
3
All Right Reserved.
ts
AN_
_SY586
68
Electr
rical Ch
haracteri
istics
(V
IN
= 15 T
A
= 25°C unless otherw spec ified
、
5V,
C
wise
d)
Parame
eter
Power Supply Sect
r
tion
VIN V
Voltage Range
e
VIN T
Turn-on Thresh
hold
VIN T
Turn-off Thres
shold
VIN Shunt Voltage
DIMI Section
Range of Minimum Dimming
Voltag
ge
Ref Vo
oltage of ISET
T
MAX DIMI Source Current
Maxim
mum Dimming Voltage
g
Max D
Duty of PWM
PWM ON Voltage T
Threshold
PWM OFF Voltage Threshold
PWM Frequency Ra
ange
Curre Remover S
ent
Section
ADJ O
Output Current
t
Therm Section
mal
Therm Shut Down Temperature
mal
n
e
T
SD
D
145
°C
C
I
ADJ
J
9.5
10.5
11.5
µA
A
V
VIN
N
V
VIN_
_ON
V
VIN_O
OFF
V
VIN_SH
HUNT
52
V
VIN_ON
8.4
9.2
V
IN_ON
-1.3
55
59
55
10.2
V
V
V
V
Symb
bol
Test Conditions
Min
Typ
Max
Un
nit
V
LOW_R
Range
V
ISE
ET
I
SR_M
MAX
V
HIG
GH
D
PWM_
_MAX
V
PWM_
_ON
V
PWM_
_OFF
F
PWM
M
ISE
ET=3.75K
0
1.44
1.85
9.2
2.3
1.5
2
9.5
99(note 3)
V
ISET
1.56
2.15
9.81
V
V
mA
A
V
%
V
0.8
400
10k
V
Hz
z
Note 1:
S
Stresses beyon the “Absolu Maximum Ratings” ma cause perma
nd
ute
m
ay
anent damage to the device These are str
e
e.
ress
ratings on Functiona operation of the device at these or any other conditio beyond th
nly.
al
t
ons
hose indicated in the
d
operation sections of the specifica
nal
f
ation is not imp
plied. Exposu to absolute maximum ra
ure
e
ating condition for extende
ns
ed
periods m affect dev reliability
may
vice
y.
Note 2:
Ɵ
JA
is measure in the natur convection at T
A
= 25°C on a low effe
ed
ral
n
C
ective single l
layer thermal conductivity t
c
test
board of JEDEC 51-3 thermal meas
surement stand
dard. Test con
ndition: Devic mounted on 2” x 2” FR-4 substrate PC
ce
n
4
CB,
2oz copp with minim
per,
mum recomm
mended pad on top layer and thermal vias to bottom lay ground pla
n
d
yer
ane.
Note 3:
I peak voltage of PWM sig is higher than 10V, It is no problem. But if the pea is 3.3V, 100% duty inpu
If
e
gnal
t
s
ak
ut
may be re
ecognized as 0
0~10V signal mistakenly.
AN_SY
Y5868 Rev.0
0.9
© 2018 S
Silergy Corp.
.
Si
ilergy Corp Confident
p.
tial- Prepare for Custo
ed
omer Use Only
O
4
All Right Reserved.
ts
AN_
_SY586
68
Operation
SY5868 integrate a d
dimming inter
rface converte whose
er
gnal can be a 0/1~10V dim
mming signal, resistor,
input sig
or PWM signal. It reco
ognizes the sig automatic
gnal
cally.
When inp signal is 0
put
0/1~10V dimm
ming signal, I will be
It
converted into a PWM signal to d
d
M
driver opto-co
oupler or
dimmable IC.
When inp signal is a resistor, ther is a current flowing
put
re
t
out from DIMI pin to produce a v
m
o
voltage at the resistor.
Then It w
works as same as 0/1~10V d
e
dimming inpu
ut.
When inp signal is a PWM signal, it is convert into a
put
,
ted
reverse PW signal.
WM
DIMO DIMI
O
SY58
868
0/1~1
10V
DIMI(V)
There is a sh
hunt current if VIN voltage is larger than 55V
which helps to protect IC when powe voltage is h
C
er
high
than 55V.
2. Dimming Input
(1) 0/1~10V Dimming
100%-D
DIMO
Fig.6 0/1~
~10V Dimming
g
al
n
d
If input signa of DIMI pin is 0/1~10V, it is converted
into reversed duty signal.
d
(2) Resistor Dimming
D
There are two working modes.
e
g
Low-clam is used to c
mp
clamp the min
nimum duty cy
ycle.
High-clam is used to clamp the ma
mp
aximum duty c
cycle.
More det informatio is discussed below.
tail
on
d
Also, it integrates a current rem
mover for rip
pple-free
on.
applicatio
100%-D
DIMO
I
DIMI
DIMO DIMI
O
SY58
868
DIMI(V)
Appli
ications Informa
ation
Start up
Supposin DIMI is flo
ng
oating.
DIMO f
follow VIN before VIN reach V
IN_O
. After
ON
reaching V
IN_ON
, IC be
egin to work and DIMO is r
a
regulated
by DIMI.
V
BUS
Fig.7 Res
sistor Dimming
g
If DIMI is c
connected with a variable r
h
resistor, there is a
current flow from DIMI pin to drive the resistor and
w
e
produce 0~10V signal. Also, the c
current exists in
s
mming applica
ation.
0/1~10V dim
(3) PWM Dimming
DIMO
R
ST
VIN
C
VIN
DIMO
DIMI
SY5868
t
VIN
VIN_ON
DIMO
SY5868
DIM
MI
t
Fig.8 PW Dimming
WM
Fig.4 Start up
LED+
R
VIN
N
>55V
shunt
VIN
VDD
If input dimm
ming signal is PWM signal, IC converts i
,
it
into a reverse PWM signal.
ed
3. Working Mode
(1) High clam mode
mp
I
ISET
14V
Fig internal LD
g.5
DO
1.5V
R
HLCLPU
H
HL
LCLP
G
GND
R
HLCLPD
H
IC integr
rates a 60V LD for simplifying peripher
DO
ral
device.
Fig.9 High cl
lamp mode set
tting
AN_SY
Y5868 Rev.0
0.9
© 2018 S
Silergy Corp.
.
Si
ilergy Corp Confident
p.
tial- Prepare for Custo
ed
omer Use Only
O
5
All Right Reserved.
ts
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