SY7120
High Efficiency, 16V, 10A
Synchronous Step Up Regulator
Advanced Design Specification
General Description
SY7120 develops a high efficiency, high power density
synchronous Boost regulator. The device adopts
adaptive constant OFF time and current mode control.
The integrated low R
DS(ON)
switches minimize the
conduction loss.
SY7120 provides selectable PFM/PWM light load
operation mode. The device features cycle by cycle
peak current limit. Low output voltage ripple and small
external inductor and capacitor size are achieved with
programmable pseudo-constant frequency.
Features
•
Input Range: 2.8-16V
•
Programmable Pseudo-constant Frequency:
300kHz-2MHz
•
Low R
DS(ON)
for Internal Switch
Main FET: 10mΩ
Rectifier FET: 20mΩ
•
PFM/PWM Selectable Light Load Operation Mode
•
Internal Loop Compensation
•
Programmable Peak Current Limit
•
Internal Soft-start Time Limit the Inrush Current
•
Input Voltage UVLO
•
Over Temperature Protection
•
Over Voltage Protection
•
RoHS Compliant and Halogen Free
•
Compact Package:QFN3×3-20
Ordering Information
SY7120
□
(□□
□
□□)□
□□
Tempera ture Code
Packa ge Code
Optional Spec Code
Applications
Note
--
•
•
•
•
Power Bank
High power AP
E-Cigarette
Bluetooth Speaker
Ordering Number
SY7120RAC
Package type
QFN3×3-20
Typical Applications
Figure 1. Schematic Diagram
SY7120 Rev. 0.0
Silergy Corp. Confidential- Prepared for Customer Use Only
1
SY7120
Pinout (top view)
GND
VCC
17
20
19
18
16
BS
OUT
OUT
OUT
OUT
NC
LX
LX
1
2
3
4
5
10
15
14
SVIN
EN
MODE
FS
FB
GND
13
12
11
6
7
8
9
ILMT
LX
GND
(QFN3×3-20)
Top Mark:
Pin
Name
BS
OUT
LX
GND
ILMT
NC
FB
FS
BMFxyz for SY7120RAC (device
code: BMF,
x=year code, y=week code, z= lot number code)
Pin Description
Boost-strap pin. Supply Rectifier FET’s gate driver. Decouple this pin to the LX pin with a
0.1µF ceramic capacitor
The Boost converter output pin.
Inductor node. Connect an inductor from power input to the LX pin.
Ground pin of the IC.
Switch peak current limit setting. Connect a resistor from this pin to GND.
I
LMT
(A)=1200/R
ILMT
(kΩ)-2
Not connected.
Feedback pin. Connected to the center of resistor voltage divider to program the output
voltage: V
OUT
=1V×(R
1
/R
2
+1)
Switching frequency setting pin. Connect a resistor from this pin to ground to program the
switching frequency.
f
S
(kHz) = 73565/R
FS
(kΩ)+300
Operating mode selection under light load. Pull this pin low for PFM operation, and pull
this pin high or leave it floating for PWM operation.
Enable control. Pull high to turn on the IC. Do not leave it floating.
IC power supply input pin. Decouple this pin to the GND pin with a 1µF ceramic capacitor.
Output of the internal regulator. Decouple this pin to the GND pin with a 1µF ceramic
capacitor.
Pin
Number
1
2,3,4,5
6,19,20
7,8,18
5
10,16
11
12
MODE
EN
SVIN
VCC
13
14
15
17
SY7120 Rev. 0.0
Silergy Corp. Confidential- Prepared for Customer Use Only
GND
NC
2
SY7120
Block Diagram
LX
BS
OUT
SVIN
LDO
VCC
Current
Sense
SVIN
UVLO
EN
MODE
Thermal
Sense
PWM
Control
&
Protection
Logic
1V
SST
FB
FS
ILMT
GND
Figure2. Block Diagram
Absolute Maximum Ratings
(Note 1)
SVIN, LX, OUT, ILMT, FS, MODE, EN--------------------------------------------------------------------------- 0.3V to 18V
FB, VCC ------------------------------------------------------------------------------------------------------------------------- 4V
BS-LX --------------------------------------------------------------------------------------------------------------------------- 4V
Power Dissipation, P
D
@ T
A
= 25°C QFN3x3-20------------------------------------------------------------------------TBD
Package Thermal Resistance (Note 2)
θ
JA
---------------------------------------------------------------------------------------------------------------- TBD
θ
JC
-----------------------------------------------------------------------------------------------------------------TBD
Junction Temperature Range --------------------------------------------------------------------------------
-
40°C to 150°C
Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------- 260°C
Storage Temperature Range ---------------------------------------------------------------------------------
-
65°C to 150°C
Recommended Operating Conditions
(Note 3)
SVIN-------------------------------------------------------------------------------------------------------------------- 2.8V to 16V
Junction Temperature Range ------------------------------------------------------------------------------- -40°C to 125°C
Ambient Temperature Range --------------------------------------------------------------------------------- -40°C to 85°C
SY7120 Rev. 0.0
Silergy Corp. Confidential- Prepared for Customer Use Only
3
SY7120
Electrical Characteristics
(V
IN
=5V, V
OUT
=12V, I
OUT
=100mA, T
A
= 25°C unless otherwise specified)
Parameter
Input Voltage Range
Quiescent Current
Shutdown Current
FB Leakage Current
Main N-FET RON
Rectifier N-FET RON
Feedback Reference
Voltage
SVIN UVLO Rising
Threshold
SVIN UVLO Hysteresis
Output OVP Threshold
Main N-FET Current Limit
Main N-FET Current Limit
Program Range
ILMT Reference Voltage
EN/MODE Rising
Threshold
EN/MODE Falling
Threshold
Switching Frequency
Program Range
Switching Frequency
Accuracy
Minimum ON Time
Minimum OFF Time
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
Symbol
V
SVIN
I
Q
I
SHDN
I
FB
R
DS(ON)_M
R
DS(ON)_R
V
REF
V
SVIN,UVLO
V
SVIN,HYS
V
OUT,OVP
I
LMT
I
LMT,RNG
V
ILMT
V
EN/MODE,H
V
EN/MODE,L
f
SW,RNG
f
SW
t
ON,MIN
t
OFF,MIN
T
SD
T
HYS
R
FS
=340kΩ
0.4
300
400
500
130
80
150
15
2000
600
0.2
17
10
Test Conditions
FB=1.1 V
EN=0
V
FB
=3.3V
Min
2.8
Typ
200
-50
10
20
1
3.5
50
Max
16
Unit
V
µA
µA
nA
mΩ
mΩ
V
V
V
V
A
A
V
V
V
kHz
kHz
ns
ns
°C
°C
0.99
1.01
2.8
R
ILMT
=100kΩ
16
9
2
18
11
10
0.6
1.2
Note 1:
Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Note 2:
θ
JA
is measured in the natural convection at T
A
= 25°C on a low effective single layer thermal conductivity
test board of JEDEC 51-3 thermal measurement standard. Paddle of QFN3x3-20 package is the case position for
θ
JC
measurement.
Note 3:
The device is not guaranteed to function outside its operating conditions.
SY7120 Rev. 0.0
Silergy Corp. Confidential- Prepared for Customer Use Only
4
SY7120
QFN3×3-20 Package Outline
Top view
Side view
Bottom view
SY7120 Rev. 0.0
Silergy Corp. Confidential- Prepared for Customer Use Only
5
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