SS52 THRU SS525
5.0 AMP SURFACE MOUNT SCHOTTKY BARRIER RECTIFIER
Features
·
Schottky Brrier Chip
·
Low Power Loss,High Efficiency
·
Ideally Suited for Automatic Assembly
·
Surge Overload Rating to 100A Peak
·Plastic
Case Material has UL Flammability
Classification Rating 94V-0
0.059(1.50)
0.051(1.30)
SMA/DO-214AC
0.110(2.80)
0.094(2.40)
Mechanical Data
·
Case: Molded plastic SMA
·
Terminals: Plated leads solderable per
MIL-STD-750,Method 2026 guaranteed
·
Polarity: Color band denotes cathode end
·
Mounting Position: Any
·
Making: Type Number
0.060(1.52)
0.030(0.76)
0.103(2.62)
0.079(2.00)
0.181(4.60)
0.157(4.00)
0.012(0.31)
0.006(0.15)
0.008(0.20)
0.002(0.05)
0.208(5.28)
0.188(4.80)
Dimensions in inches and (millimeters)
Maximum Ratings and Electrical Characteristics
Rating at 25℃ ambient temperature unless otherwise specified
Single phase,half wave,60Hz,resistive or inductive load
For capacitive load derate current by 20%
Type Number
Maximum Recurrent Peak Reverse Voltage
Maximum RMS Voltage
Maximum DC Blocking Voltage
Average Rectified Output Current
@T
L
=100
℃
Peak Forward Surge Current 8.3ms Single half
sine-wave superimposed on rated load (JEDEC
Method)
SYMBOL SS
52
V
RRM
V
RMS
V
DC
20
14
20
SS
53
30
21
30
SS SS SS SS
54 545 55 56
40
28
40
45
31
45
50
35
50
60
42
60
5.0
SS
58
80
56
80
SS SS SS SS Unit
510 515 520 525
100 150 200 250 V
70
100
105 140 175
V
150 200 250 V
A
IF(AV)
I
FSM
100
A
Rating for fusing (t<8.3ms)
Forward Voltage
@IF=5.0A (Note 1)
@T
A
=25
℃
Peak Reverse Current
I
2
t
V
FM
I
R
C
J
R
θJA
T
J
T
STG
0.55
0.1
10
41.50
0.7
0.85
0.92
0.05
5
28
88
-55 to+150
-55 to +150
A
2
s
0.95 V
mA
At Rated DC Blocking Voltage @T
A
=100
℃
Typical Junction Capacitance
Typical Thermal Resistance per leg
(Note 2)
pF
℃
/W
Operating Temperature Range
Storage Temperature Range
Note: 1.Pulse Test with PW=300usec,1%Duty Cycle.
℃
℃
2.Mounted on P.C.Board with 5.0 mm²（0.13mm thick）copper pad areas.
version:02
1of3
www.dyelec.com
SS52 THRU SS525
Fig. 2 Typ. Forward Characteristics
10
SS58 - SS510
SS525
SS515-S520
Fig. 1 Forward Current Derating Curve
, INSTANTANEOUS FORWARD CURRENT (A)
AVERAGE FORWARD CURRENT (A)
5.0
SS55 - SS56
SS52 - SS545
1.0
2.5
0.1
0
25
50
75
100
125
150
0.01
0
0.4
T
A
- 25ºC
I
F
Pulse Width = 300
µ
s
0.8
1.2
Lead Temperature (°C)
Fig. 3 Max Non-Repetitive Peak Fwd Surge Current
Single Half-Sine-Wave
(JEDEC Method)
V
F
, INSTANTANEOUS FWD VOLTAGE (V)
Fig. 4 Typical Junction Capacitance
1000
T
J
= 25°C
PEAK FORWARD SURGE CURRENT (A)
T
A
= 100
°
C
˝
100
, JUNCTION CAPACITANCE (pF)
75
100
50
25
0
1
10
NUMBER OF CYCLES AT 60 Hz
100
10
0.1
1
10
100
V
R
, REVERSE VOLTAGE (V)
version:02
2of3
www.dyelec.com
SS52 THRU SS525
Important Notice and Disclaimer
•
Reproducing and modifying information of the document is prohibited without permission
•
DIYI reserves the right to make changes to this document and its products and
•
DIYI disclaims any and all liability arising out of the application or use of
•
any product including damages incidentally and consequentially occurred.
from DIYI.
specifications at any time without notice. Customers should obtain and confirm the
latest product information and specifications before final design, purchase or use.
•
DIYI does not assume any and all implied warranties, including warranties of fitness for
particular purpose, non-infringement and merchantability.
Applications shown on the herein document are examples of standard use and
operation. Customers are responsible in comprehending the suitable use in particular
applications.
•
The products shown herein are not designed and authorized for equipments requiring high
level of reliability or relating to human life and for any applications concerning life-saving
or life-sustaining, such as medical instruments, transportation equipment, aerospace
machinery et cetera. Customers using or selling the seproducts for use in such applications
do so at their own risk and agree to fully indemnify DIYI for any damages resulting from such
improper use or sale.
DIYI makes no representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
•
Since DIYI uses lot number as the tracking base, please provide the lot number for tracking
when complaining.
version:02
3 of 3
www.dyelec.com
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
