VBM165R12 / VBMB165R12/ VBL165R12
N-Channel 650V (D-S)
Power MOSFET
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. at 25 °C (Ω)
Q
g
max. (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
43
5
22
Single
650
0.
68
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FEATURES
•
•
•
•
•
Low figure-of-merit (FOM) R
on
x Q
g
Low input capacitance (C
iss
)
Reduced switching and conduction losses
Ultra low gate charge (Q
g
)
Avalanche energy rated (UIS)
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
TO-220AB
TO-220 FULLPAK
D
D
2
PAK
(TO-263)
G
G
D
S
G D S
G D S
Top View
Top View
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
= 150 °C)
Pulsed Drain Current
a
Linear Derating Factor
Single Pulse Avalanche Energy
b
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
Soldering Recommendations (Peak Temperature)
c
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
Ω,
I
AS
= 4.5 A.
c. 1.6 mm from case.
d. I
SD
≤
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
T
J
= 125 °C
E
AS
P
D
T
J
, T
stg
dV/dt
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
650
± 30
12
9.4
45
3.6
290
106
/34
-55 to +150
15
4.1
300
UNIT
V
A
W/°C
mJ
W
°C
V/ns
°C
1
VBM165R12 / VBMB165R12/ VBL165R12
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
60
0.8
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UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance, Energy
Related
a
Effective Output Capacitance, Time
Related
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate Input Resistance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
T
J
= 25 °C, I
F
= I
S
= 8 A,
dI/dt = 100 A/μs, V
R
= 400 V
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
o(er)
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
GS
= ± 30 V
V
DS
= 650 V, V
GS
= 0 V
V
DS
= 520 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 8 A
V
DS
= 30 V, I
D
= 8 A
650
-
3
-
-
-
-
-
-
-
-
-
-
-
0.75
-
-
-
-
-
0.
65
16
16
00
300
200
63
213
43
5
22
13
11
81
25
3.5
-
-
5
± 100
±1
1
10
-
-
-
-
-
V
V/°C
V
nA
μA
μA
Ω
S
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
pF
-
-
96
-
-
25
35
90
40
-
Ω
ns
nC
V
DS
= 0 V to 520 V, V
GS
= 0 V
C
o(tr)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
f = 1 MHz, open drain
V
DD
= 520 V, I
D
= 8 A,
V
GS
= 10 V, R
g
= 9.1
Ω
V
GS
= 10 V
I
D
= 8 A, V
DS
= 520 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
345
4.5
35
15
A
40
1.5
-
-
-
V
ns
μC
A
G
S
T
J
= 25 °C, I
S
= 8 A, V
GS
= 0 V
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
b. C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
2
VBM165R12 / VBMB165R12/ VBL165R12
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
www.VBsemi.com
50
I
D
, Drain-to-Source Current (A)
R
DS(on)
, Drain-to-Source
On Resistance (Normalized)
40
30
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
6V
BOTTOM 5 V
TOP
3
T
J
= 25 °C
2.5
2
1.5
1
V
GS
= 10 V
0.5
0
- 60 - 40 - 20 0
I
D
= 8 A
20
10
0
0
5
10
15
20
25
30
20 40 60 80 100 120 140 160
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
T
J
, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
30
I
D
, Drain-to-Source Current (A)
25
20
15
10
5
Capacitance (pF)
15 V
14 V
13 V
12 V
11 V
10 V
9V
8V
7V
BOTTOM 6 V
TOP
2400
T
J
= 150 °C
C
iss
1800
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
1200
C
oss
600
C
rss
5V
0
0
5
10
15
20
25
30
0
0
100
200
300
400
500
600
V
DS
, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
V
DS
, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
50
24
V
GS
,
Gate-to-Source
Voltage (V)
I
D
, Drain-to-Source Current (A)
40
20
16
12
8
4
0
V
DS
= 520 V
V
DS
= 325 V
V
DS
= 130 V
30
20
T
J
= 25 °C
10
T
J
= 150 °C
V
DS
= 30.8 V
0
5
10
15
20
25
0
0
20
40
60
80
100
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Q
g
, Total
Gate
Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
3
VBM165R12 / VBMB165R12/ VBL165R12
www.VBsemi.com
100
20
I
SD
, Reverse Drain Current (A)
I
D
, Drain Current (A)
T
J
= 150 °C
10
T
J
= 25 °C
15
10
1
5
V
GS
= 0 V
0.1
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0
25
50
75
100
125
150
V
SD
,
Source-Drain
Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
T
J
, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
1000
800
Operation in this Area
Limited by R
DS(on)
775
100
I
D
, Drain Current (A)
V
DS
, Drain-to-Source
Breakdown Voltage (V)
I
DM
= Limited
750
725
700
675
650
625
600
- 60 - 40 - 20 0
10
Limited by R
DS(on)
*
100 μs
1
1 ms
T
C
= 25 °C
T
J
= 150 °C
Single
Pulse
1
10 ms
0.1
BVDSS Limited
0.01
10
100
1000
V
DS
- Drain -to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
Fig. 10 - Temperature vs. Drain-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single
Pulse
0.01
0.0001
0.001
0.01
0.1
1
Pulse Time (s)
Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case
4
VBM165R12 / VBMB165R12/ VBL165R12
R
D
10 V
D.U.T.
+
-
V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
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V
DS
V
GS
R
G
Q
G
Q
GS
Q
GD
V
G
Charge
Fig. 12 - Switching Time Test Circuit
Fig. 16 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
50 kΩ
12 V
V
DS
90 %
0.2 µF
0.3 µF
+
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
GS
3 mA
D.U.T.
-
V
DS
Fig. 13 - Switching Time Waveforms
I
G
I
D
Current sampling resistors
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
Fig. 17 - Gate Charge Test Circuit
D.U.T
I
AS
+
-
V
DD
10 V
t
p
0.01
Ω
Fig. 14 - Unclamped Inductive Test Circuit
V
DS
t
p
V
DD
V
DS
I
AS
Fig. 15 - Unclamped Inductive Waveforms
5
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