VBM1201K
www.VBsemi.com
N-Channel 200 V (D-S) MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
13
3.0
7.9
Single
200
0.85
FEATURES
•
•
•
•
•
TrenchFET
®
Power MOSFET
175 °C Junction Temperature
PWM Optimized
100 % R
g
Tested
Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• Primary Side Switch
TO-220AB
D
G
G D S
Top View
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Current
a
Mount)
e
E
AS
I
AR
E
AR
T
C
= 25 °C
T
A
= 25 °C
P
D
dV/dt
T
J
, T
stg
for 10 s
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
200
± 20
5.0
4.0
20
0.33
0.020
161
4.8
4.2
42
2.5
5.0
-55 to +150
260
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V
Linear Derating Factor
Linear Derating Factor (PCB
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche
Energy
a
Maximum Power Dissipation
Maximum Power Dissipation (PCB mount)
e
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature)
d
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 14 mH, R
g
= 25
,
I
AS
= 4.8 A (see fig. 12).
c. I
SD
5.2 A, dI/dt
95 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
1
VBM1201K
www.VBsemi.com
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
(PCB mount)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJA
R
thJC
MIN.
-
-
-
TYP.
-
-
-
MAX.
110
50
3.0
°C/W
UNIT
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
DS
= 200 V, V
GS
= 0 V
V
DS
= 160 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 2.9 A
b
V
DS
= 50 V, I
D
= 2.9 A
b
MIN.
200
-
2.0
-
-
-
-
1.7
-
-
-
-
-
-
-
TYP.
-
0.29
-
-
-
-
0.85
-
185
100
30
-
-
-
7.2
22
19
13
4.5
7.5
MAX.
-
-
4.0
± 100
25
250
-
-
-
-
-
13.0
3.0
7.9
-
-
-
-
-
UNIT
V
V/°C
V
nA
μA
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
I
D
= 4.8 A, V
DS
= 160 V,
see fig. 6 and 13
b
pF
V
GS
= 10 V
nC
V
DD
= 100 V, I
D
= 4.8 A,
R
G
= 18
,
R
D
= 20
,
see fig. 10
b
Between lead,
6 mm (0.25") from
package and center of
die contact
-
-
-
ns
D
-
G
nH
-
S
-
-
-
-
-
-
-
-
-
150
0.91
4.8
A
19
1.8
300
1.8
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 4.8 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 4.8 A, dI/dt = 100 A/μs
b
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
2
VBM1201K
www.VBsemi.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
3
VBM1201K
www.VBsemi.com
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
4
VBM1201K
www.VBsemi.com
V
DS
V
GS
R
G
R
D
D.U.T.
+
- V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a - Switching Time Test Circuit
V
DS
90 %
Fig. 9 - Maximum Drain Current vs. Case Temperature
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
