Source and Sink 1.5A/2A Fast Transient Response Line Regulator
DATASHEET
TD5860(A)
General Description
The TD5860/TD5860A linear regulator is designed to
provide a regulated voltage with bi-direction output
current for DDRSDRAM termination voltage. The
TD5860 integrates two power transistors to source or
sink load current up to 1.5A/2A. It also features internal
soft-start, current-limit, thermal shutdown and enable
control functions into a single chip.
The internal soft-start controls the rising rate of the
output voltage to prevent inrush current during start-up.
The current-limit circuit detects the output current and
limits the current during short-circuit or current overload
conditions. The on-chip thermal shutdown provides
thermal protection against any combination of overload
that would create excessive junction temperatures.
The output voltage of TD5860/TD5860A is regulated to
track the voltage on VREF pin. An proper resistor divider
connected to VIN, GND, and VREF pins is used to
provide a half voltage of VIN to VREF pin. In addition,
connect an external ceramic capacitor and a open-drain
transistor to VREF pin for external soft-start and
shutdown control.
Pulling and holding the voltage on VREF below the
enable voltage threshold shuts down the output. The
output of TD5860/TD5860A will be high impedance after
being shut down by VREF or the thermal shutdown
function.
Features
Provide Bi-direction Output Currents
Sourcing and Sinking Current up to 1.5A/2A Built-in
Soft-Start
Power-On-Reset Monitoring on VCNTL and VIN
pins
Fast Transient Response
Stable with Ceramic Output Capacitors ±20mV High
System Output Accuracy over Load and
Temperature Ranges
Adjustable Output Voltage by External Resistors
Current-Limit Protection
On-Chip Thermal Shutdown
Shutdown for Standby or Suspend Mode
SimpleSOP-8 with Exposed Pad(SOP8-PP)
Packages
Lead Free and Green Devices Available(RoHS
Compliant)
Applications
DDRII/III SDRAM Termination Voltage
Motherboard and VGA Card Power Supplies
Setop Box
SSTL-2/3 Termination Voltage
Package Types
Figure 1. Package Types of TD6821
Figure 1
Package Types of TD5860/TD5860A
December, 20, 2005.
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Source and Sink 1.5A/2A Fast Transient Response Line Regulator
DATASHEET
TD5860(A)
Pin Configurations
Figure 2 Pin Configuration of TD5860/TD5860A (Top View)
Pin Description
Pin Number
Pin Name
Description
Main Power Input Pin. Connect this pin to a voltage source and an input
capacitor. The TD5860/TD5860A sources current to VOUT pin by controlling the
upper pass MOSFET, providing a current path from VIN to VOUT.
Power and Signal Ground. Connect this pin to system ground plane with shortest
traces. The TD5860/TD5860A sinks current from VOUT pin by controlling the
lower pass MOSFET, providing a current path from VOUT to GND. This pin is
also the ground path for internal control circuitry.
Reference Voltage Input and Active-high Enable Control Pin. Apply a voltage to
this pin as a reference voltage for the TD5860/TD5860A. Connect this pin to a
resistor diver, between VIN and GND, and a capacitor for filtering noise purpose.
Applying and holding the voltage below the enable voltage threshold on this pin
by an open-drain transistor shuts down the output. During shutdown, the VOUT
pin has high input impedance.
I Output Pin of The Regulator. Connect this pin to load and output capacitors
(>8μF MLCC is necessary) required for stability and improving transient
response. The output voltage is regulated to track the reference voltage and
capable of sourcing or sinking current up to 1.5A/2A.
No Internal Connection.
Power Input Pin for Internal Control Circuitry. Connect this pin to a voltage
source, providing a bias for the internal control circuitry. A decoupling capacitor is
connected near this pin.
Chip Substrate Connection of The Chip. Connect this pad to system ground plane
for good thermal conductivity.
1
VIN
2
GND
3
VREF
4
VOUT
5,7,8
6
NC
VCNTL
Exposed Pin
GND
December, 20, 2005.
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echcode
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Source and Sink 1.5A/2A Fast Transient Response Line Regulator
DATASHEET
TD5860(A)
Ordering Information
TD5860
□
□
Circuit Type
Packing:
Blank：Tube
Blank:1.5A
R:Type and Reel
A:2A
Absolute Maximum Ratings
Note1: Stresses greater than those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the operation is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
Parameter
VCNTL Supply Voltage(VCNTL to GND)
VIN Supply voltage(VIN to GND)
VREF Input Voltage(VREF to GND)
VOUT Output Voltage(VOUT to GND)
Power Dissipation
Operating Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 sec)
ESD (HBM)
MSL
Thermal Resistance-Junction to Ambient
Thermal Resistance-Junction to Case
RθJA
RθJC
Symbol
V
CNTL
V
IN
V
REF
V
OUT
P
D
T
J
T
STG
T
LEAD
Value
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to Vin+0.3
Internally Limited
150
-65 to 150
260
2000
Level3
55
20
ºC / W
ºC / W
Unit
V
V
V
V
mW
ºC
ºC
ºC
V
December, 20, 2005.
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echcode
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Source and Sink 1.5A/2A Fast Transient Response Line Regulator
DATASHEET
TD5860(A)
Recommended Operating Conditions
Parameter
VCNTL Supply Voltage
VIN Supply Voltage
VREF Input
Voltage
Symbol
V
CNTL
V
IN
V
REF
V
OUT
I
OUT
Min.
3
1.2
0.7
Max.
5.5
5.5
V
CNTL
-2.2
V
REF
±0.02
Unit
V
V
V
V
A
uF
mΩ
uF
uF
ºC
ºC
VOUT Output Voltage
VOUT Output Current(TD5860)
VOUT Output Current(TD5860A)
Capacitance of Input Capacitor
Equivalent Series Resistor(ESR) of Input Capacitor
Capacitance of Output Multi-layer Ceramic
Capacitor(MLCC)
Total Output Capacitance
Operating Junction Temperature
Operating Ambient Temperature
-1.5
-2
10
0
8
10
1.5
2
100
200
47
330
125
85
C
IN
C
OUT
T
J
T
A
-40
-40
December, 20, 2005.
Techcode Semiconductor Limited
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echcode
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Source and Sink 1.5A/2A Fast Transient Response Line Regulator
DATASHEET
TD5860(A)
Electrical Characteristics
Refer to the typical application circuit. These specifications apply over V
CNTL
=5V, V
IN
=1.8V or 1.5V, V
REF
=0.5V
IN
, C
IN
=10μF, C
OUT
=10μF (MLCC) and T
A
=
-40~85°C, unless otherwise specified. Typical values are at T
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