65HVD485E
65HVD485E Half-Duplex RS-485 Transceiver
Features
1
Description
The
65HVD485E device is a
half-duplex
transceiver designed for RS-485 data bus networks.
Powered by a 5-V supply, it is fully compliant with the
TIA/EIA-485A standard. This device is suitable for
data transmission up to 10 Mbps over long twisted-
pair cables and is designed to operate with very low
supply current, typically less than 2 mA, exclusive of
the load. When the device is in the inactive shutdown
mode, the supply current drops below 1 mA.
The wide common-mode range and high ESD
protection levels of this device make it suitable for
demanding applications such as: electrical inverters,
status/command signals across telecom racks,
cabled chassis interconnects, and industrial
automation networks where noise tolerance is
essential. The 65HVD485E device matches the
industry-standard footprint of the HG75176 device.
Power-on reset circuits keep the outputs in a high-
impedance state until the supply voltage has
stabilized. A thermal-shutdown function protects the
device from damage due to system-fault conditions.
The 65HVD485E device is characterized for
operation from –40°C to 85°C air temperature.
•
•
•
•
•
•
•
Bus-Pin ESD Protection up to 15 kV
1/2 Unit Load: up to 64 Nodes on a Bus
Bus-Open-Failsafe Receiver
Glitch-Free Power-Up and Power-Down Bus
Inputs and Outputs
Available in Small VSSOP-8 Package
Meets or Exceeds the Requirements of the
TIA/EIA-485A Standard
Industry-Standard HG75176 Footprint
Applications
•
•
•
•
•
•
•
Motor Control
Power Inverters
Industrial Automation
Building Automation Networks
Industrial Process Control
Battery-Powered Applications
Telecommunications Equipment
Typical Application Schematic
R
RE
DE
D
D
R
A
B
R
T
R
T
A
B
R
R
RE
DE
D
D
A
B
A
B
R
D
R
D
R RE DE D
R RE DE D
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2019 NOV
65HVD485E
Pin Configuration and Functions
D, DGK, P Packages
8-Pin SOIC, VSSOP, PDIP
Top View
R
RE
DE
D
1
2
3
4
8
7
6
5
V
CC
B
A
GND
Pin Functions
PIN
NAME
A
B
D
DE
GND
R
RE
V
CC
NO.
6
7
4
3
5
1
2
8
TYPE
Bus input/output
Bus input/output
Digital input
Digital input
Reference potential
Digital input
Digital input
Supply
DESCRIPTION
Driver output or receiver input (complementary to B)
Driver output or receiver input (complementary to A)
Driver data input
Driver enable, active high
Local device ground
Receive data output
Receiver enable, active low
4.5-V to 5.5-V supply
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2019 NOV
65HVD485E
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
V
CC
Supply voltage
Voltage range at A or B
Voltage range at any logic pin
Receiver output current
Voltage input range, transient pulse, A and B, through 100
Ω
(see
Figure 15)
T
J
T
stg
(1)
(2)
Junction temperature
Continuous total power dissipation
Storage temperature
(1) (2)
MIN
–0.5
–9
–0.3
–24
–50
170
–65
MAX
7
14
V
CC
+ 0.3
24
50
170
130
UNIT
V
V
V
mA
V
°C
°C
Refer to
Dissipation Ratings
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating
Conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
ESD Ratings
VALUE
V
(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-
001
(1)
Bus pins and GND
All pins
(2)
UNIT
V
±15000
±4000
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101
(1)
(2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
V
CC
V
I
V
IH
V
IL
V
ID
I
O
R
L
1/t
UI
T
A
T
J
(1)
(2)
Supply voltage
Input voltage at any bus terminal (separately or common mode)
High-level input voltage (D, DE, or RE inputs)
Low-level input voltage (D, DE, or RE inputs)
Differential input voltage
Output current
Differential load resistance
Signaling rate
Operating free-air temperature
Junction temperature
(2)
NOM
MAX
5.5
12
V
CC
0.8
12
60
8
UNIT
V
V
V
V
V
mA
Ω
4.5
–7
2
0
–12
Driver
Receiver
–60
–8
54
0
–40
–40
60
10
85
130
Mbps
°C
°C
The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet.
See
Thermal Information
for information on maintenance of this specification for the DGK package.
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2019 NOV
65HVD485E
Thermal Information
65HVD485E
THERMAL METRIC
(1)
D
(SOIC)
8 PINS
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
Junction-to-ambient thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
(2)
DGK
(VSSOP)
8 PINS
180
66
108
4.6
73.1
P
(PDIP)
8 PINS
153
40.5
28.5
17.6
28.3
UNIT
127
51.4
47.6
7.9
47
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Electrical Characteristics: Driver
over recommended operating conditions (unless otherwise noted)
PARAMETER
|V
OD
|
Differential output voltage
Change in magnitude of differential output
voltage
Steady-state common-mode output voltage
Change in steady-state common-mode output
voltage
Common-mode output voltage
High-impedance output current
Input current
Short-circuit output current
All typical values are at 25°C and with a 5-V supply.
See
Figure 5
See receiver input currents
D, DE
–7 V
≤
V
O
≤
12 V (see
Figure 9)
–100
–250
100
250
TEST CONDITIONS
I
O
= 0, No load
R
L
= 54 W (see
Figure 3)
V
TEST
= –7 V to 12 V (see
Figure 4)
Δ|V
OD
|
V
OC(SS)
ΔV
OC(SS)
V
OC(PP)
I
OZ
I
I
I
OS
(1)
See
Figure 3
and
Figure 4
See
Figure 5
MIN TYP
(1)
3
1.5
1.5
–0.2
1
–0.1
0
2.6
0
500
0.2
3
0.1
V
V
V
mV
μA
μA
mA
4.3
2.3
V
MAX
UNIT
Electrical Characteristics: Receiver
over recommended operating conditions (unless otherwise noted)
PARAMETER
V
IT+
V
IT–
V
hys
V
OH
V
OL
I
OZ
Positive-going input threshold voltage
Negative-going input threshold voltage
Hysteresis voltage (V
IT+
– V
IT–
)
High-level output voltage
Low-level output voltage
High-impedance-state output current
V
ID
= 200 mV, I
OH
= –8 mA (see
Figure 10)
V
ID
= –200 mV, I
OH
= 8 mA (see
Figure 10)
V
O
= 0 to V
CC
, RE = V
CC
V
IH
= 12 V, V
CC
= 5 V
I
I
Bus input current
V
IH
= 12 V, V
CC
= 0
V
IH
= –7 V, V
CC
= 5 V
V
IH
= –7 V, V
CC
= 0
I
IH
I
IL
C
diff
(1)
High-level input current (RE)
Low-level input current (RE)
Differential input capacitance
V
IH
= 2 V
V
IL
= 0.8 V
V
I
= 0.4 sin (4E6πt) + 0.5 V, DE at 0 V
–0.4
–0.4
–60
–60
–30
–30
7
μA
μA
pF
–1
4
I
O
= –8 mA
I
O
= 8 mA
–200
TEST CONDITIONS
MIN TYP
(1)
–85
–115
30
4.6
0.15
0.4
1
0.5
0.5
mA
MAX
–10
UNIT
mV
mV
mV
V
V
μA
All typical values are at 25°C and with a 5-V supply.
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65HVD485E
Power Dissipation Characteristics
PARAMETER
P
(AVG)
T
SD
Average power dissipation
Thermal shut-down junction
temperature
TEST CONDITIONS
R
L
= 54
Ω,
Input to D is a 10 Mbps 50% duty cycle square
wave V
CC
at 5.5 V, T
J
= 130°C
165
MIN
TYP
MAX
219
UNIT
mW
°C
Supply Current
over recommended operating conditions (unless otherwise noted)
PARAMETER
I
CC
(1)
Driver and receiver
disabled
TEST CONDITIONS
DE at V
CC
, RE at 0 V, No load
DE at 0 V, RE at V
CC
MIN
TYP
(1)
MAX
2
1
UNIT
mA
mA
Driver and receiver enabled D at V
CC
or open or 0 V,
D at V
CC
or open,
All typical values are at 25°C and with a 5-V supply.
Switching Characteristics: Driver
over recommended operating conditions (unless otherwise noted)
PARAMETER
t
PLH
t
PHL
t
r
t
f
t
sk(p)
t
PZH
t
PHZ
t
PZL
t
PLZ
t
PZH(SHN)
t
PZL(SHDN)
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Differential output signal rise time
Differential output signal fall time
Pulse skew (|t
PHL
– t
PLH
|)
Propagation delay time, high-impedance-to-high-level
output
Propagation delay time, high-level-to-high-impedance
output
Propagation delay time, high-impedance-to-low-level
output
Propagation delay time, low-level-to-high-impedance
output
Propagation delay time, shutdown-to-high-level
output
R
L
= 54
Ω,
C
L
= 50 pF (see
Figure 6)
TEST CONDITIONS
MIN
TYP MAX
30
30
25
25
5
150
R
L
= 110
Ω,
RE at 0 V (see
Figure 7)
100
150
R
L
= 110
Ω,
RE at 0 V (see
Figure 8)
100
R
L
= 110
Ω,
RE at VCC (see
Figure 7)
2600
2600
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
Propagation delay time, shutdown-to-low-level output R
L
= 110
Ω,
RE at VCC (see
Figure 8)
Switching Characteristics: Receiver
over recommended operating conditions (unless otherwise noted)
PARAMETER
t
PLH
t
PHL
t
sk(p)
t
r
t
f
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH(SHDN)
t
PZL(SHDN)
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Pulse skew (|t
PHL
– t
PLH
|)
Output signal rise time
Output signal fall time
Output enable time to high level
Output enable time to low level
Output enable time from high level
Output enable time from low level
Propagation delay time, shutdown-to-high-level
output
Propagation delay time, shutdown-to-low-level
output
C
L
= 15 pF, DE at 0 V,
(see
Figure 14)
C
L
= 15 pF, DE at 3 V,
(see
Figure 12
and
Figure 13)
V
ID
= -1.5 V to 1.5 V, C
L
= 15 pF
(see
Figure 11)
6
3
3
50
50
50
50
3500
3500
TEST CONDITIONS
MIN
TYP MAX
200
200
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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2019 NOV
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