3.3V Uniform Sector
Dual and Quad Serial Flash
GD25Q256D
GD25Q256D
DATASHEET
1
3.3V Uniform Sector
Dual and Quad Serial Flash
GD25Q256D
Contents
1.
2.
3.
4.
5.
6.
FEATURES .................................................................................................................................................. 4
GENERAL DESCRIPTION .......................................................................................................................... 5
MEMORY ORGANIZATION ......................................................................................................................... 8
DEVICE OPERATION .................................................................................................................................. 9
DATA PROTECTION ................................................................................................................................. 11
STATUS AND EXTENDED ADDRESS REGISTERS ................................................................................ 12
6.1.
6.2.
7.
S
TATUS
R
EGISTERS
.............................................................................................................................. 12
E
XTENDED
A
DDRESS
R
EGISTER
............................................................................................................ 16
COMMANDS DESCRIPTION .................................................................................................................... 17
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
W
RITE
E
NABLE
(WREN) (06H) ............................................................................................................. 22
W
RITE
D
ISABLE
(WRDI) (04H) .............................................................................................................. 22
W
RITE
E
NABLE FOR
V
OLATILE
S
TATUS
R
EGISTER
(50H) ........................................................................ 23
R
EAD
S
TATUS
R
EGISTER
(RDSR) (05H
OR
35H
OR
15H) ...................................................................... 23
W
RITE
S
TATUS
R
EGISTER
(WRSR) (01H
OR
31H
OR
11H) .................................................................... 24
R
EAD
E
XTENDED
R
EGISTER
(C8H) ........................................................................................................ 25
W
RITE
E
XTENDED
R
EGISTER
(C5H) ...................................................................................................... 25
R
EAD
D
ATA
B
YTES
(READ 03H
OR
4READ 13H) ................................................................................. 26
R
EAD
D
ATA
B
YTES AT
H
IGHER
S
PEED
(F
AST
R
EAD
0BH
OR
4F
AST
R
EAD
0CH) ...................................... 27
7.10. D
UAL
O
UTPUT
F
AST
R
EAD
(DOFR 3BH
OR
4DOFR 3CH) ..................................................................... 28
7.11. Q
UAD
O
UTPUT
F
AST
R
EAD
(QOFR 6BH
OR
4QOFR 6CH) .................................................................... 30
7.12. D
UAL
I/O F
AST
R
EAD
(DIOFR BBH
OR
4DIOFR BCH) .......................................................................... 32
7.13. Q
UAD
I/O F
AST
R
EAD
(QIOFR EBH
OR
4QIOFR ECH)......................................................................... 36
7.14. S
ET
B
URST WITH
W
RAP
(77H) .............................................................................................................. 39
7.15. P
AGE
P
ROGRAM
(PP 02H
OR
4PP 12H) ............................................................................................... 39
7.16. Q
UAD
P
AGE
P
ROGRAM
(QPP 32H
OR
4QPP 34H) ................................................................................ 42
7.17. S
ECTOR
E
RASE
(SE 20H
OR
4SE 21H)................................................................................................. 45
7.18. 32KB B
LOCK
E
RASE
(BE32 52H
OR
4BE32 5CH) ................................................................................ 46
7.19. 64KB B
LOCK
E
RASE
(BE64 D8H
OR
4BE64 DCH) ............................................................................... 47
7.20. C
HIP
E
RASE
(CE) (60/C7H) .................................................................................................................. 48
7.21. D
EEP
P
OWER
-D
OWN
(DP) (B9H) .......................................................................................................... 48
7.22. R
EAD
U
NIQUE
ID (4BH) ........................................................................................................................ 49
7.23. E
NTER
4-B
YTE
A
DDRESS
M
ODE
(B7H) .................................................................................................. 50
7.24. E
XIT
4-B
YTE
A
DDRESS
M
ODE
(E9H) ..................................................................................................... 50
7.25. C
LEAR
SR F
LAGS
(30H) ....................................................................................................................... 51
7.26. R
ELEASE FROM
D
EEP
P
OWER
-D
OWN AND
R
EAD
D
EVICE
ID (RDI) (ABH) ............................................... 51
7.27. R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID (REMS) (90H) .............................................................................. 52
7.28. R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID D
UAL
I/O (92H) ............................................................................. 53
7.29. R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID Q
UAD
I/O (94H)............................................................................. 54
7.30. R
EAD
I
DENTIFICATION
(RDID) (9FH) ..................................................................................................... 55
2
3.3V Uniform Sector
Dual and Quad Serial Flash
GD25Q256D
7.31. P
ROGRAM
/E
RASE
S
USPEND
(PES) (75H) .............................................................................................. 56
7.32. P
ROGRAM
/E
RASE
R
ESUME
(PER) (7AH)............................................................................................... 57
7.33. E
RASE
S
ECURITY
R
EGISTERS
(44H) ...................................................................................................... 58
7.34. P
ROGRAM
S
ECURITY
R
EGISTERS
(42H) ................................................................................................. 59
7.35. R
EAD
S
ECURITY
R
EGISTERS
(48H)........................................................................................................ 60
7.36. E
NABLE
R
ESET
(66H)
AND
R
ESET
(99H) ............................................................................................... 61
7.37. R
EAD
S
ERIAL
F
LASH
D
ISCOVERABLE
P
ARAMETER
(5AH) ........................................................................ 61
8.
ELECTRICAL CHARACTERISTICS ......................................................................................................... 71
8.1.
8.2.
8.3.
8.4.
8.5.
8.6.
9.
POWER-ON TIMING .......................................................................................................................... 71
INITIAL DELIVERY STATE................................................................................................................. 71
ABSOLUTE MAXIMUM RATINGS ..................................................................................................... 71
CAPACITANCE MEASUREMENT CONDITIONS .............................................................................. 72
DC CHARACTERISTICS .................................................................................................................... 73
AC CHARACTERISTICS .................................................................................................................... 76
ORDERING INFORMATION ...................................................................................................................... 83
9.1.
V
ALID
P
ART
N
UMBERS
.......................................................................................................................... 84
PACKAGE INFORMATION .................................................................................................................... 85
10.
10.1. P
ACKAGE
SOP16 300MIL .................................................................................................................... 85
10.2. P
ACKAGE
WSON8 (8*6
MM
) .................................................................................................................. 86
10.3. P
ACKAGE
TFBGA-24BALL (5*5
BALL ARRAY
) ....................................................................................... 87
11.
REVISION HISTORY.............................................................................................................................. 88
3
3.3V Uniform Sector
Dual and Quad Serial Flash
1. FEATURES
◆
GD25Q256D
256M-bit Serial Flash
- 256 Bytes per programmable page
◆
Fast Program/Erase Speed
-Page Program time: 0.4ms typical
-Sector Erase time: 70ms typical
◆
Standard, Dual, Quad SPI
- Standard SPI: SCLK, CS#, SI, SO,WP#, HOLD#/RESET#
- Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#/RESET#
- Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
- 3 or 4-Byte Addressing Mode
◆
-Block Erase time: 0.16/0.22s typical
-Chip Erase time: 70s typical
Flexible Architecture
-Uniform Sectors of 4K-Byte
-Uniform Blocks of 32/64K-Byte
◆
High Speed Clock Frequency
-Maximum 104MHz for fast read on 3.0 - 3.6V power supply
◆
◆
◆
◆
Dual I/O Data transfer up to 208Mbits/s
Quad I/O Data transfer up to 416Mbits/s
◆
Low Power Consumption
- 1uA typical deep power down current
- 12uA typical standby current
-Maximum 80MHz for fast read on 2.7 - 3.6V power supply
Dual I/O Data transfer up to 160Mbits/s
Quad I/O Data transfer up to 320Mbits/s
◆
Advanced Security Features
-3*2048-Byte Security Registers With OTP Locks
◆
Software Write Protection
-Write protect all/portion of memory via software
-Top/Bottom Block protection
◆
-128-bit Unique ID
-Serial Flash Discoverable parameters (SFDP) register
Single Power Supply Voltage
-Full voltage range:2.7 - 3.6V
◆
Allows XIP(execute in place) Operation
-Continuous Read With 8/16/32/64-Byte Wrap
◆
Package Information
-SOP16 (300mil)
-WSON8 (8*6mm)
-TFBGA-24 (5*5 ball array)
◆
Cycling Endurance and Data Retention
-Minimum 100,000 Program/Erase Cycles
-20-year data retention typical
4
3.3V Uniform Sector
Dual and Quad Serial Flash
2. GENERAL DESCRIPTION
GD25Q256D
The GD25Q256D (256M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the
Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), and I/O3 (HOLD#/ RESET#) .
The Dual I/O data is transferred with speed of 208Mbits/s and the Quad I/O & Quad output data is transferred with speed
of 416Mbits/s.
CONNECTION DIAGRAM
Figure 1 Connection Diagram
HOLD#/
RESET#
(IO3)
Top View
1
2
16
15
SCLK
SI
(IO0)
A2
NC
VCC
A3
NC
A4
NC
(1)
A5
NC
NC
(1)
3
4
Top View
5
6
14
13
12
11
NC
NC
NC
NC
B1
NC
B2
SCLK
B3
VSS
B4
VCC
B5
NC
NC
NC
NC
C1
NC
C2
CS#
C3
NC
C4
WP#
(IO2)
C5
NC
D1
NC
D2
E2
NC
D3
E3
NC
D4
HOLD#/
RESET#
(IO3)
D5
NC
SO(IO1) SI(IO0)
CS#
SO
(IO1)
7
8
16-LEAD SOP
10
9
VSS
WP#
(IO2)
E1
NC
E4
NC
E5
NC
24-BALL TFBGA (5x5 ball array)
CS#
SO
(IO1)
WP#
(IO2)
1
2
Top View
3
8
VCC
HOLD#/
7 RESET#
(IO3)
6 SCLK
5
SI
(IO0)
VSS 4
8–LEAD WSON
Note:
1.
Only for special order, Pin 3 of 16-LEAD SOP package or Pin A4 of 24-BALL TFBGA (5x5 ball array) package is
RESET# pin. Please contact GigaDevice for detail.
CS# must be driven high if chip is not selected. Please don’t leave CS# floating any time after power is on.
2.
5