AD50N06S
N-Channel Enhancement Mode Power MOSFET
Product Summary
V
(BR)DSS
60V
R
DS(on)MAX
20mΩ@10V
I
D
50A
Feature
High density cell design for ultra low Rdson
Fully characterized avalanche voltage and current
Good stability and uniformity with high E
AS
Excellent package for good heat dissipation
Application
Power switching application
Hard switched and high frequency circuits
Uninterruptible power supply
Package
Circuit diagram
TO-252AB
Marking
D50N06
XXXXX
Page 1
Document ID
AS-3150114
Issued Date
2003/03/08
Revised Date
2012/05/16
Revision
D
Page.
6
AD50N06S
N-Channel Enhancement Mode Power MOSFET
Absolute maximum ratings (Ta=25℃ unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Power Dissipation
Thermal Resistance,Junction-to-Case
Single pulse avalanche energy
Junction Temperature
Storage Temperature
Symbol
V
DS
V
GS
I
D
I
DM
P
D
R
θJC
E
AS
T
J
T
STG
Value
60
±20
50
200
85
1.8
300
150
-55 ~ +150
Unit
V
V
A
A
W
/W
Electrical characteristics (T
A
=25
o
C, unless otherwise noted)
Parameter
Static Characteristics
Drain-source breakdown voltage
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Drain-source on-resistance
Forward transconductance
Dynamic characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Source-Drain Diode characteristics
Diode Forward Current
Diode Forward voltage
Reverse Recovery Time
Reverse Recovery Charge
Notes:
1)
2)
Pulse Test: Pulse Width < 300µs, Duty Cycle ≤2%.
Guaranteed by design, not subject to production testing.
Symbol
Test Condition
Min.
Typ.
Max.
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
V
GS
= 0V, I
D
=250µA
V
DS
=60V,V
GS
= 0V
V
GS
=±20V, V
DS
= 0V
V
DS
=V
GS
, I
D
=250µA
V
GS
=10V, I
D
=20A
V
DS
=5V, I
D
=20A
60
1
±100
1.4
2.5
20.5
18
1)
R
DS(on)
g
FS
1)
2)
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
1)
2053
V
DS
=30V,V
GS
=0V,f =1MHz
159
120
50
V
DS
=30V,V
GS
=10V,ID =20A
6
15
7.4
V
DD
=30V,V
GS
=10V,
R
L
=6.7Ω,R
GEN
=3Ω
5.1
28.3
5.5
nS
nC
pF
I
S
V
DS
t
rr
Q
rr
V
GS
=0V, I
S
=20A
TJ = 25°C, IF =20A
1)
di/dt = 100A/μs
28
40
50
1.2
Page 2
Document ID
AS-3150114
Issued Date
2003/03/08
Revised Date
2012/05/16
℃
℃
Unit
V
µA
nA
V
mΩ
S
A
V
nS
nC
Revision
D
Page.
6
℃
mJ
AD50N06S
N-Channel Enhancement Mode Power MOSFET
Test Circuit
1) E
AS
test Circuit
2) Gate charge test Circuit
3) Switch Time Test Circuit
Page 3
Document ID
AS-3150114
Issued Date
2003/03/08
Revised Date
2012/05/16
Revision
D
Page.
6
综合技术交流
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
