ESMT
Flash
1. FEATURES
Single supply voltage 2.7V-3.6V
Fast access time: 70/90 ns
4,194,304x8 / 2,097,152x16 switchable by
BYTE
pin
Compatible with JEDEC standard
- Pin-out, packages and software commands compatible with
single-power supply Flash
Low power consumption
- 20mA typical active current
- 25uA typical standby current
100,000 program/erase cycles typically
20 Years Data Retention
Command register architecture
- Byte Word Programming (9μs/11μs typical)
- Byte Mode : eight 8KB, sixty three 64KB sectors.
- Word Mode : eight 4K word, sixty-three 32 K word sectors.
Auto Erase (chip & sector) and Auto Program
- Any combination of sectors can be erased concurrently;
Chip erase also provided.
- Automatically program and verify data at specified address
Erase Suspend/Erase Resume
- Suspend or Resume erasing sectors to allow the
read/program in another sector
Secured Silicon Sector
- 128word sector for permanent, secure identification through
an 8- word random Electronic Serial Number
- May be programmed and locked at the factory or by the
customer
- Accessible through a command sequence.
F49L320UA/F49L320BA
Operation Temperature Condition -40
°
C~85
°
C
32 Mbit (4M x 8/2M x 16)
3V Only CMOS Flash Memory
Ready/Busy (RY/
BY
)
- RY/
BY
output pin for detection of program or erase operation
completion
End of program or erase detection
- Data polling
- Toggle bits
Hardware reset
- Hardware pin (
RESET
) resets the internal state machine to
the read mode
Sector Protection /Unprotection
- Hardware Protect/Unprotect any combination of sectors from
a program or erase operation.
Low V
CC
Write inhibit is equal to or less than 2.0V
Boot Sector Architecture
- U = Upper Boot Block
- B = Bottom Boot Block
Packages available:
- 48-pin TSOPI
-
All Pb-free products are RoHS-Compliant
CFI (Common Flash Interface) complaint
- Provides device-specific information to the system, allowing
host software to easily reconfigure to different Flash devices.
-
-
2. ORDERING INFORMATION
Part No
F49L320UA-70TIG
F49L320BA-70TIG
Boot
Upper
Bottom
Speed Package Comments
Part No
70 ns
TSOPI
Pb-free
F49L320UA-90TIG
70 ns
TSOPI
Pb-free
F49L320BA-90TIG
Boot
Upper
Bottom
Speed
90 ns
90 ns
Package
TSOPI
TSOPI
Comments
Pb-free
Pb-free
3. GENERAL DESCRIPTION
The F49L320UA/F49L320BA is a 32 Megabit, 3V only CMOS
Flash memory device organized as 4M bytes of 8 bits or 2M
words of 16bits. This device is packaged in standard 48-pin
TSOP. It is designed to be programmed and erased both in
system and can in standard EPROM programmers.
With access times of 70 ns and 90 ns, the
F49L320UA/F49L320BA allows the operation of high-speed
microprocessors. The device has separate chip enable
CE
, write
enable
WE
, and output enable
OE
controls. ESMT’s memory
devices reliably store memory data even after 100,000 program
and erase cycles.
The F49L320UA/F49L320BA is entirely pin and command set
compatible with the JEDEC standard for 32 Megabit Flash
memory devices. Commands are written to
The F49L320UA/F49L320BA features a sector erase architecture.
The device array is divided into eight 8KB, sixty-three 64KB for
byte mode. The device memory array is divided into eight 4K
word, sixty-three 32K word sectors for word mode. Sectors can
be erased individually or in groups without affecting the data in
other sectors. Multiple-sector erase and whole chip erase
capabilities provide the flexibility to revise the data in the
device.
The sector protect/unprotect feature disables both program and
erase operations in any combination of the sectors of the
memory. This can be achieved in-system or via programming
equipment.
A low V
CC
detector inhibits write operations on loss of power.
End of program or erase is detected by the Ready/Busy status
pin, Data Polling of DQ7, or by the Toggle Bit I feature on DQ6.
Once the program or erase cycle has been successfully
completed, the device internally resets to the Read mode. The
command register using standard microprocessor write
timings.
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2008
Revision: 1.1
1/55
ESMT
4. PIN CONFIGURATIONS
4.1 48-pin TSOP
F49L320UA/F49L320BA
Operation Temperature Condition -40
°
C~85
°
C
4.2
Pin Description
Pin Name
Address Input
Data Input/Output
Q15 (Word mode) /
LSB addr (Byte Mode)
Chip Enable
Output Enable
Write Enable
Reset
Word/Byte selection input
Ready/Busy
Power Supply
Ground
No connection
Functions
To provide memory addresses.
To output data when Read and receive data when Write.
The outputs are in tri-state when OE or CE is high.
To bi-direction date I/O when
BYTE
is High
To input address when
BYTE
is Low
To activate the device when CE is low.
To gate the data output buffers.
To control the Write operations.
Hardware Reset Pin/Sector Protect Unprotect
To select word mode or byte mode
To check device operation status
To provide power
Symbol
A0~A20
DQ0~DQ14
DQ15/A-1
CE
OE
WE
RESET
BYTE
RY/
BY
V
CC
GND
NC
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2008
Revision: 1.1
2/55
微控制器 MCU
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