Liteon Semiconductor Corporation
LSP2130
300mA High PSRR Low Dropout CMOS Linear Regulator
FEATURES
Low dropout voltage: 180mV at 300mA (Vo=3.3V)
Quiescent current: Typ. 65µA
2% Voltage Accuracy
High PSRR: 70dB at 1KHz
Thermal Shutdown
Current Limiting
Excellent line and load regulation
Fast response
Short circuit protection
Low temperature coefficient
Space saving SOT23-3L, SC70-3L package
GENERAL DESCRIPTION
The LSP2130 series of positive voltage linear
regulators feature low quiescent current (Typ. 65µA)
and low dropout voltage, making them ideal for battery
powered applications. Their high PSRR make them
useful in applications where AC noise on the input
power supply must be suppressed. Space saving
SOT23-3L, SC70-3L package is attractive for portable
and handheld applications. They have both thermal
shutdown and a current limit feature to prevent device
failure from extreme operating conditions. They are
stable with an output capacitor of 2.2µF or greater.
APPLICATIONS
Cordless phones
Cellular phones
Bluetooth earphones
Digital Cameras
Portable electronics
WLANs
MP3 players
PIN CONFIGURATION
SOT23-3L(Top View)
SC70-3L(Top View)
PIN DESCRIPTION
Pin Number
1
2
3
Pin Name
GND
VOUT
VIN
Pin Function
Ground
Output
Input
BLOCK DIAGRAM
1/12
Rev1.1
Liteon Semiconductor Corporation
LSP2130
300mA High PSRR Low Dropout CMOS Linear Regulator
(V
IN
= V
O
+ 1V, C
IN
= 1µF, C
O
= 2.2µF, T
A
= 25
°
C unless otherwise specified.)
PARAMETER
Input Voltage
Output Voltage Accuracy
Output Current
Ground Current
Quiescent Current
SYMBOL
V
IN
V
O
I
O
I
GND
I
Q
TEST CONDITIONS
I
O
= 1mA
I
O
= 1mA to 300mA
I
O
= 0mA
I
O
= 1mA, V
O
<
2V
V
IN
=2.8V to 3.8V
I
O
= 1mA, 2≤ V
O
<
3.3V
V
IN
=V
O
+ 0.5V to V
O
+ 1V
I
O
= 1mA, V
O
≥3.3V
V
IN
=V
O
+ 0.5V to V
O
+ 1V
I
O
= 1mA to 300mA
I
O
= 1mA
I
O
= 1mA
I
O
= 1mA
I
O
= 100mA
f=100Hz
C
BYP
= 10nF
f= 1KHz
V
o
=1.8V
f= 10KHz
I
O
= 100mA
V
o
=1.8V
f=100Hz
f= 1KHz
f= 10KHz
V
O
≤
1.8V
2.5
≤
V
O
<
3.3V
V
O
≥
3.3V
MIN
Note1
-2
300
70
65
-0.15
-0.1
-0.4
-1
0.1
0.03
0.2
0.2
40
150
30
70
70
50
70
60
40
850
370
180
50
TYP
MAX
5.5
+2
Note2
90
90
0.15
0.1
0.4
1
%
ppm/°C
°C
°C
%/V
UNIT
V
%
mA
µA
µA
ELECTRICAL CHARACTERISTICS
Line Regulation
LNR
Load Regulation Error
Temperature Coefficient
Over Temperature Shutdown
Over Temperature Hystersis
Power Supply Ripple Rejection
(with bypass Cap.)
Power Supply Ripple Rejection
(without bypass Cap.)
LDR
T
C
OTS
OTH
PSRR
dB
PSRR
Dropout Voltage
Output Noise
V
DO
V
n
I
O
= 300mA
1100
450
230
mV
µV
RMS
C
BYP
=10nF, f = 10Hz to 100kHz
Note 1：The minimum input voltage of the LSP2130 is determined by output voltage and dropout voltage. The
minimum input voltage is defined as:
V
IN(MIN)
=V
O
+V
DROP
Note 2：Output current is limited by P
D
, maximum I
O
=P
D
/(V
IN(MAX)
-V
O
)
3/12
Rev1.1
Liteon Semiconductor Corporation
LSP2130
300mA High PSRR Low Dropout CMOS Linear Regulator
APPLICATION INFORMATION
Capacitor Selection and Regulator Stability
Similar to any low dropout regulator, the external capacitors used with the LSP2130 must be carefully selected for
regulator stability and performance.
Using a capacitor, C
IN
, whose value is
＞1μF
at the LSP2130 input pin, the amount of the capacitance can be
increased without limit. Please note that the distance between C
IN
and the input pin of the LSP2130 should not
exceed 0.5 inch. Ceramic capacitors are suitable for the LSP2130. Capacitors with larger values and lower ESR
provide better PSRR and line-transient response.
The LSP2130 is designed specifically to work with low ESR ceramic output capacitors in order to save space and
improve performance. Using an output ceramic capacitor whose value is
＞2.2μF
with ESR＞5mΩ ensure stability.
A 10nF bypass capacitor connected to BYP pin is suggested for suppressing output noise. The capacitor, in series
connection with an internal 200kΩ resistor, forms a low-pass filter for noise reduction. Increasing the capacitance will
slightly decrease the output noise, but increase the start-up time.
Load Transient Considerations
The figure11 shows the LSP2130 load transient response. It shows two components the output response: a DC shift
from the output impedance due to the load current change and transient response. The DC shift is quite small due to
excellent load regulation of the LSP2130. The transient spike, resulting from a step change in the load current from
1mA to 300mA, is 20mV. The ESR of the output capacitor is critical to the transient spike. A larger capacitance along
with smaller ESR results in a smaller spike.
Internal P-Channel Pass Transistor
The LSP2130 features a 0.75Ω P-Channel MOSFET device as a pass transistor. The P-MOS pass transistor
enables the LSP2130 to consume only 65μA of ground current during low dropout, light load, or heavy load
operations. This feature increases the battery operation life time.
Dropout Voltage
A regulator’s minimum dropout voltage determines the lowest usable supply voltage. The LSP2130 has a typical
300mV dropout voltage. In battery powered systems, this will determine the useful end-of-life battery voltage.
Current Limit and Short Circuit Protection
The LSP2130 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output
current can be limited to 400mA by regulating the gate voltage. The LSP2130 also has a built-in short circuit current
limit.
Thermal Considerations
Thermal protection limits power dissipation in the LSP2130. When the junction temperature exceeds 150℃, the OTP
(Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor
resumes operation after the junction temperature drops below 120℃.
For continuous operation, the junction temperature should be maintained below 125℃. The power dissipation is
defined as :
P
D
=(V
IN
-V
OUT
)*I
O
+V
IN
*I
GND
The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of
surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can
be calculated by the following formula:
P
D(MAX)
=(T
J(MAX)
-T
A
)/θ
JA
Where T
J(MAX)
is the maximum allowable junction temperature 125℃. T
A
is the ambient temperature and
θ
JA
is the
thermal resistance from the junction to the ambient.
For example,
θ
JA
is 250℃/W for the SOT23-3L package, based on the standard JEDEC 51-3 for a single layer
thermal test board. The maximum power dissipation at T
A
=25℃ can be calculated by the following formula:
P
D(MAX)
= (125℃-25℃)/250=0.4W
It is also useful to calculated the junction temperature of the LSP2130 under a set of specific conditions. In this
example let the input voltage V
IN
=3.3V, the output current I
O
=300mA and the case temperature T
A
=40℃ measured
by a thermal couple during operation. The power dissipation for the V
O
=2.8V version of the LSP2130 can be
calculated as:
P
D
=(3.3V-2.8V)*300mA+3.3V*70μA 150mW
And the junction temperature, T
J
, can be calculated as follows:
T
J
=T
A
+P
D
*θ
JA
T
J
=40℃+0.15W*250℃/W
4/12
Rev1.1
嵌入式系统
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