UTRON
Rev. 1.5
UT62L25616(I)
256K X 16 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION
Preliminary Rev. 0.5 Original.
DESCRIPTION
Release Date
Mar, 2001
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Rev. 1.5
1. The symbols CE# and OE# and WE# are revised as. CE and
OE and
WE
.
2. Separate Industrial and Consumer SPEC.
3. Add access time 55ns range.
4. The power supply is revised: 3.3V 3.6V
1. Revised PIN CONFIGURATION
Rev 1.0 : No A17 pin typing error
Rev 1.1 : add A17 pin.
a. TFBGA package :
ball D3 : NC A17
b. TSOP
Ⅱ
package :
pin18 : A16 A17
pin19 : A15 A16
pin20 : A14 A15
pin21 : A13 A14
pin22 : A12 A13
pin23 : NC A12
1. Revised AC ELECTRICAL CHARACTERISTICS
t
OH
: 5ns 10ns (Min.)
t
BLZ
: 0ns 10ns (Min.)
2. Revised FUNCTIONAL BLOCK DIAGRAM
1. Revised DC ELECTRICAL CHARACTERISTICS：
Revised V
IH
as 2.2V
2. Revised 48-pin TFBGA package outline dimension：
Rev. 1.2 : ball diameter=0.3mm
Rev. 1.3 : ball diameter=0.35mm
1. Revised Standby current (LL-Version) : 3uA(typ) 2uA(typ)
2. Revised operating current (Iccmax) : 45/35/25mA 40/30/25mA
3. Revised DC CHARACTERISTICS :
a. Operating Power Supply Current (Icc)
55ns (max) : 45 40mA
70ns (typ) : 25 20mA, 70ns (max) : 35 30mA
100ns (Typ) : 20 16mA
b. Standby current(CMOS) :
LL-version (typ) : 3 2uA, 25 20uA
1. Revised V
OH
(Typ) : NA 2.7V
2. Add V
IH
(max)=V
CC
+2.0V for pulse width less than 10ns.
V
IL
(min)=V
SS
-2.0V for pulse width less than 10ns.
3. Add order information for lead free product
Jul 4,2001
Oct 18,2001
Mar 19,2002
Apr 17,2002
Dec 18,2002
May 06,2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80054
1
UTRON
Rev. 1.5
UT62L25616(I)
256K X 16 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The UT62L25616(I) is a 4,194,304-bit low power
CMOS static random access memory organized as
262,144 words by 16 bits.
The UT62L25616(I) operates from a single 2.7V ~
3.6V power supply and all inputs and outputs are fully
TTL compatible.
The UT62L25616(I) is designed for low power system
applications.
FEATURES
Fast access time : 55/70/100ns
CMOS Low power operating
Operating current: 40/30mA (Icc max.)
Standby current: 20uA (typ.) L-version
2uA (typ.) LL-version
Single 2.7V~3.6V power supply
Operating temperature:
Industrial : -40
℃
~85
℃
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage : 1.5V (min)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 44-pin 400mil TSOP-
Ⅱ
48-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
256K
×
16
MEMORY
ARRAY
A0-A17
DECODER
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O9-I/O16
Upper Byte
I/O DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80054
2
UTRON
Rev. 1.5
UT62L25616(I)
256K X 16 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
A12
H
NC
A8
A9
A10
A11
NC
F
E
A
LB
OE
A0
A1
A2
NC
B
I/O9
UB
A3
A4
CE
I/O1
C
I/O10
I/O11
A5
A6
I/O2
I/O3
D
Vss
I/O12
A17
A7
I/O4
Vcc
Vcc
I/O13
NC
A16
I/O5
Vss
I/O15
I/O14
A14
A15
I/O6
I/O7
G
I/O16
NC
A12
A13
WE
I/O8
1
2
3
4
5
6
TFBGA
PIN DESCRIPTION
SYMBOL
A0 - A17
I/O1 - I/O16
CE
WE
OE
LB
UB
V
CC
V
SS
NC
TSOP II
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower Byte Control
Upper Byte Control
Power Supply
Ground
No Connection
TRUTH TABLE
MODE
Standby
Output Disable
Read
CE
OE
X
X
H
H
L
L
L
X
X
X
WE
LB
UB
X
H
X
L
H
L
L
H
L
L
Write
H
X
L
L
L
L
L
L
L
L
X
X
H
H
H
H
H
L
L
L
X
H
L
X
L
H
L
L
H
L
I/O OPERATION
I/O1-I/O8
I/O9-I/O16
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
D
OUT
High – Z
High – Z
D
OUT
D
OUT
D
OUT
D
IN
High – Z
High – Z
D
IN
D
IN
D
IN
SUPPLY CURRENT
I
SB
, I
SB1
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
Note: H = V
IH
, L=V
IL
, X = Don't care.
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80054
3
UTRON
Rev. 1.5
UT62L25616(I)
256K X 16 BIT LOW POWER CMOS SRAM
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Operating Temperature
Industrial
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 secs)
SYMBOL
V
TERM
T
A
T
STG
P
D
I
OUT
Tsolder
RATING
-0.5 to 4.6
-40 to 85
-65 to 150
1
50
260
UNIT
V
℃
℃
W
mA
℃
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.7V~3.6V, T
A
= -40
℃
to 85
℃
(I))
PARAMETER
SYMBOL
TEST CONDITION
Power Voltage
V
CC
*1
Input High Voltage
V
IH
*2
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
SS
≦
V
IN
≦
V
CC
Output Leakage Current
I
LO
V
SS
≦
V
I/O
≦
V
CC;
Output Disable
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2.1mA
Cycle time=min, 100%duty
Operating Power
I
CC
I
I/O
=0mA, CE =V
IL
Supply Current
Average Operation
Current
Standby Current (TTL)
Standby Current (CMOS)
I
CC1
I
CC2
I
SB
I
SB1
CE =V
IH,
other pins =V
IL
or V
IH
CE =V
CC
-0.2V
other pins at 0.2V or Vcc-0.2V
100%duty,I
I/O
=0mA, CE
≦
0.2V,
other pins at 0.2V or Vcc-0.2V
MIN. TYP. MAX. UNIT
2.7 3.0
3.6
V
2.2
-
V
CC
+0.3
V
-0.2
-
0.6
V
-1
-
1
µA
-1
-
1
µA
2.2 2.7
-
V
-
-
0.4
V
-
30
40
mA
-
20
30
mA
-
16
25
mA
-
-
-
-
-
4
8
0.3
20
2
5
10
0.5
80
20
mA
mA
mA
µA
µA
55
70
100
Tcycle=
1µs
Tcycle=
500ns
-L
-LL
Notes:
1. Overshoot : Vcc+2.0v for pulse width less than 10ns.
2. Undershoot : Vss-2.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80054
4
UTRON
Rev. 1.5
UT62L25616(I)
256K X 16 BIT LOW POWER CMOS SRAM
CAPACITANCE
(T
A
=25
℃
, f=1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
C
L
= 30pF, I
OH
/I
OL
= -1mA / 2.1mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
=2.7V~3.6V, T
A
= -40
℃
to 85
℃
(I))
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
LB
,
UB
Access Time
LB
,
UB
to High-Z Output
LB
,
UB
to Low-Z Output
SYMBOL
t
RC
t
AA
t
ACE
t
OE
t
CLZ*
t
OLZ*
t
CHZ*
t
OHZ*
t
OH
t
BA
t
BHZ
t
BLZ
UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100
UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
55
-
70
-
100
-
ns
-
55
-
70
-
100
ns
-
55
-
70
-
100
ns
-
30
-
35
-
50
ns
10
-
10
-
10
-
ns
5
-
5
-
5
-
ns
-
20
-
25
-
30
ns
-
20
-
25
-
30
ns
10
-
10
-
10
-
ns
-
55
-
70
-
100
ns
-
25
-
30
-
40
ns
10
-
10
-
10
-
ns
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
SYMBOL
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW*
t
WHZ*
t
BW
LB
,
UB
Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100
UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
55
-
70
-
100
-
ns
50
-
60
-
80
-
ns
50
-
60
-
80
-
ns
0
-
0
-
0
-
ns
45
-
55
-
70
-
ns
0
-
0
-
0
-
ns
25
-
30
-
40
-
ns
0
-
0
-
0
-
ns
5
-
5
-
5
-
ns
-
30
-
30
-
40
ns
45
-
60
-
80
-
ns
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80054
5
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