GT25C256
Advanced
GT25C256
SPI
256K Bits
Serial EEPROM
Copyright © 2011 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time without
notice. Giantec products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment,
aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance
and optimization on the functionality and etc. Giantec assumes no liability arising out of the application or use of any information, products or services described herein. Customers
are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products
Giantec Semiconductor, Inc.
A0
www.giantec-semi.com
1/22
GT25C256
Table of Contents
1.
2.
3.
4.
Features
.....................................................................................................................................................................
3
General Description
.............................................................................................................................................
3
Functional Block Diagram
................................................................................................................................
4
Pin Configuration...................................................................................................................................................
5
4.1 8-Pin SOIC/SOP and TSSOP ................................................................................................................. 5
4.2 8-Lead UDFN .......................................................................................................................................... 5
4.3 Pin Definition ........................................................................................................................................... 5
4.4 Pin Descriptions ...................................................................................................................................... 5
5. Device Operation
...................................................................................................................................................
6
5.1 Status Register........................................................................................................................................ 6
5.2 Op-Code Instructions .............................................................................................................................. 7
5.3 Write Enable............................................................................................................................................ 7
5.4 Write Disable ........................................................................................................................................... 7
5.5 Read Status Register .............................................................................................................................. 7
5.6 Write Status Register .............................................................................................................................. 8
5.7 Read Data ............................................................................................................................................... 8
5.8 Write Data ............................................................................................................................................... 8
5.9 Read Identification Page ......................................................................................................................... 8
5.10 Write Identification Page ....................................................................................................................... 8
5.11 Read Lock Status .................................................................................................................................. 9
5.12 Lock ID .................................................................................................................................................. 9
5.13. Diagrams ............................................................................................................................................ 10
6. Electrical Characteristics
..............................................................................................................................
14
6.1 Absolute Maximum Ratings .................................................................................................................. 14
6.2 Operating Range................................................................................................................................... 14
6.3 Capacitance .......................................................................................................................................... 14
6.4 DC Electrical Characteristic .................................................................................................................. 15
6.5 AC Electrical Characteristic .................................................................................................................. 16
7. Ordering Information
.........................................................................................................................................
17
8. Top Markings
.........................................................................................................................................................
18
8.1 SOIC/SOP Package.............................................................................................................................. 18
8.2 TSSOP Package ................................................................................................................................... 18
8.3 UDFN Package ..................................................................................................................................... 18
9. Package Information
.........................................................................................................................................
19
9.1 SOIC/SOP ............................................................................................................................................. 19
9.2 TSSOP .................................................................................................................................................. 20
9.3 UDFN .................................................................................................................................................... 21
10. Revision History
................................................................................................................................................
22
Giantec Semiconductor, Inc.
A0
www.giantec-semi.com
2/22
GT25C256
1. Features
Serial Peripheral Interface (SPI) Compatible
—
Supports Mode 0 (0,0) and Mode 3 (1,1)
Wide-voltage Operation
—
V
CC
= 1.7V to 5.5V
Low power CMOS
—
Standby current: ≤1 μA (1.7V)
—
Operating current: ≤2 mA (1.7V)
Operating frequency: 20 MHz (5.5V)
Memory organization: 256Kb (32,768 x 8)
Byte and Page write (up to 64 bytes)
—
Partial page write allowed
Block Write Protection
—
Protect 1/4, 1/2, or Entire Array
Self timed write cycle: 5 ms (max.)
Additional Write lockable Page (Identification
page)
High-reliability
—
Endurance: 1 million cycles
—
Data retention: 100 years
Industrial temperature grade
Packages (8-pin): SOIC/SOP, TSSOP and UDFN
Lead-free, RoHS, Halogen free, Green
2. General Description
The GT25C256 is an industrial standard electrically
erasable programmable read only memory (EEPROM)
product that utilizes standard Serial Peripheral Interface
(SPI) for communications. The GT25C256 contains a
memory array of 256K bits (32,768x 8), which is organized
in 64 bytes per page.
This EEPROM operates in a wide voltage range from 1.7V
to 5.5V, which fits most application. The device provides
low-power operations and low standby current. The product
is offered in Lead-free, RoHS, halogen free or Green
package. The available package types are 8-pin SOIC/SOP,
TSSOP and UDFN.
The functionalities of the GT25C256 are optimized for most
applications, such as consumer electronics, wireless,
telecommunication, industrial, medical, instrumentation,
commercial and others, where low-power and low-voltage
are vital. This product has a compatible SPI interface:
Chip-Select (
CS
), Serial Data In (SI), Serial Data Out (SO)
and Serial Clock (SCK) for high-speed communication.
Furthermore, a Hold feature via
HOLD
pin allows the
device
entering
into
a
suspended
state
whenever
necessary and resuming the communication without
re-initializing the serial sequence. A Status Register
facilitates a flexible write protection mechanism and device
.
status monitoring. The GT25C256 also offers an additional
page, named the Identification Page (64 bytes) which can
be written and (later) permanently locked in Read-only
mode. This Identification Page offers flexibility in the
application board production line, as the Identification Page
can be used to store unique identification parameters
and/or parameters specific to the production line.
In order to refrain the state machine from entering into a
wrong state during power-up sequence or a power toggle
off-on condition, a power on reset circuit is implemented.
During power-up, the device does not respond to any
instructions until the supply voltage (V
CC
) has reached an
acceptable stable level above the reset threshold voltage.
Once V
CC
passes the power on reset threshold, the device
is reset and enters into Standby mode. This should also
avoid any inadvertent Write operations during power-up
stage. During power-down process, the device will enter
into standby mode, once V
CC
drops below the power on
reset threshold voltage. In addition, the device will be in
standby mode after receiving the Stop command, provided
that no internal write operation is in progress. Nevertheless,
it is illegal to send a command unless the V
CC
is within its
operating level.
Giantec Semiconductor, Inc.
A0
www.giantec-semi.com
3/22
GT25C256
3. Functional Block Diagram
VCC
GND
STATUS
REGISTER
MEMORY ARRAY
DATA REGISTER
SI
ADDRESS
DECODER
CS
WP
MODE DECODE
LOGIC
OUTPUT
BUFFER
SCK
CLOCK
HOLD
SO
Serial Interface Description
Master:
Slave:
Transmitter/Receiver:
MSB
Op-Code:
The device that provides a clock signal.
GT25C256.
The GT25C256 has both data input (SI) and data output (SO).
MSB (Most Significant Bit) is the first bit being transmitted or received.
Operational instruction code typically sent to the GT25C256 is the first byte of information
transmitted after
CS
is Low. If the Op-Code is a valid instruction as listed in Table 5.3, then it will be
decoded appropriately. It is prohibited to send an invalid Op-Code.
Giantec Semiconductor, Inc.
A0
www.giantec-semi.com
4/22
GT25C256
4. Pin Configuration
4.1 8-Pin SOIC/SOP and TSSOP
Top View
CS
1
SO
2
WP
3
GND
4
8
V
CC
7
HOLD
6
SCK
5
SI
4.2 8-Lead UDFN
Top View
CS
SO
WP
GND
1
2
3
4
8
7
6
5
V
CC
HOLD
SCK
SI
4.3 Pin Definition
Pin No.
1
2
3
4
5
6
7
8
Pin Name
I/O
I
O
I
-
I
I
I
-
Chip Select
Serial Data Output
Write Protect Input
Ground
Serial Data Input
Serial Clock
Hold function
Supply Voltage
Definition
CS
SO
WP
GND
SI
SCK
HOLD
V
CC
4.4 Pin Descriptions
Chip Select (
CS
)
The
CS
pin is used to enable or disable the device. Upon
power-up,
CS
must follow the supply voltage. When the
device is ready for instruction input, this signal requires a
High-to-Low transition. Once
CS
is stable at Low, the
device is enabled. Then the master and slave can
communicate among each other through SCK, SI, and SO
pins. Upon completion of transmission,
CS
must be driven
to High in order to stop the operation or start the internal
write operation. And the device will enter into standby mode,
unless an internal write operation is in progress. During this
mode, SO becomes high impedance.
Serial Clock (SCK)
Under the SPI modes (0, 0) and (1, 1), this clock signal
provides
synchronization
between
the
master
and
Serial Data Input (SI)
Data Input pin.
Serial Data Output (SO)
Data output pin.
Write Protect (
WP
)
This active Low input signal is utilized to initiate Hardware
Write Protection mode. This mode prevents the Block
Protection bits and the WPEN bit in the Status Register from
being modified. To activate the Hardware Write Protection,
WP
must be Low simultaneously when WPEN is set to 1.
Hold (
HOLD
)
This feature is used to suspend the device in the middle of a
serial
sequence
on
and
the
temporarily
bus
(SI,
ignore
SO,
further
The
communication
SCK).
HOLD
signal transitions must occur only when SCK is Low
and be held stable during SCK transitions. Connecting
GT25C256. Typically, Op-Codes, addresses and data are
latched from SI at the rising edge of SCK, while data from
SO are clocked out at the falling edge of SCK.
HOLD
to High disables this feature. Figure. 5-8 shows
Hold timing.
Giantec Semiconductor, Inc.
A0
www.giantec-semi.com
5/22