UTRON
Rev. 1.1
UT62L6416
64K X 16 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION
DESCRIPTION
Preliminary Rev. 0.1 Original.
Rev. 1.0
1.Revised Access time : 55/70/100ns 55/70ns
2.Revised Standby current : Delete 20uA(TYP.) L-version
3.Revised extended temp : -20℃~80℃ -20℃~85℃
4.Revised block diagram
5.Revised DC ELECTRICAL CHARACTERISTICS：
a. 55ns Icc MAX. : 45 35mA
b. 70ns Icc MAX. : 35 25mA
c. 55ns Icc TYP. : 30 25mA
d. 70ns Icc TYP. : 25 20mA
e. I
SB1
of LL-version
Typical : 3uA 2uA
Maximum : 25uA 10uA
6.Revised AC ELECTRICAL CHARACTERISTICS：
a. t
BLZ
: 5ns 10ns (min.)
b. t
OH
: 0ns 10ns (min.)
7.Revised DATA RETENTION CHARACTERISTICS：
a. I
DR
: Typical : 0.5uA 1uA , Maximum : 20uA 6uA
8.Revised 48-pin TFBGA package outline dimension：
a. Rev. 0.1 ball diameter=0.3mm
b. Rev.1.0 ball diameter=0.35mm
Rev. 1.1
Add order information for lead free product
Released Date
Sep 5, 2001
Jul 25, 2002
May 09, 2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80073
1
UTRON
Rev. 1.1
UT62L6416
64K X 16 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The UT62L6416 is a 1,048,576-bit low power CMOS
static random access memory organized as 65,536
words by 16 bits.
The UT62L6416 operates from a single 2.7V ~ 3.6V
power supply and all inputs and outputs are fully TTL
compatible.
The UT62L6416 is design for upper and lower byte
access by data byte control ( UB
LB
).
FEATURES
Fast access time : 55/70ns
CMOS Low power operating
Operating current : 35/25mA (Icc max)
Standby current : 2uA(TYP.) LL-version
Single 2.7V~3.6V power supply
Operating temperature:
Commercial : 0
℃
~70
℃
Extended : -20
℃
~85
℃
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage: 1.5V (min)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 44-pin 400mil TSOP
Ⅱ
48-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
64Kx16
MEMORY
ARRAY
A0-A15
DECODER
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O9-I/O16
Upper Byte
I/O DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
LB
UB
CONTROL
CIRCUIT
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80073
2
UTRON
Rev. 1.1
UT62L6416
64K X 16 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A4
A3
A2
A1
A0
1
2
3
4
5
6
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
A
B
C
D
E
F
G
H
LB
I/O9
I/O10
OE
UB
I/O11
A0
A3
A5
NC
NC
A14
A12
A9
A1
A4
A6
A7
NC
A15
A13
A10
A2
CE
I/O2
I/O4
I/O5
I/O6
NC
I/O1
I/O3
Vcc
Vss
I/O7
I/O8
NC
CE
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
NC
UT62L6416
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Vss
Vcc
I/O15
I/O16
I/O12
I/O13
I/O14
NC
A8
WE
A11
NC
A15
A14
A13
A12
NC
1
2
3
4
5
6
TSOP II
TFBGA
PIN DESCRIPTION
SYMBOL
A0 - A15
I/O1 - I/O16
CE
WE
OE
LB
UB
V
CC
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower-Byte Control
Upper-Byte Control
Power Supply
Ground
No Connection
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80073
3
UTRON
Rev. 1.1
UT62L6416
64K X 16 BIT LOW POWER CMOS SRAM
I/O OPERATION
I/O1-I/O8
I/O9-I/O16
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
D
OUT
High – Z
High – Z
D
OUT
D
OUT
D
OUT
D
IN
High – Z
High – Z
D
IN
D
IN
D
IN
SUPPLY CURRENT
I
SB
, I
SB1
I
SB
, I
SB1
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
TRUTH TABLE
MODE
Standby
Output
Disable
Read
CE
OE
X
X
H
H
L
L
L
X
X
X
WE
LB
UB
X
H
X
L
H
L
L
H
L
L
Write
H
X
L
L
L
L
L
L
L
L
X
X
H
H
H
H
H
L
L
L
X
H
L
X
L
H
L
L
H
L
I
CC
,I
CC1
,I
CC2
Note:
H = V
IH
, L=V
IL
, X = Don't care.
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Commercial
Operating Temperature
Extended
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 secs)
SYMBOL
V
TERM
T
A
T
A
T
STG
P
D
I
OUT
Tsolder
RATING
-0.5 to 4.6
0 to 70
-20 to 85
-65 to 150
1
50
260
UNIT
V
℃
℃
℃
W
mA
℃
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.7V~3.6V, T
A
= 0
℃
to 70
℃
/ -20
℃
to 85
℃
(E))
PARAMETER
Power Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Operating Power
Supply Current
Average Operation
Current
SYMBOL
V
CC
*1
V
IH
*2
V
IL
I
LI
I
LO
V
OH
V
OL
I
CC
Icc1
Icc2
Standby Current (TTL)
I
SB
TEST CONDITION
MIN.
2.7
2.2
-0.2
-1
-1
2.2
-
-
-
-
-
-
-
TYP.
3.0
-
-
-
-
-
-
25
20
4
8
0.3
2
MAX.
3.6
V
CC
+0.3
0.6
1
1
-
0.4
35
25
5
10
0.5
10
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
V
SS
≦
V
IN
≦
V
CC
V
SS
≦
V
I/O
≦
V
CC;
Output Disabled
I
OH
= -1mA
I
OL
= 2.1mA
Cycle time=min, 100%duty,
I/O=0mA,
CE
=V
IL
;
55
70
100%duty, I
I/O
=0mA,
CE
≦
0.2V, Tcycle=
1µs
other pins at 0.2V or Vcc-0.2V,
Tcycle=
500ns
1.
CE
=V
IH,
other pins =V
IL
or V
IH
,
2.
UB
=
LB
= V
IH,
other pins =V
IL
or V
IH
,
-LL
=V
CC
-0.2V,
1.
CE
µA
Standby Current (CMOS)
I
SB1
other pins at 0.2V or Vcc-0.2V,
2.
UB
=
LB
=V
CC
-0.2V,
other pins at 0.2V or Vcc-0.2V,
Notes:
1. Overshoot : Vcc+3.0v for pulse width less than 10ns.
2. Undershoot : Vss-3.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80073
4
UTRON
Rev. 1.1
UT62L6416
64K X 16 BIT LOW POWER CMOS SRAM
CAPACITANCE
(T
A
=25
℃
, f=1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
C
L
= 30pF, I
OH
/I
OL
= -1mA / 2.1mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
=2.7V~3.6V, T
A
=0
℃
to 70
℃
/ -20
℃
to 85
℃
(E))
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
LB
,
UB
Access Time
LB
,
UB
to High-Z Output
LB
,
UB
to Low-Z Output
SYMBOL
UT62L6416-55
UT62L6416-70
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
ACE
t
OE
t
CLZ*
t
OLZ*
t
CHZ*
t
OHZ*
t
OH
t
BA
t
BHZ
t
BLZ
MIN.
55
-
-
-
10
5
-
-
10
-
-
10
MAX.
-
55
55
30
-
-
20
20
-
55
25
-
MIN.
70
-
-
-
10
5
-
-
10
-
-
10
MAX.
-
70
70
35
-
-
25
25
-
70
30
-
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
SYMBOL
UT62L6416-55
UT62L6416-70
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LB
,
UB
Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW*
t
WHZ*
t
BW
MIN.
55
50
50
0
45
0
25
0
5
-
45
MAX.
-
-
-
-
-
-
-
-
-
30
-
MIN.
70
60
60
0
55
0
30
0
5
-
60
MAX.
-
-
-
-
-
-
-
-
-
30
-
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80073
5
创意市集
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
