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TISP4070M3AJ

器件型号:TISP4070M3AJ
器件类别:模拟混合信号IC    触发装置   
厂商名称:Bourns
厂商官网:http://www.bourns.com
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器件描述

395 V, 1.6 A, SILICON SURGE PROTECTOR, DO-214AC

参数
是否无铅含铅
是否Rohs认证不符合
厂商名称Bourns
零件包装代码DO-214AC
包装说明SMALL OUTLINE, R-PDSO-C2
针数2
Reach Compliance Code_compli
ECCN代码EAR99
其他特性UL RECOGNIZED
最大转折电压70 V
配置SINGLE
最大断态直流电压58 V
JEDEC-95代码DO-214AC
JESD-30 代码R-PDSO-C2
JESD-609代码e0
通态非重复峰值电流24 A
元件数量1
端子数量2
最高工作温度150 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)NOT SPECIFIED
认证状态Not Qualified
表面贴装YES
端子面层TIN LEAD
端子形式C BEND
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
触发设备类型SILICON SURGE PROTECTOR

文档预览

TISP4070M3AJ THRU TISP4115M3AJ,
TISP4125M3AJ THRU TISP4220M3AJ,
TISP4240M3AJ THRU TISP4395M3AJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
*R
o
HS
CO
M
PL
IA
N
T
TISP4xxxM3AJ Overvoltage Protector Series
4 kV 10/700, 100 A 5/310 ITU-T K.20/21 rating
SMA (DO-214AC) Package
25% Smaller Placement Area than SMB
Low Differential Capacitance ........................................... 39 pF
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
Device
‘4070
‘4080
‘4090
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4320
‘4350
‘4360
‘4395
V
DRM
V
58
65
68
75
90
100
120
135
145
155
160
180
190
200
220
230
240
275
290
320
V
(BO)
V
70
80
90
95
115
125
145
165
180
200
220
240
250
265
290
300
320
350
360
395
SD4XAA
SMAJ Package (Top View)
R (B)
1
2
T (A)
MDXXCCE
Device Symbol
T
R
T
erminals T and R correspond to the
alternative line designators of A and B
Rated for International Surge Wave Shapes
Wave Shape
2/10
μs
8/20
μs
10/160
μs
10/700
μs
10/560
μs
10/1000
μs
Standard
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
ITU-T K.20/21/45
FCC Part 68
GR-1089-CORE
I
TSP
A
300
220
120
100
75
50
............................................ UL Recognized Components
How To Order
Device
Package
Carrier
Order As
TISP4xxxM3AJR-S
TISP 4xxxM3AJ AJ (J-Bend DO-214AC/SMA) Embossed Tape Reeled
Insert xxx value corresponding to protection voltages of 070, 080, 095, etc.
Description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by a.c. power system or lightning
flash disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is typically used
for the protection of 2-wire telecommunication equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of
devices can be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping until
the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the
current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current helps prevent d.c. latchup as
the diverted current subsides.
WARNING Cancer and Reproductive Harm
www.P65Warnings.ca.gov
AUGUST 2001 - REVISED JANUARY 2007
*RoHS Directive 2002/95/EC Jan. 27, 2003 including Annex.
Specifications are subject to change without notice. Users should verify actual device performance in their specific
applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the
last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
TISP4xxxM3AJ Overvoltage Protector Series
Description (continued)
The TISP4xxxM3AJ range consists of twenty voltage variants to meet various maximum system voltage levels (58 V to 320 V). They are
guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These medium (M) current protection
devices are in a plastic package SMAJ (JEDEC DO-214AC with J-bend leads) and supplied in embossed tape reel pack. For alternative
voltage and holding current values, consult the factory. For higher rated impulse currents, the 100 A 10/1000 TISP4xxxH3BJ series in the SMB
(JEDEC DO-214AA) package is available.
Absolute Maximum Ratings, TA = 25
°
C (Unless Otherwise Noted)
Rating
‘4070
‘4080
‘4090
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4320
‘4350
‘4360
‘4395
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10
μs
(GR-1089-CORE, 2/10
μ
s voltage wave shape)
300
8/20
μ
s (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
220
10/160
μs
(FCC Part 68, 10/160
μ
s voltage wave sh ape)
120
5/200
μs
(VDE 0433, 10/700
μ
s voltage wave shape)
110
I
TSP
A
0.2/310
μs
(I3124, 0.5/700
μ
s voltage wave shape)
100
5/310
μs
(ITU-T K.20/21/45, K.44 10/700
μ
s voltage wave shape)
100
5/310
μs
(FTZ R12, 10/700
μ
s voltage wave shape)
100
10/560
μs
(FCC Part 68, 10/560
μ
s voltage wave shape)
75
10/1000
μs
(GR-1089-CORE, 10/1000
μ
s voltage wave shape)
50
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
23
I
TSM
16.7 ms (60 Hz) full sine wave
24
A
1000 s 50 Hz/60 Hz a.c.
1.6
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 100 A
di
T
/dt
300
A/μs
Junction temperature
T
J
-40 to +150
°C
Storage temperature range
T
stg
-65 to +150
°C
NOTES: 1. See Applications Information and Figure 10 for voltage values at lower temperatures.
2. Initially,the TISP4xxxM3AJ must be in thermal equilibrium with T
J
= 25
°C.
3. The surge may be repeated after the TISP4xxxM3AJ returns to its initial conditions.
4. See Applications Information and Figure 11 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 9 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25
°
C.
AUGUST 2001 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
Symbol
Repetitive peak off-state voltage, (see Note 1)
V
DRM
Value
±
58
±
65
±
68
±
75
±
90
±100
±120
±135
±145
±155
±160
±180
±190
±200
±220
±230
±240
±275
±290
±320
Unit
V
TISP4xxxM3AJ Overvoltage Protector Series
Electrical Characteristics, TA = 25
°
C (Unless Otherwise Noted)
Parameter
Repetitive peak off-
state current
Test Conditions
V
D
= V
DRM
T
A
= 25
°C
T
A
= 85
°C
‘4070
‘4080
‘4090
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4320
‘4350
‘4360
‘4395
‘4070
‘4080
‘4090
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4320
‘4350
‘4360
‘4395
I
(BO)
V
T
I
H
dv/dt
Breakover current
On-state voltage
Holding current
Critical rate of rise of
off-state voltage
dv/dt =
±250
V/ms, R
SOURCE
= 300
Ω
I
T
=
±5
A, t
W
= 100
μs
I
T
=
±5
A, di/dt = +/-30 mA/ms
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
±0.15
±0.15
±5
Min
Typ
Max
±5
±10
±70
±80
±90
±95
±115
±125
±145
±165
±180
±200
±220
±240
±250
±265
±290
±300
±320
±350
±360
±395
±78
±88
±98
±102
±122
±132
±151
±171
±186
±207
±227
±247
±257
±272
±298
±308
±328
±359
±370
±405
±0.6
±3
±0.35
A
V
A
kV/μs
Unit
μA
I
DRM
V
(BO)
Breakover voltage
dv/dt =
±250
V/ms, R
SOURCE
= 300
Ω
V
V
(BO)
Impulse breakover
voltage
dv/dt
±1000
V/μs, Linear voltage ramp,
Maximum ramp value =
±500
V
di/dt =
±20
A/μs, Linear current ramp,
Maximum ramp value =
±10
A
V
AUGUST 2001 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
TISP4xxxM3AJ Overvoltage Protector Series
Electrical Characteristics, TA = 25
°
C (Unless Otherwise Noted)
Parameter
I
D
Off-state current
V
D
=
±
50 V
f = 1 MHz, V
d
= 1 V rms, V
D
= 0,
Test Conditions
T
A
= 85
°C
4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4395
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4395
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4125 thru ‘4220
‘4240 thru ‘4395
83
62
50
78
56
45
72
52
42
36
26
19
21
15
Min
Typ
Max
±10
100
74
60
94
67
54
87
62
50
44
31
22
25
18
Unit
μ
A
f = 1 MHz, V
d
= 1 V rms, V
D
= -1 V
C
off
Off-state capacitance
f = 1 MHz, V
d
= 1 V rms, V
D
= -2 V
pF
f = 1 MHz, V
d
= 1 V rms, V
D
= -50 V
f = 1 MHz, V
d
= 1 V rms, V
D
= -100 V
(see Note 6)
NOTE
6: To avoid possible voltage clipping, the ‘4125 is tested with V
D
= -98 V.
Thermal Characteristics
Parameter
Test Conditions
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
T
A
= 25
°C,
(see Note 7)
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25
°C
52
Min
Typ
Max
115
°C/W
Unit
R
θ
JA
Junction to free air thermal resistance
NOTE
7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
AUGUST 2001 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.
TISP4xxxM3AJ Overvoltage Protector Series
Parameter Measurement Information
+i
I
TSP
Quadrant I
Switching
Characteristic
I
TSM
I
T
V
T
I
H
V
(BO)
I
(BO)
-v
I
DRM
V
DRM
V
D
I
D
I
D
V
D
V
DRM
I
DRM
+v
I
(BO)
I
H
V
(BO)
V
T
I
T
I
TSM
I
Quadrant III
Switching
Characteristic
I
TSP
-i
PMXXAAB
Figure 1. Voltage-Current Characteristic for T and R Terminals
All Measurements are Referenced to the R Terminal
AUGUST 2001 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at
www.bourns.com/docs/legal/disclaimer.pdf.

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