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A4950

器件型号:A4950
厂商名称:Allegro
厂商官网:http://www.allegromicro.com/
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器件描述

Full-Bridge DMOS PWM Motor Driver

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A4950
Full-Bridge DMOS PWM Motor Driver
Features and Benefits
• Low R
DS(on)
outputs
• Overcurrent protection (OCP)
Motor short protection
Motor lead short to ground protection
Motor lead short to battery protection
• Low Power Standby mode
• Adjustable PWM current limit
• Synchronous rectification
• Internal undervoltage lockout (UVLO)
• Crossover-current protection
• Commercial temperature grade (A4950E: –40°C to 85°C )
• Automotive temperature grade (A4950K: –40°C to 125°C)
Description
Designed for pulse width modulated (PWM) control of DC
motors, the A4950 is capable of peak output currents to ±3.5 A
and operating voltages to 40 V.
Input terminals are provided for use in controlling the speed and
direction of a DC motor with externally applied PWM control
signals. Internal synchronous rectification control circuitry is
provided to lower power dissipation during PWM operation.
Internal circuit protection includes overcurrent protection,
motor lead short to ground or supply, thermal shutdown with
hysteresis, undervoltage monitoring of V
BB
, and crossover-
current protection.
For high ambient operating temperature applications, an
automotive grade device is offered (A4950K). The K grade
device is tested across extended temperature and voltage
ranges to ensure compliance in automotive or industrial
applications.
The A4950 is provided in a low-profile 8-pin SOICN package
with exposed thermal pad (suffix LJ) that is lead (Pb) free, with
100% matte tin leadframe plating.
Package: 8-pin SOICN with exposed
thermal pad (suffix LJ)
Not to scale
Functional Block Diagram
Load Supply
OSC
Charge
Pump
VBB
IN1
Control
Logic
Disable
TSD
UVLO
7V
OUT1
OUT2
IN2
GND
LSS
VREF
÷
10
(Optional)
A4950-DS, Rev. 3
A4950
Selection Guide
Part Number
A4950ELJTR-T
A4950KLJTR-T
Full-Bridge DMOS PWM Motor Driver
Packing
3000 pieces per 13-in. reel
3000 pieces per 13-in. reel
Ambient Operating Temperature, T
A
–40°C to 85°C
–40°C to 125°C
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Logic Input Voltage Range
V
REF
Input Voltage Range
Sense Voltage (LSS pin)
Motor Outputs Voltage
Output Current
Transient Output Current
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Symbol
V
BB
V
IN
V
REF
V
S
V
OUT
I
OUT
i
OUT
T
A
T
J
(max)
T
stg
Duty cycle = 100%
T
W
< 500 ns
Temperature Range E
Temperature Range K
Notes
Rating
40
–0.3 to 6
–0.3 to 6
–0.5 to 0.5
–2 to 42
3.5
6
–40 to 85
–40 to 125
150
–55 to 150
Unit
V
V
V
V
V
A
A
°C
°C
°C
°C
Thermal Characteristics
may require derating at maximum conditions, see application information
Characteristic
Package Thermal Resistance
Symbol
R
θJA
Test Conditions*
On 2-layer PCB with 0.8 in
2
exposed 2-oz. copper each side
.
On 4-layer PCB based on JEDEC standard
Value
62
35
Unit
ºC/W
ºC/W
*Additional thermal information available on the Allegro website.
Terminal List Table
Number
Name
GND
IN2
IN1
VREF
VBB
OUT1
LSS
OUT2
PAD
Ground
Logic input 2
Logic input 1
Analog input
Load supply voltage
DMOS full bridge output 1
Power return – sense resistor connection
DMOS full bridge output 2
Exposed pad for enhanced thermal dissipation
Function
Pin-out Diagram
GND
IN2
IN1
VREF
1
2
3
4
PAD
8 OUT2
7 LSS
6 OUT1
5 VBB
1
2
3
4
5
6
7
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4950
Full-Bridge DMOS PWM Motor Driver
version at T
J
= –40°C to 150°C, V
BB
= 8 to 40 V, unless otherwise specified
Characteristic
General
Load Supply Voltage Range
R
DS(on)
Sink + Source Total
Load Supply Current
Body Diode Forward Voltage
Logic Inputs
V
IN(1)
Logic Input Voltage Range
V
IN(0)
V
IN(STANDBY)
Low Power Standby mode
ELECTRICAL CHARACTERISTICS
Valid for Temperature Range E version at T
J
= 25°C and for Temperature Range K
Symbol
V
BB
R
DS(on)
I
BB
V
f
I
OUT
= |2.5 A|, T
J
= 25°C
I
OUT
= |2.5 A|, T
J
= 150°C
f
PWM
< 30 kHz
Low Power Standby mode
Source diode, I
f
= –2.5 A
Sink diode, I
f
= 2.5 A
Test Conditions
Min.
8
2.0
50
0
V
REF
/ I
SS
, V
REF
= 5 V
Current Gain
Blank Time
Constant Off-time
Standby Timer
Power-Up Delay
Protection Circuits
UVLO Enable Threshold
UVLO Hysteresis
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
V
BBUVLO
V
BBUVLOhys
T
JTSD
T
TSDhys
Temperature increasing
Recovery = T
JTSD
– T
TSDhys
V
BB
increasing
7
7.5
500
160
15
7.95
V
mV
°C
°C
A
V
t
BLANK
t
off
t
st
t
pu
IN1 = IN2 < V
IN(STANDBY)
V
REF
/ I
SS
, V
REF
= 2.5 V
V
REF
/ I
SS
, V
REF
= 1 V
9.5
9.0
8.0
2
16
V
IN
= 2.0 V
V
IN
= 0.8 V
Typ.
0.6
1.1
10
40
16
50
250
3
25
1
Max.
40
0.8
1.5
20
10
1.5
1.5
0.8
0.4
100
40
550
500
5
10.5
10.0
10.0
4
34
1.5
30
Unit
V
Ω
Ω
mA
μA
V
V
V
V
V
μA
μA
mV
ns
V
V/V
V/V
V/V
μs
μs
ms
μs
Logic Input Current
Logic Input Pull-Down Resistance
Input Hysteresis
Timing
Crossover Delay
V
REF
Input Voltage Range
RR
I
IN(1)
I
IN(0
)
V
HYS
t
COD
V
REF
R
LOGIC(PD)
V
IN
= 0 V = IN1 = IN2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A4950
Full-Bridge DMOS PWM Motor Driver
Characteristic Performance
PWM Control Timing Diagram
V
IN(1)
IN1
GND
V
IN(1)
IN2
GND
+I
REG
I
OUT(x)
0A
-I
REG
Forward/
Fast Decay
Reverse/
Fast Decay
Forward/
Slow Decay
Reverse/
Slow Decay
PWM Control Truth Table
IN1
0
1
0
1
1
0
IN2
1
0
1
0
1
0
10×V
S
> V
REF
False
False
True
True
False
False
OUT1
L
H
H/L
L
L
Z
OUT2
H
L
L
H/L
L
Z
Reverse
Forward
Chop (mixed decay), reverse
Chop (mixed decay), forward
Brake (slow decay); after a Chop command
Coast, enters Low Power Standby mode after 1 ms
Function
Note: Z indicates high impedance.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A4950
Full-Bridge DMOS PWM Motor Driver
Functional Description
Device Operation
The A4950 is designed to operate DC motors. The output drivers
are all low-R
DS(on)
, N-channel DMOS drivers that feature inter-
nal synchronous rectification to reduce power dissipation. The
current in the output full bridge is regulated with fixed off-time
pulse width modulated (PWM) control circuitry. The IN1 and IN2
inputs allow two-wire control for the bridge.
Protection circuitry includes internal thermal shutdown, and pro-
tection against shorted loads, or against output shorts to ground
or supply. Undervoltage lockout prevents damage by keeping the
outputs off until the driver has enough voltage to operate nor-
mally.
Standby Mode
Low Power Standby mode is activated when both input (INx)
pins are low for longer than 1 ms. Low Power Standby mode
disables most of the internal circuitry, including the charge pump
and the regulator. When the A4950 is coming out of standby
mode, the charge pump should be allowed to reach its regulated
voltage (a maximum delay of 200
μs)
before any PWM com-
mands are issued to the device.
Internal PWM Current Control
Initially, a diagonal pair of source and sink FET outputs are
enabled and current flows through the motor winding and the
optional external current sense resistor, R
S
. When the voltage
across R
S
equals the comparator trip value, then the current sense
comparator resets the PWM latch. The latch then turns off the
sink and source FETs (Mixed Decay mode).
V
REF
The maximum value of current limiting is set by the selection of
R
Sx
and the voltage at the VREF pin. The transconductance func-
tion is approximated by the maximum value of current limiting,
I
TripMAX
(A), which is set by:
I
TripMAX
=
V
REF
10
R
S
where V
REF
is the input voltage on the VREF pin (V) and R
S
is
the resistance of the sense resistor (Ω) on the LSS terminal.
Overcurrent Protection
A current monitor will protect the IC from damage due to output
shorts. If a short is detected, the IC will latch the fault and disable
the outputs. The fault latch can only be cleared by coming out of
Low Power Standby mode or by cycling the power to VBB. Dur-
ing OCP events, Absolute Maximum Ratings may be exceeded
for a short period of time before the device latches.
Shutdown
If the die temperature increases to approximately 160°C, the full
bridge outputs will be disabled until the internal temperature falls
below a hysteresis, T
TSDhys
, of 15°C. Internal UVLO is present
on VBB to prevent the output drivers from turning-on below the
UVLO threshold.
Braking
The braking function is implemented by driving the device in
Slow Decay mode, which is done by applying a logic high to both
inputs, after a bridge-enable Chop command (see PWM Control
Truth Table). Because it is possible to drive current in both direc-
tions through the DMOS switches, this configuration effectively
shorts-out the motor-generated BEMF, as long as the Chop com-
mand is asserted. The maximum current can be approximated by
V
BEMF
/ R
L
. Care should be taken to ensure that the maximum
ratings of the device are not exceeded in worse case braking situ-
ations: high speed and high-inertia loads.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5

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