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AD5271BCPZ-20-RL7

器件型号:AD5271BCPZ-20-RL7
器件类别:模拟混合信号IC    转换器   
文件大小:741KB,共24页
厂商名称:ADI(亚德诺半导体)
厂商官网:https://www.analog.com
标准:
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器件描述

256-Position, 1% Resistor Tolerance Error, SPI Interface and 50-TP Memory Digital Rheostat

参数
参数名称属性值
Brand NameAnalog Devices Inc
是否无铅含铅
是否Rohs认证符合
厂商名称ADI(亚德诺半导体)
零件包装代码SOIC
包装说明HVSON, SOLCC10,.12,20
针数10
制造商包装代码CP-10-9
Reach Compliance Codecompliant
ECCN代码EAR99
其他特性NONVOLATILE MEMORY
标称带宽0.3 kHz
控制接口3-WIRE SERIAL
转换器类型DIGITAL POTENTIOMETER
JESD-30 代码S-PDSO-N10
JESD-609代码e3
长度3 mm
湿度敏感等级1
标称负供电电压-2.5 V
功能数量1
位置数256
端子数量10
最高工作温度125 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码HVSON
封装等效代码SOLCC10,.12,20
封装形状SQUARE
封装形式SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)225
电源+-2.5,3/5 V
认证状态Not Qualified
电阻定律LINEAR
最大电阻容差1%
最大电阻器端电压2.75 V
最小电阻器端电压-2.5 V
座面最大高度0.85 mm
标称供电电压2.5 V
表面贴装YES
标称温度系数5 ppm/°C
温度等级AUTOMOTIVE
端子面层MATTE TIN
端子形式NO LEAD
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
标称总电阻20000 Ω
宽度3 mm

文档预览

1024-/256-Position, 1% Resistor Tolerance Error,
SPI Interface and 50-TP Memory Digital Rheostat
Data Sheet
FEATURES
Single-channel, 1024-/256-position resolution
20 kΩ, 50 kΩ, 100 kΩ nominal resistance
Maximum ±1% nominal resistor tolerance error
50-times programmable (50-TP) wiper memory
Rheostat mode temperature coefficient: 5 ppm/°C
2.7 V to 5.5 V single-supply operation
±2.5 V to ±2.75 V dual-supply operation for ac or bipolar
operations
SPI-compatible interface
Wiper setting readback
Power on refreshed from 50-TP memory
Thin LFCSP, 10-lead, 3 mm × 3 mm × 0.8 mm package
Compact MSOP, 10-lead, 3 mm × 4.9 mm × 1.1 mm package
V
DD
AD5270/AD5271
FUNCTIONAL BLOCK DIAGRAM
POWER-ON
RESET
AD5270/AD5271
SCLK
SYNC
DIN
SDO
SERIAL
INTERFACE
10/8
RDAC
REGISTER
A
W
50-TP
MEMORY
BLOCK
APPLICATIONS
Mechanical rheostat replacements
Op-amp: variable gain control
Instrumentation: gain, offset adjustment
Programmable voltage to current conversions
Programmable filters, delays, time constants
Programmable power supply
Sensor calibration
V
SS
EXT_CAP
GND
Figure 1.
GENERAL DESCRIPTION
The AD5270/AD5271
1
are single-channel, 1024-/256-position
digital rheostats that combine industry leading variable resistor
performance with nonvolatile memory (NVM) in a compact
package.
The AD5270/AD5271 ensure less than 1% end-to-end resistor
tolerance error and offer 50-times programmable (50-TP) memory.
The guaranteed industry leading low resistor tolerance error
feature simplifies open-loop applications as well as precision
calibration and tolerance matching applications.
The AD5270/AD5271 device wiper settings are controllable
through the SPI digital interface. Unlimited adjustments are
allowed before programming the resistance value into the
50-TP memory. The AD5270/AD5271 do not require any
external voltage supply to facilitate fuse blow and there are
50 opportunities for permanent programming. During 50-TP
activation, a permanent blow fuse command freezes the resistance
position (analogous to placing epoxy on a mechanical trimmer).
The AD5270/AD5271 are available in a 3 mm × 3 mm, 10-lead
LFCSP package and in a 10-lead MSOP package. The parts are
guaranteed to operate over the extended industrial temperature
range of −40°C to +125°C.
1
Protected by U.S.Patent Number 7688240
Rev. F
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2013 Analog Devices, Inc. All rights reserved.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Technical Support
www.analog.com
08077-001
AD5270/AD5271
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—AD5270 .......................................... 3
Electrical Characteristics—AD5271 .......................................... 5
Interface Timing Specifications .................................................. 7
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 11
Test Circuits ..................................................................................... 17
Theory of Operation ...................................................................... 18
Serial Data Interface ................................................................... 18
Data Sheet
Shift Register ............................................................................... 18
RDAC Register............................................................................ 18
50-TP Memory Block ................................................................ 18
Write Protection ......................................................................... 18
RDAC and 50-TP Read Operation .......................................... 19
Shut-Down Mode ....................................................................... 20
Resistor Performance Mode...................................................... 20
Reset ............................................................................................. 20
SDO Pin and Daisy-Chain Operation ..................................... 21
RDAC Architecture .................................................................... 21
Programming the Variable Resistor ......................................... 22
EXT_CAP Capacitor .................................................................. 22
Terminal Voltage Operating Range ......................................... 22
Power-Up Sequence ................................................................... 22
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 24
REVISION HISTORY
3/13—Rev. E to Rev. F
Changed Resistor Noise Density, R
AW
= 20 kΩ from 50 nV/√Hz
to 13 nV/√Hz; Table 1 ...................................................................... 4
Changed Resistor Noise Density, R
AW
= 20 kΩ from 50 nV/√Hz
to 13 nV/√Hz; Table 4 ...................................................................... 6
Updated Outline Dimensions ....................................................... 23
12/10—Rev. D to Rev. E
Changes to SDO Pin Description ................................................. 10
Changes to SDO Pin and Daisy-Chain Operation Section....... 21
11/10—Rev. C to Rev. D
Changes to Figure 25 ...................................................................... 14
9/10—Rev. B to Rev. C
Changes to Figure 3 Caption ........................................................... 7
Changes to Figure 4 Caption ........................................................... 8
Deleted Daisy-Chain Operation Section, Added SDO Pin and
Daisy-Chain Operation Section ................................................... 21
5/10—Rev. A to Rev. B
Added LFCSP Throughout ..............................................................1
Changed OTP to 50-TP Throughout..............................................1
Changes to Product Title, Features, and General Description ....1
Changes to Table 1.............................................................................3
Added Table 3; Renumbered Sequentially .....................................4
Changes to Table 4.............................................................................5
Added Table 6 ....................................................................................6
Changes to Table 8 and Table 9........................................................9
Added Figure 6 and changes to Table 10 ..................................... 10
Replaced Typical Performance Characteristics Section ............ 11
Changes to Figure 44...................................................................... 21
Updated Outline Dimensions ....................................................... 23
Changes to Ordering Guide .......................................................... 24
3/10—Rev. 0 to Rev. A
Changes to Product Title and General Description.....................1
Changes to Theory of Operation Section...................................14
10/09—Revision 0: Initial Version
Rev. F | Page 2 of 24
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—AD5270
AD5270/AD5271
V
DD
= 2.7 V to 5.5 V, V
SS
= 0 V; V
DD
= 2.5 V to 2.75 V, V
SS
= −2.5 V to −2.75 V; −40°C < T
A
< +125°C, unless otherwise noted.
Table 1.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resolution
Resistor Integral Nonlinearity
2, 3
Symbol
Test Conditions/Comments
Min
10
−1
−1
−1
−1
−1
±0.5
±15
5
35
Typ
1
Max
Unit
Bits
LSB
LSB
LSB
LSB
%
%
ppm/°C
V
pF
pF
50
nA
R-INL
R
AW
= 20 kΩ, |V
DD
− V
SS
| = 3.0 V to 5.5 V
R
AW
= 20 kΩ, |V
DD
− V
SS
| = 2.7 V to 3.0 V
R
AW
= 50 kΩ, 100 kΩ
Resistor Differential Nonlinearity
2
Nominal Resistor Tolerance
R-Perf Mode
4
Normal Mode
Resistance Temperature Coefficient
5, 6
Wiper Resistance
RESISTOR TERMINALS
Terminal Voltage Range
5
, 7
Capacitance
5
A
Capacitance
5
W
Common-Mode Leakage Current
5
DIGITAL INPUTS
Input Logic
5
High
Low
Input Current
Input Capacitance
5
DIGITAL OUTPUT
Output Voltage
5
High
Low
R-DNL
See
Table 2
and
Table 3
Code = full scale
Code = zero scale
+1
+1.5
+1
+1
+1
70
V
DD
V
SS
f = 1 MHz, measured to GND, code =
half scale
f = 1 MHz, measured to GND, code =
half scale
V
A
= V
W
90
40
V
INH
V
INL
I
IN
C
IN
2.0
0.8
±1
5
V
V
µA
pF
V
OH
V
OL
R
PULL_UP
= 2.2 kΩ to V
DD
R
PULL_UP
= 2.2 kΩ to V
DD
V
DD
= 2.7 V to 5.5 V, V
SS
= 0 V
V
DD
= 2.5 V to 2.75 V, V
SS
= −2.5 V to −2.75 V
V
DD
− 0.1
0.4
0.6
+1
5
V
V
V
µA
pF
V
V
µA
µA
mA
mA
500
µA
µA
Tristate Leakage Current
Output Capacitance
5
POWER SUPPLIES
Single-Supply Power Range
Dual-Supply Power Range
Supply Current
Positive
Negative
50-TP Store Current
5
, 8
Positive
Negative
OTP Read Current
5
, 9
Positive
Negative
−1
V
SS
= 0 V
2.7
±2.5
5.5
±2.75
1
I
DD
I
SS
I
DD_OTP_STORE
I
SS_OTP_STORE
I
DD_OTP_READ
I
SS_OTP_READ
−1
4
−4
−500
Rev. F | Page 3 of 24
AD5270/AD5271
Parameter
Power Dissipation
10
Power Supply Rejection Ratio
5
Symbol
PSRR
Test Conditions/Comments
V
IH
= V
DD
or V
IL
= GND
ΔV
DD
/ΔV
SS
= ±5 V ± 10%
R
AW
= 20 kΩ
R
AW
= 50 kΩ
R
AW
= 100 kΩ
−3 dB, R
AW
= 10 kΩ, Terminal W,
see
Figure 42
R
AW
= 20 kΩ
R
AW
= 50 kΩ
R
AW
= 100 kΩ
V
A
= 1 V rms, f = 1 kHz,
Min
Typ
1
Data Sheet
Max
5.5
−55
−67
−70
kHz
300
120
60
dB
−90
−88
−85
nV/√Hz
13
25
32
Unit
µW
dB
−66
−75
−78
DYNAMIC CHARACTERISTICS
5
, 11
Bandwidth
Total Harmonic Distortion
code = half scale
R
AW
= 20 kΩ
R
AW
= 50 kΩ
R
AW
= 100 kΩ
Code = half scale, T
A
= 25°C
R
AW
= 20 kΩ
R
AW
= 50 kΩ
R
AW
= 100 kΩ
Resistor Noise Density
Typical specifications represent average readings at 25°C, V
DD
= 5 V, and V
SS
= 0 V.
Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions.
3
The maximum current in each code is defined by I
AW
= (V
DD
− 1)/R
AW
.
4
The terms resistor performance mode and R-Perf mode are used interchangeably. See the Resistor Performance Mode section.
5
Guaranteed by design and not subject to production test.
6
See Figure 25 for more details.
7
Resistor Terminal A and Resistor Terminal W have no limitations on polarity with respect to each other. Dual-supply operation enables ground referenced bipolar
signal adjustment.
8
Different from operating current, the supply current for the fuse program lasts approximately 55 ms.
9
Different from operating current, the supply current for the fuse read lasts approximately 500 ns.
10
P
DISS
is calculated from (I
DD
× V
DD
) + (I
SS
× V
SS
).
11
All dynamic characteristics use V
DD
= +2.5 V, V
SS
= −2.5 V.
1
2
Table 2. AD5270—20 kΩ Resistor Performance Mode Code Range
Resistor Tolerance Per Code
R-TOLERANCE
1% R-Tolerance
2% R-Tolerance
3% R-Tolerance
|V
DD
− V
SS
| = 4.5 V to 5.5 V
From 0x078 to 0x3FF
From 0x037 to 0x3FF
From 0x028 to 0x3FF
|V
DD
− V
SS
| = 2.7 V to 4.5 V
From 0x0BE to 0x3FF
From 0x055 to 0x3FF
From 0x037 to 0x3FF
Table 3. AD5270—50 kΩ and 100 kΩ Resistor Performance Mode Code Range
Resistor Tolerance Per Code
R-TOLERANCE
1% R-Tolerance
2% R-Tolerance
3% R-Tolerance
R
AW
= 50 kΩ
From 0x078 to 0x3FF
From 0x055 to 0x3FF
From 0x032 to 0x3FF
R
AW
= 100 kΩ
From 0x04B to 0x3FF
From 0x032 to 0x3FF
From 0x019 to 0x3FF
Rev. F | Page 4 of 24
Data Sheet
ELECTRICAL CHARACTERISTICS—AD5271
AD5270/AD5271
V
DD
= 2.7 V to 5.5 V, V
SS
= 0 V; V
DD
= 2.5 V to 2.75 V, V
SS
= −2.5 V to −2.75 V; −40°C < T
A
< +125°C, unless otherwise noted.
Table 4.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resolution
Resistor Integral Nonlinearity
2, 3
Resistor Differential Nonlinearity
2
Nominal Resistor Tolerance
R-Perf Mode
4
Normal Mode
Resistance Temperature Coefficient
5, 6
Wiper Resistance
RESISTOR TERMINALS
Terminal Voltage Range
5, 7
Capacitance
5
A
Capacitance
5
W
Common-Mode Leakage Current
5
DIGITAL INPUTS
Input Logic
5
High
Low
5
Input Current
Input Capacitance
5
DIGITAL OUTPUT
Output Voltage
5
High
Low
Symbol
Test Conditions/Comments
Min
8
−1
−1
See Table 5 and Table 6
Code = full scale
Code = zero scale
V
SS
f = 1 MHz, measured to GND, code =
half scale
f = 1 MHz, measured to GND, code =
half scale
V
A
= V
W
90
40
50
−1
±0.5
±15
5
35
Typ
1
Max
Unit
Bits
LSB
LSB
%
%
ppm/°C
V
pF
pF
nA
R-INL
R-DNL
+1
+1
+1
70
V
DD
V
INH
V
INL
I
IN
C
IN
2.0
0.8
±1
5
V
V
µA
pF
V
OH
V
OL
R
PULL_UP
= 2.2 kΩ to V
DD
R
PULL_UP
= 2.2 kΩ to V
DD
V
DD
= 2.7 V to 5.5 V, V
SS
= 0 V
V
DD
= 2.5 V to 2.75 V, V
SS
= −2.5 V to −2.75 V
V
DD
− 0.1
0.4
0.6
+1
5
V
V
V
µA
pF
V
V
µA
µA
mA
mA
500
µA
µA
µW
dB
Tristate Leakage Current
Output Capacitance
5
POWER SUPPLIES
Single-Supply Power Range
Dual-Supply Power Range
Supply Current
Positive
Negative
50-TP Store Current
5, 8
Positive
Negative
OTP Read Current
5, 9
Positive
Negative
Power Dissipation
10
Power Supply Rejection Ratio
5
−1
V
SS
= 0 V
2.7
±2.5
5.5
±2.75
1
I
DD
I
SS
I
DD_OTP_STORE
I
SS_OTP_STORE
I
DD_OTP_READ
I
SS_OTP_READ
PSRR
V
IH
= V
DD
or V
IL
= GND
ΔV
DD
/ΔV
SS
= ±5 V ± 10%
R
AW
= 20 kΩ
R
AW
= 50 kΩ
R
AW
= 100 kΩ
−1
4
−4
−500
5.5
−66
−75
−78
−55
−67
−70
Rev. F | Page 5 of 24

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