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K6X8016C3B-UQ550

器件型号:K6X8016C3B-UQ550
器件类别:存储    存储   
厂商名称:SAMSUNG(三星)
厂商官网:http://www.samsung.com/Products/Semiconductor/
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器件描述

Standard SRAM, 512KX16, 55ns, CMOS, PDSO44, 0.400 INCH, LEAD FREE, TSOP2-44

参数
参数名称属性值
厂商名称SAMSUNG(三星)
Objectid2057588813
零件包装代码TSOP2
包装说明TSOP2,
针数44
Reach Compliance Codeunknown
ECCN代码3A991.B.2.A
compound_id9492635
最长访问时间55 ns
JESD-30 代码R-PDSO-G44
长度18.41 mm
内存密度8388608 bit
内存集成电路类型STANDARD SRAM
内存宽度16
功能数量1
端子数量44
字数524288 words
字数代码512000
工作模式ASYNCHRONOUS
最高工作温度125 °C
最低工作温度-40 °C
组织512KX16
封装主体材料PLASTIC/EPOXY
封装代码TSOP2
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE
并行/串行PARALLEL
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子形式GULL WING
端子节距0.8 mm
端子位置DUAL
宽度10.16 mm

文档预览

K6X8016C3B Family
Document Title
512Kx16 bit Low Power Full CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0
0.1
Initial draft
Revised
- Deleted 44-TSOP2-400R package type.
- Added Commercial product.
Revised
- Errata correction : corrected commercial product family name from
K6X8016C3B-F to K6X8016C3B-B in PRODUCT FAMILY.
Finalized
- Changed I
CC
from 12mA to 6mA
- Changed I
CC
1 from 12mA to 7mA
- Changed I
CC
2 from 60mA to 35mA
- Changed I
SB
from 3mA to 0.4mA
- Changed I
SB
1
(Commercial)
from 40µA to 25µA
- Changed I
SB
1
(industrial)
from 40µA to 25µA
- Changed I
SB
1
(Automotive)
from 50µA to 40µA
- Changed I
DR
(Commercial)
from 30µA to 15µA
- Changed I
DR
(industrial)
from 30µA to 15µA
- Changed I
DR
(Automotive)
from 40µA to 30µA
Revised
- Changed I
SB
1
of Automotive product from 40µA to 100µA
- Changed I
DR
of Automotive product from 30µA to 80µA
- Added Lead Free Products
Draft Date
October 31, 2002
December 11, 2002
Remark
Preliminary
Preliminary
0.11
March 26, 2003
Preliminary
1.0
September 16, 2003
Final
2.0
March 27, 2005
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to yourquestions about device. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 2.0
March 2005
K6X8016C3B Family
512Kx16 bit Low Power Full CMOS Static RAM
FEATURES
Process Technology: Full CMOS
Organization: 512K x16
Power Supply Voltage: 4.5~5.5V
Low Data Retention Voltage: 2.0V(Min)
Three state output and TTL Compatible
Package Type: 44-TSOP2-400F
CMOS SRAM
GENERAL DESCRIPTION
The K6X8016C3B families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families support
various operating temperature range for user flexibility of sys-
tem design. The families also support low data retention voltage
for battery back-up operation with low data retention current.
PRO
DUCT FAMILY
Power Dissipation
Product Family
K6X8016C3B-B
K6X8016C3B-F
K6X8016C3B-Q
Operating Temperature
Commercial(0~70°C)
Industrial(-40~85°C)
Automotive(-40~125°C)
4.5~5.5V
55
1)
/70ns
Vcc Range
Speed
Standby
(I
SB1
, Max)
25µA
25µA
100µA
35mA
44-TSOP2-400F
Operating
(I
CC2
, Max)
PKG Type
1. The parameter is measured with 50pF test load.
PIN DESCRIPTION
A4
A3
A2
A1
A0
CS
I/OI
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A18
A17
A16
A15
A14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
A8
A9
A10
A11
A12
A13
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
Vcc
Vss
Row
Addresses
Row
select
Memory array
44-TSOP2
Forward
I/O
1
~I/O
8
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
I/O
9
~I/O
16
Name
CS
OE
WE
A
0
~A
18
Function
Chip Select Input
Output Enable Input
Write Enable Input
Address Inputs
Name
Vcc
Vss
UB
LB
Function
Column Addresses
Power
Ground
Upper Byte(I/O
9
~
16
)
Lower Byte(I/O
1
~
8
)
CS
OE
WE
UB
LB
I/O
1
~I/O
16
Data Inputs/Outputs
Control Logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 2.0
March 2005
K6X8016C3B Family
PRODUCT LIST
Commercial Products(0~70°C)
Part Name
K6X8016C3B-TB55
K6X8016C3B-TB70
K6X8016C3B-UB55
K6X8016C3B-UB70
CMOS SRAM
Industrial Products(-40~85°C)
Part Name
K6X8016C3B-TF55
K6X8016C3B-TF70
K6X8016C3B-UF55
K6X8016C3B-UF70
Automotive Products(-40~125°C)
Part Name
K6X8016C3B-TQ55
K6X8016C3B-TQ70
K6X8016C3B-UQ55
K6X8016C3B-UQ70
Function
44-TSOP2-F, 55ns, LL
44-TSOP2-F, 70ns, LL
44-TSOP2-F, 55ns, LL, LF
44-TSOP2-F, 70ns, LL, LF
Function
44-TSOP2-F, 55ns, LL
44-TSOP2-F, 70ns, LL
44-TSOP2-F, 55ns, LL, LF
44-TSOP2-F, 70ns, LL, LF
Function
44-TSOP2-F, 55ns, L
44-TSOP2-F, 70ns, L
44-TSOP2-F, 55ns, L, LF
44-TSOP2-F, 70ns, L, LF
1. LF : Lead Free Product
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
L
L
L
L
L
OE
X
H
X
L
L
L
X
X
X
WE
X
H
X
H
H
H
L
L
L
LB
X
X
H
L
H
L
L
H
L
UB
X
X
H
H
L
L
H
L
L
I/O
1~8
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9~16
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Mode
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Note: X means don
t care. (Must be low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to
Power Dissipation
Storage temperature
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
Ratings
-0.5 to V
CC
+0.5V(max.7.0V)
-0.3 to 7.0
1.0
-65 to 150
0 to 70
Operating Temperature
T
A
-40 to 85
-40 to 125
Unit
V
V
W
°C
°C
°C
°C
Remark
-
-
-
-
K6X8016C3B-B
K6X8016C3B-F
K6X8016C3B-Q
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 2.0
March 2005
K6X8016C3B Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Min
4.5
0
2.2
-0.5
3)
Typ
5.0
0
-
-
CMOS SRAM
Max
5.5
0
Vcc+0.5
2)
0.8
Unit
V
V
V
V
Note:
1. Commercial Product: T
A
=0 to 70°C, otherwise specified.
Industrial Product: T
A
=-40 to 85°C, otherwise specified.
Automotive Product: T
A
=-40 to 125°C, otherwise specified.
2. Overshoot: V
CC
+3.0V in case of pulse width
≤30ns.
3. Undershoot: -3.0V in case of pulse width
≤30ns.
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Average operating current
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current(CMOS)
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
V
OL
V
OH
I
SB
I
SB1
V
IN
=Vss to Vcc
CS=V
IH,
OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL,
WE=V
IH
, V
IN
=V
IH
or V
IL
Cycle time=1µs, 100% duty, I
IO
=0mA, CS≤0.2V, V
IN
≤0.2V
or
V
IN
≥V
CC
-0.2V
Cycle time=Min, I
IO
=0mA, 100% duty, CS=V
IL
, V
IN
=V
IL
or V
IH
I
OL
= 2.1mA
I
OH
= -1.0mA
CS=V
IH
, Other inputs=V
IH
or V
IL
K6X8016C3B-B
CS≥Vcc-0.2V, Other inputs=0~Vcc
K6X8016C3B-F
K6X8016C3B-Q
Test Conditions
Min
-1
-1
-
-
-
-
2.4
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
Max
1
1
6
7
35
0.4
-
0.4
25
25
100
µA
Unit
µA
µA
mA
mA
mA
V
V
mA
4
Revision 2.0
March 2005
K6X8016C3B Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Input/Output Reference)
Input pulse level: 0.8 to 2.4V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): C
L
=100pF+1TTL
C
L
=50pF+1TTL
CMOS SRAM
C
L
1
)
1.Including scope and jig capacitance
AC CHARACTERISTICS
(V
CC
=4.5~5.5V, Commercial product:T
A
=0 to 70°C, Industrial product:T
A
=-40 to 85°C, Automotive product:T
A
=-40 to 125°C)
Speed Bins
Parameter List
Symbol
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Read
Output enable to low-Z output
LB, UB enable to low-Z output
Chip disable to high-Z output
Output Disable to High-Z Output
Output hold from address change
LB, UB valid to data output
UB, LB disable to high-Z output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
LB, UB valid to end of write
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
BLZ
t
HZ
t
OHZ
t
OH
t
BA
t
BHZ
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
BW
55
-
-
-
10
5
5
0
0
10
-
0
55
45
0
45
40
0
0
20
0
5
45
55ns
Max
-
55
55
25
-
-
-
20
20
-
25
20
-
-
-
-
-
-
20
-
-
-
-
Min
70
-
-
-
10
5
5
0
0
10
-
0
70
60
0
60
55
0
0
30
0
5
60
70ns
Max
-
70
70
35
-
-
-
25
25
-
35
25
-
-
-
-
-
-
25
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Symbol
V
DR
I
DR
CS≥Vcc-0.2V
K6X8016C3B-B
Vcc=3.0V, CS≥Vcc-0.2V
CS≥Vcc-0.2V
K6X8016C3B-F
K6X8016C3B-Q
Data retention set-up time
Recovery time
t
SDR
t
RDR
See data retention waveform
Test Condition
Min
2.0
-
-
-
0
5
Typ
-
-
-
-
-
-
Max
5.5
15
15
80
-
-
ms
µA
Unit
V
5
Revision 2.0
March 2005

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