电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索
 

IBM25PPC750L-EB0C350W

器件型号:IBM25PPC750L-EB0C350W
器件类别:嵌入式处理器和控制器    微控制器和处理器   
文件大小:610KB,共46页
厂商名称:IBM
厂商官网:http://www.ibm.com
下载文档

器件描述

RISC Microprocessor, 32-Bit, 350MHz, CMOS, CBGA360, 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360

参数
参数名称属性值
是否Rohs认证不符合
厂商名称IBM
零件包装代码BGA
包装说明BGA, BGA360,19X19,50
针数360
Reach Compliance Codeunknown
ECCN代码3A001.A.3
地址总线宽度32
位大小32
边界扫描YES
最大时钟频率100 MHz
外部数据总线宽度64
格式FLOATING POINT
集成缓存YES
JESD-30 代码S-CBGA-B360
JESD-609代码e0
长度25 mm
低功率模式YES
端子数量360
最高工作温度105 °C
最低工作温度
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码BGA
封装等效代码BGA360,19X19,50
封装形状SQUARE
封装形式GRID ARRAY
电源2.05,3.3 V
认证状态Not Qualified
座面最大高度3.2 mm
速度350 MHz
最大供电电压2.1 V
最小供电电压2 V
标称供电电压2.05 V
表面贴装YES
技术CMOS
温度等级OTHER
端子面层Tin/Lead (Sn/Pb)
端子形式BALL
端子节距1.27 mm
端子位置BOTTOM
宽度25 mm
uPs/uCs/外围集成电路类型MICROPROCESSOR, RISC

文档预览

PowerPC 750
TM
SCM RISC Microprocessor
for the PID8p-750
Version 2.0
09/30/1999
IBM Microelectronics Division
Notices
Before using this information and the product it supports, be sure to read the general information on the
back cover of this book.
Trademarks
The following are trademarks of International Business Machines Corporation in the United States, or
other countries, or both:
IBM
IBM Logo
PowerPC
AIX
PowerPC 750
Preliminary Edition (Version 2.0, 09/30/1999)
This document is the preliminary edition of
PowerPC 750
TM
SCM RISC Microprocessor for the PID8p-
750.
This document contains information on a new product under development by IBM. IBM reserves the
right to change or discontinue this product without notice.
© International Business Machines Corporation1999.
All rights reserved.
Preliminary Copy
PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical and Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 6
AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
IEEE 1149.1 AC Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 20
PowerPC PID8p-750 Microprocessor Pin Assignments . . . . . . . . . . . . 23
PowerPC PID8p-750 Microprocessor Pinout Listings . . . . . . . . . . . . . . 24
PowerPC PID8p-750 Microprocessor Package Description . . . . . . . . . 27
System Design Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Processor Version Register (PVR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
9/30/99
Version 2.0
Datasheet
Page iii
PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preliminary Copy
Page iv
Version 2.0
Datasheet
9/30/99
PowerPC 750 SCM RISC Microprocessor
Preliminary Copy
PID8p-750
Preface
The PowerPC PID8p-750 microprocessor is an implementation of the PowerPC
TM
family of reduced instruc-
tion set computer (RISC) microprocessors. In this document, the term “PID8p-750” is used as an abbreviation
for the phrase “PowerPC 750 SCM RISC Microprocessor Family: PID8p-750 microprocessor.”
This document contains pertinent physical characteristics of the PID8p-750 Single Chip Modules (SCM) and
covers the following topics:
Topic
• Overview (page 2)
• Features (page 3)
• General Parameters (page 5)
• Electrical and Thermal Characteristics (page 6)
• PowerPC PID8p-750 Microprocessor Pin Assignments (page 23)
• PowerPC PID8p-750 Microprocessor Pinout Listings (page 24)
• PowerPC PID8p-750 Microprocessor Package Description (page 27)
• System Design Information (page 30)
• Ordering Information (page 40)
New features/deletions for rev level dd3.x:
• Selectable I/O voltages on 60X bus (pin W1) and L2 bus (pin A19). See Table , “Recommended Operating
Conditions1,2,3,” on page 6. Older revs must leave these pins “no connect” or “tied high” for 3.3v I/Os. AC
timings are the same for all I/O voltage modes unless otherwise noted. The 1.8v I/O is selected by tying
the I/O select pin to ground. If a pull down resistor is necessary, the resistor value must be no more than
10 ohms.
• 60X bus to core frequency now also supports the 10x ratio. See Table , “PID8p-750 Microprocessor PLL
Configuration,” on page 30 for how to set this ratio.
• Extra output hold on the 60X bus by L2_TSTCLK pin tied low is no longer available. The L2_TSTCLK pin
must now be tied to OV
DD
for normal operation. See Table , “60X Bus Output AC Timing Specifications
1
,”
on page 13.
9/30/99
Version 2.0
Datasheet
Page 1

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2023 EEWORLD.com.cn, Inc. All rights reserved