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IBM25PPC970FX5SB261ET

器件型号:IBM25PPC970FX5SB261ET
器件类别:嵌入式处理器和控制器    微控制器和处理器   
厂商名称:IBM
厂商官网:http://www.ibm.com
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器件描述

RISC Microprocessor, 64-Bit, 1800MHz, CMOS, CBGA576, 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576

参数
参数名称属性值
厂商名称IBM
零件包装代码BGA
包装说明BGA,
针数576
Reach Compliance Codeunknown
ECCN代码3A001.A.3
地址总线宽度44
位大小64
边界扫描YES
最大时钟频率300 MHz
外部数据总线宽度44
格式FLOATING POINT
集成缓存YES
JESD-30 代码S-CBGA-B576
长度25 mm
低功率模式YES
端子数量576
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码BGA
封装形状SQUARE
封装形式GRID ARRAY
认证状态Not Qualified
座面最大高度3.137 mm
速度1800 MHz
最大供电电压1.05 V
最小供电电压0.95 V
标称供电电压1 V
表面贴装YES
技术CMOS
端子形式BALL
端子节距1 mm
端子位置BOTTOM
宽度25 mm
uPs/uCs/外围集成电路类型MICROPROCESSOR, RISC

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®
IBM PowerPC
®
970FX RISC Microprocessor
Datasheet
Preliminary Electrical Information
Version 0.5 (Draft)
Advance - IBM Confidential
March 26, 2004
®
©
Copyright International Business Machines Corporation 2002, 2003
All Rights Reserved
Printed in the United States of America June 2003
The following are trademarks of International Business Machines Corporation in the United States, or other countries,
or both.
IBM
IBM Logo
PowerPC
PowerPC Logo
PowerPC 970
PowerPC Architecture
Other company, product and service names may be trademarks or service marks of others.
Copyright and Disclaimer
Note:
All information contained in this document is subject to change without notice. Verify with your IBM field
application enginner that you have the latest version of this document before finalizing a design.
The products described in this document are NOT intended for use in applications such as implantation, life
support, or other hazardous uses where malfunction could result in death, bodily injury, or catastrophic prop-
erty damage. Nothing in this document shall operate as an express or implied license or indemnity under the
intellectual property rights of IBM or third parties, or give rise to any express or implied warranty. Information
contained in this document was obtained in specific environments, and is presented as an illustration. The
results obtained in other operating environments may vary.
THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN “AS IS” BASIS. In no event will IBM be
liable for damages arising directly or indirectly from any use of the information contained in this document.
IBM Microelectronics Division
2070 Route 52, Bldg. 330
Hopewell Junction, NY 12533-6351
The IBM home page can be found at
www.ibm.com
The IBM Microelectronics Division home page can be found at
www-3.ibm.com/chips
March 26, 2004
Advance - IBM Confidential
Datasheet
PowerPC 970FX
List of Figures ................................................................................................................ 5
List of Tables .................................................................................................................. 7
About This Datasheet .................................................................................................... 9
1. General Information .................................................................................................. 11
1.1 Description ....................................................................................................................................
1.2 Features .........................................................................................................................................
1.3 PowerPC 970FX Block Diagram ...................................................................................................
1.4 Ordering and Processor Version Register .................................................................................
11
11
13
14
2. General Parameters .................................................................................................. 15
3. Electrical and Thermal Characteristics ................................................................... 15
3.1 DC Electrical Characteristics .......................................................................................................
3.1.1 Absolute Maximum Ratings ...................................................................................................
3.1.2 Recommended Operating Conditions ...................................................................................
3.1.3 Package Thermal Characteristics ..........................................................................................
3.1.4 DC Electrical Specifications ...................................................................................................
3.1.5 Power Consumption ..............................................................................................................
3.2 AC Electrical Characteristics .......................................................................................................
3.3 Clock AC Specifications ...............................................................................................................
3.4 Processor-Clock Timing Relationship Between PSYNC and SYSCLK ....................................
3.5 Input AC Specifications ................................................................................................................
3.5.1 TBEN Input Pin ......................................................................................................................
3.6 Asynchronous Output Specifications .........................................................................................
3.7 Mode Select Input Timing Specifications ...................................................................................
3.8 Spread Spectrum Clock Generator (SSCG) ................................................................................
3.8.1 Design Considerations ..........................................................................................................
3.9 I
2
C and JTAG .................................................................................................................................
3.9.1 I
2
C Bus Timing Information ...................................................................................................
3.9.2 IEEE 1149.1 AC Timing Specifications .................................................................................
3.9.3 I2C and JTAG Considerations ...............................................................................................
3.9.4 Boundary Scan Considerations .............................................................................................
15
15
16
16
17
18
18
19
20
22
23
24
25
28
28
29
29
29
31
31
4. PowerPC 970FX Microprocessor Dimension and Physical Signal Assignments 32
4.1 ESD Considerations ......................................................................................................................
4.2 PowerPC 970FX Package Side and Top View ............................................................................
4.3 PowerPC 970FX Package Bottom View ......................................................................................
4.4 Microprocessor Ball Placement ...................................................................................................
4.5 PowerPC 970FX Microprocessor Pinout Listings ......................................................................
32
33
34
35
37
5. System Design Information ..................................................................................... 42
5.1 External Resisters ......................................................................................................................... 42
5.2 PLL Configuration ......................................................................................................................... 42
TOC_970_GM_DSTOC.fm.0.1
March 26, 2004
Page 3 of 59
Datasheet
PowerPC 970FX
Advance - IBM Confidential
5.2.1 Determining PLLMULT and BUS_CFG Settings ...................................................................
5.2.2 PLL_RANGE Configuration ...................................................................................................
5.3 PLL Power Supply Filtering ..........................................................................................................
5.4 Decoupling Recommendations ....................................................................................................
5.4.1 Using the KVPRBVDD and KVPRBGND Pins .......................................................................
5.5 Decoupling Layout Guide .............................................................................................................
5.6 Input-Output Usage .......................................................................................................................
5.6.1 Chip Signal I/O and Test Pins ................................................................................................
5.7 Thermal Management Information ...............................................................................................
5.7.1 Thermal Management pins ....................................................................................................
5.7.2 Reading Thermal Diode Calibration data via JTAG ...............................................................
5.7.3 Heatsink Attachment and Mounting Forces ...........................................................................
5.8 Operational and Design Considerations .....................................................................................
5.8.1 Power-On Reset Considerations ...........................................................................................
5.8.2 Debugging PowerPC 970FX Power-On and Reset Sequence ..............................................
5.8.3 I
2
C Addressing of PowerPC 970FX .......................................................................................
42
43
45
46
46
47
50
50
54
54
54
56
57
57
57
57
Revision Log ................................................................................................................. 59
Page 4 of 59
TOC_970_GM_DSTOC.fm.0.1
March 26, 2004
Advance - IBM Confidential
Datasheet
PowerPC 970FX
List of Figures
Figure 1-1. PowerPC 970FX Block Diagram ................................................................................................ 13
Figure 1-2. Part Number Legend .................................................................................................................. 14
Figure 3-1. Clock Differential HSTL Signal ................................................................................................... 20
Figure 3-2. Processor-Clock Timing Relationship Between PSYNC and SYSCLK ...................................... 21
Figure 3-3. Asynchronous Input Timing ........................................................................................................ 23
Figure 3-4. HRESET and BYPASS Timing Diagram .................................................................................... 26
Figure 3-5. Spread Spectrum Clock Generator (SSCG) Modulation Profile ................................................. 28
Figure 3-6. JTAG Clock Input Timing Diagram ............................................................................................. 30
Figure 3-7. Test Access Port Timing Diagram .............................................................................................. 31
Figure 4-1. PowerPC 970FX Microprocessor Mechanical Package (Side and Top View) ........................... 33
Figure 4-2. PowerPC 970FX Microprocessor Bottom Surface Nomenclature of CBGA Package (Bottom View)
34
Figure 4-3. PowerPC 970FX Ball Placement (Top View) ............................................................................. 35
Figure 4-4. PowerPC 970FX Ball Placement (Bottom View) ........................................................................ 36
Figure 5-1. PLL Power Supply Filter Circuit ................................................................................................. 45
Figure 5-2. Decoupling Capacitor (Decap) Locations
(Preliminary) ............................................................. 47
Figure 5-3. PowerPC 970FX Thermal Diode Implementation ...................................................................... 55
Figure 5-4. Force Diagram for the PowerPC 970FX Package ..................................................................... 56
LOF_970_GM_DSLOF.fm.0.1
March 26, 2004
List of Figures
Page 5 of 59
与IBM25PPC970FX5SB261ET相近的元器件有:IBM25PPC970FX5SB181ET、IBM25PPC970FX5SB101ET。描述及对比如下:
型号 IBM25PPC970FX5SB261ET IBM25PPC970FX5SB181ET IBM25PPC970FX5SB101ET
描述 RISC Microprocessor, 64-Bit, 1800MHz, CMOS, CBGA576, 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576 RISC Microprocessor, 64-Bit, 1600MHz, CMOS, CBGA576, 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576 RISC Microprocessor, 64-Bit, 1400MHz, CMOS, CBGA576, 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576
厂商名称 IBM IBM IBM
零件包装代码 BGA BGA BGA
包装说明 BGA, BGA, BGA,
针数 576 576 576
Reach Compliance Code unknown unknown unknown
ECCN代码 3A001.A.3 3A001.A.3 3A991.A.2
地址总线宽度 44 44 44
位大小 64 64 64
边界扫描 YES YES YES
最大时钟频率 300 MHz 300 MHz 300 MHz
外部数据总线宽度 44 44 44
格式 FLOATING POINT FLOATING POINT FLOATING POINT
集成缓存 YES YES YES
JESD-30 代码 S-CBGA-B576 S-CBGA-B576 S-CBGA-B576
长度 25 mm 25 mm 25 mm
低功率模式 YES YES YES
端子数量 576 576 576
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 BGA BGA BGA
封装形状 SQUARE SQUARE SQUARE
封装形式 GRID ARRAY GRID ARRAY GRID ARRAY
认证状态 Not Qualified Not Qualified Not Qualified
座面最大高度 3.137 mm 3.137 mm 3.137 mm
速度 1800 MHz 1600 MHz 1400 MHz
最大供电电压 1.05 V 1 V 1 V
最小供电电压 0.95 V 0.9 V 0.9 V
标称供电电压 1 V 0.95 V 0.95 V
表面贴装 YES YES YES
技术 CMOS CMOS CMOS
端子形式 BALL BALL BALL
端子节距 1 mm 1 mm 1 mm
端子位置 BOTTOM BOTTOM BOTTOM
宽度 25 mm 25 mm 25 mm
uPs/uCs/外围集成电路类型 MICROPROCESSOR, RISC MICROPROCESSOR, RISC MICROPROCESSOR, RISC

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