MITSUMI
Protection for Lithium-Ion Batteries (4-serial cells) MM3114 Series
Protection for Lithium-Ion Batteries (4-serial cells)
Monolithic IC MM3114 Series
Outline
This IC integrates overcharge/overdischarge protection functions for lithium-ion/lithium polymer rechargeable
batteries and the regulator functions into one chip by high voltage CMOS process. It can be used with other
gas gauge IC, security IC, etc. as it includes a regulator. Overcharge/overdischarge can be detected to
protect 4-cell lithium-ion/lithium polymer batteries. Charge/discharge control is perfomed using two external
Pch MOS FETs.
Features
Selectable between 4.0~4.5V by 5mV steps
Accuracy ±25mV
2. Over-discharge detection voltage Selectable between 2.0~3.0V by 100mV steps
Accuracy ±80mV
3. No external capacitor for delay time required (delay time is set by the internal circuit)
4. Regulator output voltage
Selectable between 2.0~4.0V by 0.2V steps
Accuracy ±3%
5. Regulator load current
100mA max.
6. Operating temperature range
-40~85ºC
1. Overcharge detection voltage
Package
VSOP-10A
Applications
1. Lithium-ion battery pack (four cells).
Ph
as
ed
O
ut
Pr
od
uc
ts
MITSUMI
Protection for Lithium-Ion Batteries (4-serial cells) MM3114 Series
Block Diagram
V
DD
Over
charge
Voltage
regulator
VREG
V3
Over
discharge
Over
charge
V
IN
OV
V2
Over
discharge
Over
charge
od
ut
Pr
Oscillator
Counter
uc
OV,DCHG
output
control
DCHG
CTL
V1
Over
discharge
Over
charge
V
SS
Pin Assignment
Ph
as
ed
Over
discharge
O
10
9
8
7
6
1
2
3
4
5
VSOP-10A
(TOP-VIEW)
1
2
3
4
5
6
7
8
9
10
DCHG
V
DD
V3
V2
V1
V
SS
VREG
CTL
V
IN
OV
ts
MITSUMI
Protection for Lithium-Ion Batteries (4-serial cells) MM3114 Series
Pin Description
Pin No.
1
2
3
4
5
6
7
Symbol
DCHG
V
DD
V3
V2
V1
V
SS
VREG
I/O
Output
Input
Input
Input
Input
Input
Output
Function
Output of over discharge detection. Output type is CMOS.
·Normal mode
: "Low"
·Overdischarge mode : "High"
The input terminal of the power supply of IC, and the positive voltage of V4 cell.
The input terminal of the positive voltage of V3 cell, and the negative voltage of
V4 cell.
The input terminal of the positive voltage of V2 cell, and the negative voltage of
V3 cell.
The input terminal of the positive voltage of V1 cell, and the negative voltage of
V2 cell.
The input terminal of the ground of IC, and the negative voltage of V1 cell.
The output terminal of a voltage regulator. (3. 3V).
The control terminal of FET for charge, and FET for discharge.
·CTL= "Low"
: DCHG= "Low" Normal mode
: OV= "Low"
Normal mode
·CTL= "High" or "Open" : DCHG= "High" discharge prohibition
: OV= "High"
charge prohibition
The input terminal of the charger voltage.
Output of over charge detection. Output type is CMOS.
·Normal mode
: "Low"
·Overcharge mode
: "High"
9
10
V
IN
OV
Input
Output
Absolute Maximum Ratings
Item
Storage temperature
Operating temperature
Supply voltage
V
IN
pin supply voltage
OV pin supply voltage
DCHG pin supply voltage
CTL pin supply voltage
Allowable loss
ed
O
(Ta=25°C)
Symbol
T
STG
T
OPR
V
DD max.
V
VIN max.
V
OV max.
V
DCHG max.
V
CTL max.
Pd
Ratings
-55~+125
-40~+85
V
SS
-0.3~V
SS
+24
V
SS
-0.3~V
SS
+28
V
SS
-0.3~V
IN
+0.3
V
SS
-0.3~V
DD
+0.3
V
SS
-0.3~V
DD
+0.3
300
ut
Units
°C
°C
V
V
V
V
V
mW
Recommended Operating Conditions
Item
Operating temperature
Supply voltage
Symbol
T
OPR
V
OPR
Ratings
-40~+85
V
SS
+2.0~V
SS
+18
Units
°C
V
Ph
as
Pr
od
uc
8
CTL
Input
ts
MITSUMI
Protection for Lithium-Ion Batteries (4-serial cells) MM3114 Series
Electrical Characteristics
Item
Consumption current
Current consumption
at stand-by
Pin3 (V3) nput current
Pin4 (V2) input current
Pin5 (V1) input current
Overcharge detection
voltage
Overcharge release
voltage
Overcharge detection dead time
Overcharge release dead time
Overdischarge detection voltage
Overdischarge release
voltage
Overdischarge
detection dead time
Overdischarge
release dead time
Pin1 (DCHG)
source current
Symbol
I
DD
I
S
I
V3
I
V2
I
V1
V
CELL
U
V
CELL
O
t
OV
t
OVREL
V
CELL
S
V
CELL
D
t
DC
t
DCREL
(Except where noted otherwise Ta=+25°C, V
IN
=V
DD
, V
CELL
=3.5V)
Measurement conditions
V
CELL
=3.5V, I
OUT
=0mA
V
CELL
=1.8V, I
OUT
=0mA
V
IN
=V
SS
V
CELL
=3.5V
V
CELL
=3.5V
V
CELL
=3.5V
Ta=0~+50°C
1
V
CELL
=3.5V 4.5V
Min.
Typ.
10
Max.
20
0.1
±300
±300
±300
4.325
V
CELL
U
-260mV
50
10
2.22
2.7
20
10
4.35
V
CELL
U
-200mV
100
20
2.3
2.8
40
20
4.375
V
CELL
U
-140mV
150
40
2.38
2.9
60
40
Units Circuit 2
µA
A
*
µA
nA
nA
nA
V
V
ms
ms
V
V
ms
ms
B
A
A
A
C
C
C
C
D
D
D
D
*
V
CELL
=4.5V
3.5V
V
CELL
=3.5V
V
CELL
=1.8V
1.8V
3.5V
I
SO
D
CH
Pin1 (DCHG) sink current
I
SI
D
CH
Pin1 (DCHG)
output voltage H
Pin1 (DCHG)
output voltage L
Pin10 (OV)
source current
Pin10 (OV)
sink current
V
TH
D
C
H
V
TH
D
C
L
I
SO
O
V
I
SI
O
V
Pin10 (OV)
output voltage H
Pin10 (OV)
output voltage L
V
TH
O
V
H
V
TH
O
V
L
Pin7 (CTL) High current
I
CTLH
Pin7 (CTL) Low current
I
CTLL
Pin7 (CTL) High voltage
V
CTLH
Pin7 (CTL) Low voltage
V
CTLL
Pin8 (VREG) output voltage
V
OUT
Pin8 (VREG) line regulation
V
OUT1
Pin8 (VREG) load regulation
V
OUT2
V
CELL
< V
CELL
S
V
DCHG
=V
DD
-0.5V
V
IN
=V
SS
V
DCHG
=0.5V
V
CELL
< V
CELL
S
V
DD
-V
DCHG
I
SO
=20µA V
IN
=V
SS
V
DCHG
-V
SS
I
SI
=-20µA
V
CELL
> V
CELL
U
V
OV
=V
IN
-0.5V
V
OV
=0.5V
1
Ta=-40~85°C
V
CELL
> V
CELL
U
V
IN
-V
OV
I
SO
=20µA
V
OV
-V
SS
I
SI
=-20µA
1
Ta=-40~85°C
V
CELL
=3.5V, V
CTL
=V
DD
V
CELL
=3.5V, V
CTL
=V
SS
Pr
od
20
20
uc
20
20
-1
V
DD
0.8
-0.5
3.221
3.300
5
40
V
CELL
=3.5V 4.5V
V
CELL
=4.5V 3.5V
V
CELL
=3.5V 1.8V
V
IN
=V
DD
V
CELL
=1.8V 3.5V
ts
µA
µA
0.5
V
E
F
E
ed
O
ut
0.5
V
µA
µA
F
G
F
Ph
as
*
0.5
V
G
0.5
0.1
V
µA
µA
V
V
V
mV
mV
F
H
A
I
I
J
J
J
*
V
CELL
=3.5V, I
OUT
=1mA
V
CELL=
2.4V 6V, I
OUT
=1mA
V
CELL
=3.5V, I
OUT
=1 20mA
V
DD
0.2
3.379
15
80
*
1 : The parameter is guaranteed by design.
*
2 : The test circuit symbols on next page.
MITSUMI
Protection for Lithium-Ion Batteries (4-serial cells) MM3114 Series
Measuring Circuit
A
F
1 DCHG
A
V
A
A
A
4 V2
5 V1
VREG 7
V
SS
6
4 V2
5 V1
VREG 7
V
SS
6
2 V
DD
3 V3
V
IN
9
CTL 8
OV 10
A
V
1 DCHG
A
A
2 V
DD
3 V3
OV 10
V
IN
9
CTL 8
B
1 DCHG
A
2 V
DD
3 V3
4 V2
5 V1
OV 10
V
IN
9
CTL 8
VREG 7
V
SS
6
G
1 DCHG
OV 10
V
IN
9
CTL 8
V
uc
4 V2
5 V1
OSCILLOSCOPE
ts
3 V3
2 V
DD
VREG 7
V
SS
6
Pr
1 DCHG
2 V
DD
3 V3
4 V2
5 V1
OV 10
V
IN
9
A
CTL 8
VREG 7
V
SS
6
C
1 DCHG
2 V
DD
V
3 V3
V
4 V2
V
5 V1
V
OV 10
V
IN
9
CTL 8
VREG 7
V
SS
6
H
D
OSCILLOSCOPE
as
Ph
ed
I
OSCILLOSCOPE
O
ut
od
OSCILLOSCOPE
1 DCHG
2 V
DD
3 V3
OV 10
V
IN
9
CTL 8
VREG 7
V
SS
6
1 DCHG
2 V
DD
3 V3
4 V2
5 V1
OV 10
V
IN
9
CTL 8
VREG 7
V
SS
6
V
V
V
4 V2
V
5 V1
V
E
J
1 DCHG
2 V
DD
3 V3
4 V2
5 V1
OV 10
V
IN
9
CTL 8
VREG 7
V
SS
6
V
1 DCHG
V
2 V
DD
3 V3
4 V2
5 V1
OV 10
V
IN
9
CTL 8
VREG 7
V
SS
6
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