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24LC1026-I/ST

器件型号:24LC1026-I/ST
器件类别:存储    存储   
厂商名称:Microchip(微芯科技)
厂商官网:https://www.microchip.com
标准:
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器件描述

电可擦除可编程只读存储器 1024K 128K X 8, 1.8V SER EE

参数
参数名称属性值
是否Rohs认证符合
厂商名称Microchip(微芯科技)
包装说明TSSOP-8
Reach Compliance Codecompliant
最大时钟频率 (fCLK)0.4 MHz
数据保留时间-最小值200
耐久性1000000 Write/Erase Cycles
I2C控制字节1010DDMR
JESD-30 代码R-PDSO-G8
JESD-609代码e3
长度4.4 mm
内存密度1048576 bit
内存集成电路类型EEPROM
内存宽度8
湿度敏感等级1
功能数量1
端子数量8
字数131072 words
字数代码128000
工作模式SYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织128KX8
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP8,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行SERIAL
峰值回流温度(摄氏度)260
反向引出线NO
座面最大高度1.2 mm
串行总线类型I2C
最大待机电流0.000005 A
最大压摆率0.005 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
宽度3 mm
最长写入周期时间 (tWC)5 ms
写保护HARDWARE

文档预览

24AA1026/24LC1026/24FC1026
1024K I
2
C
CMOS Serial EEPROM
Device Selection Table:
Part
Number
24AA1026
24LC1026
24FC1026
V
CC
Range
1.7-5.5V
2.5-5.5V
1.8-5.5V
Max. Clock
Frequency
400 kHz
400 kHz
1 MHz
Temp.
Ranges
I
I
I
Functional address lines allow up to four devices on the
same data bus. This allows for up to 4 Mbits total
system EEPROM memory. This device is available in
the standard 8-pin PDIP, SOIC and SOIJ packages.
Package Type
PDIP
NC
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
100 kHz for V
CC
< 2.5V
400 kHz for V
CC
< 2.5V
Features:
• Low-Power CMOS Technology:
- Read current 450
A,
maximum
- Standby current 5
A,
maximum
• 2-Wire Serial Interface, I
2
C™ Compatible
• Cascadable up to Four Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• 1 MHz Clock for FC Versions
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 128-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >400V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programming Available
• Packages include 8-lead PDIP, SOIJ and SOIC
• Pb-Free and RoHS Compliant
• Temperature Ranges:
- Industrial (I):
-40C to +85C
SOIJ/SOIC
NC
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
Block Diagram
A1 A2
WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page Latches
I/O
SCL
YDEC
SDA
V
CC
V
SS
Sense AMP
R/W Control
Description:
The Microchip Technology Inc. 24AA1026/24LC1026/
24FC1026 (24XX1026*) is a 128K x 8 (1024K bit)
Serial Electrically Erasable PROM, capable of
operation across a broad voltage range (1.7V to 5.5V).
It has been developed for advanced, low-power
applications such as personal communications or data
acquisition. This device has both byte write and page
write capability of up to 128 bytes of data.
This device is capable of both random and sequential
reads. Reads may be sequential within address
boundaries 0000h to FFFFh and 10000h to 1FFFFh.
*24XX1026 is used in this document as a generic part number
for the 24AA1026/24LC1026/24FC1026 devices.
2011 Microchip Technology Inc.
DS22270A-page 1
24AA1026/24LC1026/24FC1026
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
.......................................................................................................... -0.6V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ..................................................................................................-40°C to +85°C
ESD protection on all pins

4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I):
Min.
0.7 V
CC
0.05 V
CC
V
CC
= +1.7V to 5.5V T
A
= -40°C to +85°C
Max.
0.3 V
CC
0.2 V
CC
Units
V
V
V
V
V
CC
2.5V
V
CC
< 2.5V
V
CC
2.5V
(Note)
Conditions
DC CHARACTERISTICS
Param.
No.
Sym.
D1
D2
D3
V
IH
V
IL
V
HYS
Characteristic
A1, A2, SCL, SDA and
WP pins:
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs
(SDA, SCL pins)
Low-level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
D4
D5
D6
D7
D8
D9
V
OL
I
LI
I
LO
C
IN
,
C
OUT
I
CC
Write
I
CCS
0.40
±1
±1
10
450
5
5
V
A
A
pF
A
mA
A
I
OL
= 3.0 mA @ V
CC
= 4.5V
I
OL
= 2.1 mA @ V
CC
= 2.5V
V
IN
= V
SS
or V
CC
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.0V
(Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
V
CC
= 5.5V
SCL, SDA, V
CC
= 5.5V
A1, A2, WP = V
SS
I
CC
Read Operating current
Standby current
Note:
This parameter is periodically sampled and not 100% tested.
DS22270A-page 2
2011 Microchip Technology Inc.
24AA1026/24LC1026/24FC1026
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
Characteristic
Clock frequency
Min.
4000
600
600
500
4700
1300
1300
500
4000
600
600
250
4700
600
600
250
0
250
100
100
100
4000
600
600
250
4000
600
600
600
4700
1300
1300
1300
AC CHARACTERISTICS
Param.
No.
1
Sym.
F
CLK
V
CC
= +1.7V to 5.5V T
A
= -40°C to +85°C
Max.
100
400
400
1000
1000
300
300
300
300
100
3500
900
900
400
Units
kHz
Conditions
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
All except 24FC1026
1.8V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
(Note
2)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
2
T
HIGH
Clock high time
ns
3
T
LOW
Clock low time
ns
4
T
R
SDA and SCL rise time
(Note
1)
ns
5
6
T
F
SDA and SCL fall time
(Note
1)
ns
ns
T
HD
:
STA
Start condition hold time
7
T
SU
:
STA
Start condition setup time
ns
8
9
T
HD
:
DAT
Data input hold time
T
SU
:
DAT
Data input setup time
ns
ns
10
T
SU
:
STO
Stop condition setup time
ns
11
T
SU
:
WP
WP setup time
ns
12
T
HD
:
WP
WP hold time
ns
13
T
AA
Output valid from clock
(Note
2)
ns
Note 1:
2:
3:
4:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
2011 Microchip Technology Inc.
DS22270A-page 3
24AA1026/24LC1026/24FC1026
AC CHARACTERISTICS (Continued)
Param.
No.
14
Sym.
T
BUF
Characteristic
Bus free time: Time the bus
must be free before a new
transmission can start
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page)
Endurance
Note 1:
2:
3:
4:
Industrial (I):
Min.
4700
1300
1300
500
1,000,000
V
CC
= +1.7V to 5.5V T
A
= -40°C to +85°C
Max.
50
5
Units
ns
Conditions
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
2.5V (24FC1026 only)
2.5V
V
CC
5.5V (24FC1026 only)
All except 24FC1026
(Note
1
and
Note 3)
15
16
17
T
SP
T
WC
ns
ms
cycles Page mode, 25°C, V
CC
= 5.5V
(Note
4)
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
5
2
D3
4
SCL
SDA
IN
7
6
15
3
8
9
10
13
SDA
OUT
(protected)
(unprotected)
14
WP
11
12
DS22270A-page 4
2011 Microchip Technology Inc.
24AA1026/24LC1026/24FC1026
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in
Table 2-1.
TABLE 2-1:
NC
A1
A2
V
SS
SDA
SCL
WP
V
CC
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
Function
Not Connected
User Configurable Chip
Select
User Configurable Chip
Select
Ground
Serial Data
Serial Clock
Write-Protect Input
+1.7 to 5.5V (24AA1026)
+2.5 to 5.5V (24LC1026)
+1.8 to 5.5V (24FC1026)
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Name PDIP SOIJ SOIC
2.1
A1, A2 Chip Address Inputs
The A1 and A2 inputs are used by the 24XX1026 for
multiple device operations. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the comparison is true.
Up to four devices may be connected to the same bus
by using different Chip Select bit combinations. In most
applications, the chip address inputs A1 and A2 are
hard-wired to logic ‘0’ or logic ‘1’. For applications in
which these pins are controlled by a microcontroller or
other programmable device, the chip address pins
must be driven to logic ‘0’ or logic ‘1’ before normal
device operation can proceed.
2.2
Serial Data (SDA)
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V
CC
(typical 10 k for 100 kHz, 2 kfor
400 kHz and 1 MHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.3
Serial Clock (SCL)
This input is used to synchronize the data transfer from
and to the device.
2.4
Write-Protect (WP)
This pin must be connected to either V
SS
or V
CC
. If tied
to V
SS
, write operations are enabled. If tied to V
CC
,
write operations are inhibited, but read operations are
not affected.
2011 Microchip Technology Inc.
DS22270A-page 5
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