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TSM680P06DPQ56 RLG

器件型号:TSM680P06DPQ56 RLG
器件类别:半导体    分立半导体   
文件大小:446KB,共6页
厂商名称:Taiwan Semiconductor
厂商官网:http://www.taiwansemi.com/
标准:
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器件描述

MOSFET 2 P-CH 60V 12A 8PDFN

参数
参数名称属性值
FET 类型2 个 P 沟道(双)
FET 功能标准
漏源电压(Vdss)60V
电流 - 连续漏极(Id)(25°C 时)12A(Tc)
不同 Id,Vgs 时的 Rds On(最大值)68 毫欧 @ 6A,10V
不同 Id 时的 Vgs(th)(最大值)2.5V @ 250µA
不同 Vgs 时的栅极电荷 (Qg)(最大值)16.4nC @ 10V
不同 Vds 时的输入电容(Ciss)(最大值)870pF @ 30V
功率 - 最大值3.5W
工作温度-55°C ~ 150°C(TJ)
安装类型表面贴装
封装/外壳8-PowerTDFN
供应商器件封装8-PDFN(5x6)

文档预览

TSM680P06D
Taiwan Semiconductor
Dual P-Channel MOSFET
-60V, -12A, 68mΩ
FEATURES
Fast switching
Low thermal resistance package
Low profile package
Pb-free plating
Compliant to RoHS directive 2011/65/EU and in
accordance to WEEE 2002/96/EC
Halogen-free according to IEC 61249-2-21 definition
Power Supply
Motor Control
PDFN56 Dual
KEY PERFORMANCE PARAMETERS
PARAMETER
V
DS
R
DS(on)
(max)
Q
g
V
GS
= -10V
V
GS
= -4.5V
VALUE
-60
68
110
16.4
nC
UNIT
V
APPLICATION
Dual P-Channel MOSFET
Note:
MSL 1 (Moisture Sensitivity Level) per J-STD-020
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
(Note 1)
SYMBOL
V
DS
V
GS
T
C
= 25°C
T
C
= 100°C
I
D
I
DM
P
DTOT
E
AS
I
AS
T
J
, T
STG
(Note 3)
(Note 3)
LIMIT
-60
±20
-12
-8
-48
3.5
7.2
12
- 55 to +150
UNIT
V
V
A
A
W
mJ
A
°C
(Note 2)
Total Power Dissipation @ T
C
= 25°C
Single Pulsed Avalanche Energy
Single Pulsed Avalanche Current
Operating Junction and Storage Temperature Range
THERMAL PERFORMANCE
PARAMETER
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance
SYMBOL
R
ӨJC
R
ӨJA
LIMIT
4.5
85
UNIT
°C/W
°C/W
Notes:
R
ӨJA
is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. R
ӨJA
is guaranteed by design while R
ӨCA
is determined by the user’s board
design. R
ӨJA
shown below for single device operation on FR-4 PCB in still air
Document Number:DS_P0000162
1
Version: B1710
TSM680P06D
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Static
(Note 4)
CONDITIONS
V
GS
= 0V, I
D
= -250µA
V
DS
= V
GS
, I
D
= -250µA
V
GS
= ±20V, V
DS
= 0V
V
DS
= -60V, V
GS
= 0V
V
DS
= -48V, Tc = 125ºC
V
GS
= -10V, I
D
= -6A
V
GS
= -4.5V, I
D
= -3A
V
DS
= -10V, I
D
= -6A
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
MIN
TYP
MAX
UNIT
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
-60
-1.2
--
--
--
--
--
--
--
-1.6
--
--
--
54
90
8.5
--
-2.5
±100
-1
-10
68
110
--
V
V
nA
µA
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
(Note 5)
R
DS(on)
g
fs
Q
g
S
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
(Note 6)
--
--
--
--
--
--
16.4
2.8
3.6
870
70
42
--
--
--
--
--
--
pF
nC
V
DS
= -30V, I
D
= -6A,
V
GS
= -10V
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
V
DS
= -30V, V
GS
= 0V,
f = 1.0MHz
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Source-Drain Diode
(Note 4)
--
--
--
--
8.3
42.4
64.6
16.4
--
--
--
--
ns
V
DD
= -30V, I
D
= -1A,
R
GEN
=6Ω
t
r
t
d(off)
t
f
Maximum Continuous Drain-Source
Diode Forward Current
Maximum Pulse Drain-Source
Diode Forward Current
Diode-Source Forward Voltage
Notes:
1.
2.
3.
4.
5.
6.
Current limited by package
Pulse width limited by the maximum junction temperature
L = 0.1mH, I
AS
= -12A, V
DD
= -25V, R
G
= 25Ω, Starting T
J
= 25 C
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
For DESIGN AID ONLY, not subject to production testing.
Switching time is essentially independent of operating temperature.
o
Integral reverse diode
in the MOSFET
V
GS
= 0V, I
S
= -1A
I
S
I
SM
V
SD
--
--
--
--
--
--
-12
-48
-1
A
A
V
Document Number:DS_P0000162
2
Version: B1710
TSM680P06D
Taiwan Semiconductor
ORDERING INFORMATION (EXAMPLE)
PART NO.
TSM680P06DPQ56 RLG
RGG
Note:
1.
2.
PACKAGE
PDFN56 Dual
PACKING
2,500pcs / 13”Reel
Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
Halogen-free according to IEC 61249-2-21 definition
Document Number:DS_P0000162
3
Version: B1710
TSM680P06D
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Continuous Drain Current vs. T
C
-I
D
, Continuous Drain Current (A)
Normalized R
DS(ON)
vs. T
J
Normalized On Resistance
T
C
, Case Temperature (℃)
Normalized Vth vs. T
J
Normalized Gate Threshold Voltage
-V
GS
, Gate to Source Voltage (V)
T
J
, Junction Temperature (℃)
Gate Charge Waveform
T
J
, Junction Temperature (℃)
Normalized Transient Impedance
Normalized Thermal Response
-I
D
, Continuous Drain Current (A)
Q
g
, Gate Charge (nC)
Maximum Safe Operation Area
Square Wave Pulse Duration
(s)
-V
DS
, Drain to Source Voltage (V)
Document Number:DS_P0000162
4
Version: B1710
TSM680P06D
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS
(Unit:
Millimeters)
PDFN56 Dual
SUGGESTED PAD LAYOUT
(Unit:
Millimeters)
MARKING DIAGRAM
Y
= Year Code
M
= Month Code for Halogen Free Product
O
=Jan
P
=Feb
Q
=Mar
R
=Apr
`
S
=May
T
=Jun
U
=Jul
V
=Aug
W
=Sep
X
=Oct
Y
=Nov
Z
=Dec
L
= Lot Code (1~9, A~Z)
Document Number:DS_P0000162
5
Version: B1710

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