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TC1301B-AIAVMFTR

器件型号:TC1301B-AIAVMFTR
器件类别:半导体    电源管理   
厂商名称:Microchip(微芯科技)
厂商官网:https://www.microchip.com
标准:
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器件描述

LDO Voltage Regulators Dual CMOS LDO

参数
参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
Microchip(微芯科技)
产品种类
Product Category
LDO Voltage Regulators
RoHSDetails
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
DFN-8
Output Voltage3.3 V
Output Current300 mA
Number of Outputs2 Output
PolarityPositive
Input Voltage MAX6 V
Input Voltage MIN2.7 V
输出类型
Output Type
Fixed
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 125 C
Load Regulation0.1 %
Dropout Voltage0.104 V at 300 mA
系列
Packaging
Reel
高度
Height
0.88 mm
长度
Length
3 mm
宽度
Width
3 mm
Dropout Voltage - Max180 mV at 300 mA
Voltage Regulation Accuracy0.5 %
Ib - Input Bias Current58 uA
Line Regulation0.02 % / V
工厂包装数量
Factory Pack Quantity
3300
单位重量
Unit Weight
0.001319 oz

文档预览

TC1301A/B
Dual LDO with Microcontroller RESET Function
Features
• Dual Output LDO with Microcontroller Reset
Monitor Functionality:
- V
OUT1
= 1.5V to 3.3V @ 300 mA
- V
OUT2
= 1.5V to 3.3V @ 150 mA
- V
RESET
= 2.20V to 3.20V
• Output Voltage and RESET Threshold Voltage
Options Available (See Table 8-1)
• Low Dropout Voltage:
- V
OUT1
= 104 mV @ 300 mA, Typical
- V
OUT2
= 150 mV @ 150 mA, Typical
• Low Supply Current: 116 µA, Typical
TC1301A/B with both output voltages available
• Reference Bypass Input for Low-Noise Operation
• Both Output Voltages Stable with a Minimum of
1 µF Ceramic Output Capacitor
• Separate Input for RESET Detect Voltage
(TC1301A)
• Separate V
OUT1
and V
OUT2
SHDN pins
(TC1301B)
• RESET Output Duration: 300 ms. Typical
• Power-Saving Shutdown Mode of Operation
• Wake-up from SHDN: 5.3 µs. Typical
• Small 8-pin DFN and MSOP Package Options
• Operating Junction Temperature Range:
- -40°C to +125°C
• Overtemperature and Overcurrent Protection
Description
The TC1301A/B combines two Low Dropout (LDO)
regulators and a microcontroller RESET function into a
single 8-pin MSOP or DFN package. Both regulator
outputs feature low dropout voltage, 104 mV
@ 300 mA for V
OUT1
, 150 mV @ 150 mA for V
OUT2
,
low quiescent current consumption, 58 µA each and a
typical regulation accuracy of 0.5%. Several fixed-
output voltage and detector voltage combinations are
available. A reference bypass pin is available to further
reduce output noise and improve the power supply
rejection ratio of both LDOs.
The TC1301A/B is stable over all line and load
conditions with a minimum of 1 µF of ceramic output
capacitance, and utilizes a unique compensation
scheme to provide fast dynamic response to sudden
line voltage and load current changes.
For the TC1301A, the microcontroller RESET function
operates independently of both V
OUT1
and V
OUT2
. The
input to the RESET function is connected to the V
DET
pin.The SHDN2 pin is used to control the output of
V
OUT2
only. V
OUT1
will power-up and down with V
IN
.
In the case of the TC1301B, the detect voltage input of
the RESET function is connected internally to V
OUT1
.
Both V
OUT1
and V
OUT2
have independent shutdown
capability.
Additional features include an overcurrent limit and
overtemperature protection that, when combined,
provide a robust design for all load fault conditions.
Applications
Cellular/GSM/PHS Phones
Battery-Operated Systems
Hand-Held Medical Instruments
Portable Computers/PDAs
Linear Post-Regulators for SMPS
Pagers
Package Types
8-Pin DFN/MSOP
TC1301A
DFN8
RESET 1
V
OUT1
2
GND 3
Bypass 4
8 V
DET
7 V
IN
6 V
OUT2
5 SHDN2
RESET 1
V
OUT1
2
GND 3
Bypass 4
MSOP8
8 V
DET
7 V
IN
6 V
OUT2
5 SHDN2
Related Literature
• AN765, “Using Microchip’s Micropower LDOs”,
DS00765, Microchip Technology Inc., 2002
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766, Microchip Technology
Inc., 2002
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”,
DS00792, Microchip Technology Inc., 2001
TC1301B
DFN8
RESET 1
V
OUT1
2
GND 3
Bypass 4
8 SHDN1
7 V
IN
6 V
OUT2
5 SHDN2
RESET 1
V
OUT1
2
GND 3
Bypass 4
MSOP8
8 SHDN1
7 V
IN
6 V
OUT2
5 SHDN2
©
2005 Microchip Technology Inc.
DS21798B-page 1
TC1301A/B
Functional Block Diagrams
TC1301A
V
IN
LDO #1
300 mA
V
OUT1
V
IN
SHDN1
LDO #1
300 mA
TC1301B
V
OUT1
V
OUT2
SHDN2
LDO #2
150 mA
SHDN2
LDO #2
150 mA
V
OUT2
Bypass
Bypass
V
DET
RESET
V
OUT1
RESET
2.7V
to
4.2V
BATTERY
C
IN
1 µF
2.7V
to
4.2V
GND
Bandgap
Reference
1.2V
GND
Bandgap
Reference
1.2V
Threshold
Detector
Time Delay
300 ms typ
V
DET
Threshold
Detector
Time Delay
300 ms, typ
Typical Application Circuits
TC1301A
System RESET
2.8V @ 300 mA
C
OUT1
1 µF Ceramic
X5R
C
BYPASS
10 nF Ceramic
(Note)
1
RESET
V
DET
8
V
IN
7
V
OUT2
6 2.6V @ 150 mA
5
BATTERY
C
IN
1 µF
2 V
OUT1
3
4
GND
Bypass SHDN2
C
OUT2
1 µF Ceramic
X5R
ON/OFF Control V
OUT2
ON/OFF Control V
OUT1
TC1301B
System RESET
2.8V @ 300 mA
C
OUT1
1 µF Ceramic
X5R
1
RESET SHDN1
8
2 V
OUT1
3
4
GND
V
IN
7
V
OUT2
6 2.6V @ 150 mA
5
Bypass SHDN2
C
OUT2
1 µF Ceramic
X5R
Note:
C
BYPASS
is optional
ON/OFF Control V
OUT2
DS21798B-page 2
©
2005 Microchip Technology Inc.
TC1301A/B
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings †
V
DD
...................................................................................6.5V
Maximum Voltage on Any Pin ...... (V
SS
– 0.3) to (V
IN
+ 0.3)V
Power Dissipation ..........................Internally Limited
(Note 7)
Storage temperature .....................................-65°C to +150°C
Maximum Junction Temperature, T
J
........................... +150°C
Continuous Operating Temperature Range ..-40°C to +125°C
ESD protection on all pins, HBM, MM
.....................
4 kV, 400V
DC CHARACTERISTICS
Electrical Specifications:
Unless otherwise noted, V
IN
= V
R
+1V, I
OUT1
= I
OUT2
= 100 µA, C
IN
= 4.7 µF, C
OUT1
= C
OUT2
= 1 µF,
C
BYPASS
= 10 nF, SHDN > V
IH
, T
A
= +25°C.
Boldface
type specifications apply for junction temperatures of -40°C to +125°C.
Parameters
Input Operating Voltage
Maximum Output Current
Maximum Output Current
Output Voltage Tolerance
(V
OUT1
and V
OUT2
)
Temperature Coefficient
(V
OUT1
and V
OUT2
)
Line Regulation
(V
OUT1
and V
OUT2
)
Load Regulation, V
OUT
2.5V
(V
OUT1
and V
OUT2
)
Load Regulation, V
OUT
< 2.5V
(V
OUT1
and V
OUT2
)
Thermal Regulation
Dropout Voltage (Note 6)
V
OUT1
2.7V
V
OUT2
2.6V
Supply Current
TC1301A
TC1301B
Note 1:
2:
3:
4:
I
IN(A)
I
IN(B)
103
114
180
180
µA
µA
SHDN2 = V
IN
, V
DET
= OPEN,
I
OUT1
= I
OUT2
= 0 mA
SHDN1 = SHDN2 = V
IN
,
I
OUT1
= I
OUT2
= 0 mA
V
IN
– V
OUT
V
IN
– V
OUT
104
150
180
250
mV
mV
I
OUT1
= 300 mA
I
OUT2
= 150 mA
Sym
V
IN
I
OUT1Max
I
OUT2Max
V
OUT
TCV
OUT
ΔV
OUT
/
ΔV
IN
ΔV
OUT
/
V
OUT
ΔV
OUT
/
V
OUT
ΔV
OUT
/ΔP
D
Min
2.7
300
150
Typ
Max
6.0
Units
V
mA
mA
%
ppm/°C
%/V
%
%
%/W
Note 1
V
IN
= 2.7V to 6.0V
(Note 1)
V
IN
= 2.7V to 6.0V
(Note 1)
Note 2
Note 3
(V
R
+1V)
V
IN
6V
I
OUTX
= 0.1 mA to I
OUTMax
(Note 4)
I
OUTX
= 0.1 mA to I
OUTMax
(Note 4)
Note 5
Conditions
V
R
– 2.5
V
R
±0.5
V
R
+ 2.5
-1
-1.5
25
0.02
0.1
0.1
0.04
0.2
+1
+1.5
5:
6:
The minimum V
IN
has to meet two conditions: V
IN
2.7V and V
IN
V
R
+ V
DROPOUT
.
V
R
is defined as the higher of the two regulator nominal output voltages (V
OUT1
or V
OUT2
).
TCV
OUT
= ((V
OUTmax
- V
OUTmin
) * 10
6
)/(V
OUT
*
ΔT).
Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to I
LMAX
at V
IN
= 6V for
t = 10 ms.
Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value
measured at a 1V differential.
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., T
A
, T
J
,
θ
JA
). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown
.
7:
©
2005 Microchip Technology Inc.
DS21798B-page 3
TC1301A/B
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications:
Unless otherwise noted, V
IN
= V
R
+1V, I
OUT1
= I
OUT2
= 100 µA, C
IN
= 4.7 µF, C
OUT1
= C
OUT2
= 1 µF,
C
BYPASS
= 10 nF, SHDN > V
IH
, T
A
= +25°C.
Boldface
type specifications apply for junction temperatures of -40°C to +125°C.
Parameters
Shutdown Supply Current
TC1301A
Shutdown Supply Current
TC1301B
Power Supply Rejection Ratio
Output Noise
Sym
I
IN_SHDNA
I
IN_SHDNB
PSRR
eN
Min
Typ
58
0.1
58
830
Max
90
1
Units
µA
µA
dB
nV/(Hz)
½
Conditions
SHDN2 = GND, V
DET
= OPEN
SHDN1 = SHDN2 = GND
f
100 Hz, I
OUT1
= I
OUT2
= 50 mA,
C
IN
= 0 µF
f
1 kHz, I
OUT1
= I
OUT2
= 50 mA,
C
IN
= 0 µF
R
LOAD1
R
LOAD2
V
IN
= 2.7V to 6.0V
V
IN
= 2.7V to 6.0V
V
IN
= 5V, I
OUT1
= I
OUT2
= 30 mA,
See Figure 5-1
V
IN
= 5V, I
OUT1
= I
OUT2
= 50 mA,
See Figure 5-2
V
IN
= 5V, I
OUT1
= I
OUT2
= 100 µA
V
IN
= 5V
T
A
= 0°C to +70°C
T
A
= -40°C to +125°C
Output Short-Circuit Current (Average)
V
OUT1
V
OUT2
SHDN Input High Threshold
SHDN Input Low Threshold
Wake-Up Time (From SHDN
mode), (V
OUT2
)
Settling Time (From SHDN mode),
(V
OUT2
)
Thermal Shutdown Die
Temperature
Thermal Shutdown Hysteresis
Voltage Range
I
OUTsc
I
OUTsc
V
IH
V
IL
t
WK
t
S
T
SD
T
HYS
V
DET
45
1.0
1.2
200
140
5.3
50
150
10
15
20
6.0
6.0
mA
mA
%V
IN
%V
IN
µs
µs
°C
°C
V
RESET Threshold
V
TH
ΔV
TH
/ΔT
t
RPD
t
RPU
-1.4
-2.8
30
180
300
+1.4
+2.8
560
%
%
ppm/°C
µs
ms
V
DET
= V
TH
to (V
TH
– 100 mV),
See Figure 5-3
V
DET
= V
TH
- 100 mV to V
TH
+ 100 mV,
I
SINK
= 1.2 mA,
See Figure 5-3.
V
DET
= V
THmin
, I
SINK
= 1.2 mA,
I
SINK
= 100 µA for V
DET
< 1.8V,
See Figure 5-3
V
DET
> V
THmax
, I
SOURCE
= 500 µA,
See Figure 5-3
T
A
= -40°C to +125°C
RESET Threshold Tempco
V
DET
RESET Delay
RESET Active Time-out Period
140
RESET Output Voltage Low
V
OL
0.9
V
DET
0.2
V
RESET Output Voltage High
Note 1:
2:
3:
4:
V
OH
V
5:
6:
The minimum V
IN
has to meet two conditions: V
IN
2.7V and V
IN
V
R
+ V
DROPOUT
.
V
R
is defined as the higher of the two regulator nominal output voltages (V
OUT1
or V
OUT2
).
TCV
OUT
= ((V
OUTmax
- V
OUTmin
) * 10
6
)/(V
OUT
*
ΔT).
Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to I
LMAX
at V
IN
= 6V for
t = 10 ms.
Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value
measured at a 1V differential.
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., T
A
, T
J
,
θ
JA
). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown
.
7:
DS21798B-page 4
©
2005 Microchip Technology Inc.
TC1301A/B
TEMPERATURE SPECIFICATIONS
Electrical Specifications:
Unless otherwise indicated, all limits are specified for: V
IN
= +2.7V to +6.0V.
Parameters
Temperature Ranges
Operating Junction Temperature
Range
Storage Temperature Range
Maximum Junction Temperature
Thermal Package Resistances
Thermal Resistance, MSOP8
Thermal Resistance, DFN8
θ
JA
θ
JA
208
41
°C/W Typical 4-Layer Board
°C/W Typical 4-Layer Board with Vias
T
A
T
A
T
J
-40
-65
+125
+150
+150
°C
°C
°C
Transient
Steady State
Sym
Min
Typ
Max
Units
Conditions
©
2005 Microchip Technology Inc.
DS21798B-page 5
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