TDA7850
4 x 50 W MOSFET quad bridge power amplifier
Features
■ High output power capability:
– 4 x 50 W/4 max.
– 4 x 30 W/4 @ 14.4 V, 1 kHz, 10 %
– 4 x 80 W/2 max.
– 4 x 55 W/2 @ 14.4V, 1 kHz, 10 %
■ MOSFET output power stage Flexiwatt25
(Vertical)
■ Excellent 2 driving capability
■ Hi-Fi class distortion
■ Low output noise
■ ST-BY function
■ Mute function
■ Automute at min. supply voltage detection
■ Low external component count: Flexiwatt25
– Internally fixed gain (26 dB) (Horizontal)
– No external compensation
– No bootstrap capacitors
■ On board 0.35 A high side driver
■ ESD
Protections:
■ Output short circuit to gnd, to Vs, across the Description
load The TDA7850 is a breakthrough MOSFET
■ Very inductive loads technology class AB audio power amplifier in
■ Overrating chip temperature with soft thermal Flexiwatt 25 package designed for high power car
limiter radio. The fully complementary P-Channel/N-
■ Output DC offset detection Channel output structure allows a rail to rail
Load dump voltage output voltage swing which, combined with high
■ output current and minimized saturation losses
■ Fortuitous open gnd sets new power references in the car-radio field,
■ Reversed battery with unparalleled distortion performances.
The TDA7850 integrates a DC offset detector.
Table 1. Device summary
Order code Package Packing
TDA7850 Flexiwatt25 (Vertical) Tube
TDA7850H Flexiwatt25 (Horizontal Tube
September 2013 Rev 6 1/18
www.st.com 1
Contents TDA7850
Contents
1 Block diagram and application circuit . . . . . . . . ... . . . . . . . . ........ 5
1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .... . . . . . . . . ......... 5
1.2 Standard test and application circuit . . . . . . . . .... . . . . . . . . ......... 5
2 Pin description .................. . . . . . . . . ... . . . . . . . . ........ 6
3 Electrical specifications . . . . . . . . . . . . . . . . . . . ... . . . . . . . . ........ 7
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . .... . . . . . . . . ......... 7
3.2 Thermal data .................. . . . . . . . . .... . . . . . . . . ......... 7
3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . .... . . . . . . . . ......... 8
3.4 Electrical characteristic curves . . . . . . . . . . . . . .... . . . . . . . . . . . . . . . . 11
4 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . ...... . 14
4.1 SVR ......................... . . . . . . . . .... . . . . . . . . ....... . 14
4.2 Input stage .................... . . . . . . . . .... . . . . . . . . ....... . 14
4.3 Standby and muting ............. . . . . . . . . .... . . . . . . . . ....... . 14
4.4 DC offset detector .............. . . . . . . . . .... . . . . . . . . ....... . 14
4.5 Heatsink definition .............. . . . . . . . . .... . . . . . . . . ....... . 14
5 Package information . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . 15
6 Revision history ................. . . . . . . . . ... . . . . . . . . . . . . . . . 17
2/18
TDA7850 List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... ....1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... ....7
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... ....7
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... ....8
Table 5. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...... . . . 17
3/18
List of figures TDA7850
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 2. Standard test and application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 3. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Figure 4. Components and top copper layer of the Figure 2. ................. . . . . . . . . . . . . . 10
Figure 5. Bottom copper layer Figure 2. ................................. . . . . . . . . . . . . . 10
Figure 6. Quiescent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7. Output power vs. supply voltage (RL = 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 8. Output power vs. supply voltage (RL = 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Distortion vs. output power (RL = 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 10. Distortion vs. output power (RL = 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 11. Distortion vs. frequency (RL = 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Distortion vs. frequency (RL = 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Crosstalk vs. frequency ...................................... . . . . . . . . . . . . . 12
Figure 14. Supply voltage rejection vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Output attenuation vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 16. Power dissipation and efficiency vs. output power (RL = 4, SINE) .... . . . . . . . . . . . . . 12
Figure 17. Power dissipation and efficiency vs. output power (RL = 2, SINE) .... . . . . . . . . . . . . . 12
Figure 18. Power dissipation vs. output power (RL = 4, audio program simulation) . . . . . . . . . . . . . 13
Figure 19. Power dissipation vs. output power (RL = 2, audio program simulation) . . . . . . . . . . . . . 13
Figure 20. ITU R-ARM frequency response, weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 13
Figure 21. Flexiwatt25 (vertical) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Flexiwatt25 (horizontal) mechanical data and package dimensions. . . . . . . . . . . . . . . . . . 16
4/18
TDA7850 Block diagram and application circuit
1 Block diagram and application circuit
1.1 Block diagram
Figure 1. Block diagram
Vcc1 Vcc2
470μF 100nF
ST-BY
MUTE HSD HSD/VOFF_DET
OUT1+
IN1 OUT1-
0.1μF PW-GND
OUT2+
IN2 OUT2-
0.1μF PW-GND
OUT3+
IN3 OUT3-
0.1μF PW-GND
OUT4+
IN4 OUT4-
0.1μF PW-GND
AC-GND SVR TAB S-GND
0.47μF 47μF
D94AU158D
1.2 Standard test and application circuit
Figure 2. Standard test and application circuit
C8 C7
0.1μF 2200μF
Vcc1-2 Vcc3-4
R1 6 20
ST-BY 4 9
10K C9 8 OUT1
R2 1μF
7
MUTE 22
47K C10
1μF 5
C1
2 OUT2
IN1 11
0.1μF 3
IN2 12 17
C2 0.1μF 18 OUT3
19
IN3 15
C3 0.1μF 21
IN4 14 24 OUT4
C4 0.1μF S-GND 23
13
16 10 25 1
SVR HSD/OD TAB
C5 C6 R3*)
0.47μF 47μF
*) R3 = 10kΩ to be placed when pin 25 is used as offset detector.
D95AU335C
5/18
Pin description TDA7850
2 Pin description
Figure 3. Pin connection (top view)
TAB 1
P-GND2
OUT2-
ST-BY
OUT2+
VCC
OUT1-
P-GND1
OUT1+
SVR
IN1
IN2 Vertical
S-GND
IN4
IN3
AC-GND
OUT3+
P-GND3
OUT3-
VCC
OUT4+
MUTE
OUT4-
P-GND4
HSD 25
D94AU159A
TAB 1
P-GND2
OUT2-
ST-BY
OUT2+
VCC
OUT1-
P-GND1
OUT1+
SVR
IN1
IN2 Horizontal
S-GND
IN4
IN3
AC-GND
OUT3+
P-GND3
OUT3-
VCC
OUT4+
MUTE
OUT4-
P-GND4
HSD 25
D06AU1655
6/18
TDA7850 Electrical specifications
3 Electrical specifications
3.1 Absolute maximum ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VS Operating supply voltage 18 V
VS (DC) DC supply voltage 28 V
VS (pk) Peak supply voltage (for t = 50 ms) 50 V
Output peak current
IO repetitive (duty cycle 10 % at f = 10 Hz) 9 A
non repetitive (t = 100 s) 10 A
Ptot Power dissipation Tcase = 70 °C 80 W
Tj Junction temperature 150 °C
Tstg Storage temperature -55 to 150 °C
3.2 Thermal data
Table 3. Thermal data
Symbol Parameter Value Unit
Rth j-case Thermal resistance junction to case Max. 1 °C/W
7/18
Electrical specifications TDA7850
3.3 Electrical characteristics
Table 4. Electrical characteristics
(Refer to the test and application diagram, VS = 14.4 V; RL = 4 ; Rg = 600 ; f = 1 kHz;
Tamb = 25 °C; unless otherwise specified).
Symbol Parameter Test condition Min. Typ. Max. Unit
Iq1 Quiescent current RL = 100 180 280 mA
VOS Output offset voltage Play mode / Mute mode ±50 mV
During mute ON/OFF output -10 +10 mV
offset voltage ITU R-ARM weighted
dVOS During Standby ON/OFF output see Figure 20
offset voltage -10 +10 mV
Gv Voltage gain 25 26 27 dB
dGv Channel gain unbalance ±1 dB
VS = 13.2 V; THD = 10 % 23 25
VS = 13.2 V; THD = 1 % 16 19 W
Po Output power VS = 14.4 V; THD = 10 % 28 30
VS = 14.4 V; THD = 1 % 20 23
VS = 14.4 V; THD = 10 %, 2 50 55 W
Po max. Max. output power(1) VS = 14.4 V; RL = 4 50 W
VS = 14.4 V; RL = 2 85
THD Distortion Po = 4W 0.006 0.02 %
Po = 15W; RL = 2 0.015 0.03
eNo Output noise "A" Weighted 35 50 V
Bw = 20 Hz to 20 kHz 50 70
SVR Supply voltage rejection f = 100 Hz; Vr = 1Vrms 50 75 dB
fch High cut-off frequency PO = 0.5 W 100 300 KHz
Ri Input impedance 80 100 120 K
CT Cross talk f = 1 kHz PO = 4 W 60 70 - dB
f = 10 kHz PO = 4 W 60 -
VST-BY = 1.5 V 20
ISB Standby current consumption A
VST-BY = 0 V 10
Ipin5 ST-BY pin current VST-BY = 1.5 V to 3.5 V ±1 A
VSB out Standby out threshold voltage (Amp: ON) 2.75 V
VSB in Standby in threshold voltage (Amp: OFF) 1.5 V
AM Mute attenuation POref = 4 W 80 90 dB
VM out Mute out threshold voltage (Amp: Play) 3.5 V
VM in Mute in threshold voltage (Amp: Mute) 1.5 V
8/18
TDA7850 Electrical specifications
Table 4. Electrical characteristics (continued)
(Refer to the test and application diagram, VS = 14.4 V; RL = 4 ; Rg = 600 ; f = 1 kHz;
Tamb = 25 °C; unless otherwise specified).
Symbol Parameter Test condition Min. Typ. Max. Unit
(Amp: Mute)
VAM in VS automute threshold Att 80 dB; POref = 4 W 6.5 7 V
(Amp: Play)
Att < 0.1 dB; PO = 0. 5W 7.5 8
VMUTE = 1.5 V 7 12 18 A
Ipin23 Muting pin current (Sourced Current)
VMUTE = 3.5 V -5 18 A
HSD section
Vdropout Dropout voltage IO = 0.35 A; VS = 9 to 16 V 0.25 0.6 V
Iprot Current limits 400 800 mA
Offset detector (Pin 25)
VM_ON Mute voltage for DC offset 8 V
detection enabled VST-BY =5 V
VM_OFF 6 V
VOFF Detected differential output offset VST-BY =5 V; Vmute = 8 V ±2 ±3 ±4 V
V25_T Pin 25 voltage for detection = VST-BY =5 V; Vmute = 8 V 0 1.5 V
TRUE VOFF > ±4 V
V25_F Pin 25 Voltage for detection = VST-BY =5 V; Vmute = 8 V 12 V
FALSE VOFF > ±2 V
1. Saturated square wave output.
9/18
Electrical specifications TDA7850
Figure 4. Components and top copper layer of the Figure 2.
Figure 5. Bottom copper layer Figure 2.
10/18
TDA7850 Electrical specifications
3.4 Electrical characteristic curves
Figure 6. Quiescent current vs. supply Figure 7. Output power vs. supply voltage
voltage (RL = 4)
Id (mA) Po (W)
200 80
190 Vi = 0 75
RL =∞ 70 Po-max
180 65 RL= 4Ω
60 f = 1 KHz
170 55
160 50 THD= 10%
150 45
40
140 35
130 30
25 THD= 1%
120 20
110 15
10
100 5
8 10 12 14 16 18 8 9 10 11 12 13 14 15 16 17 18
Vs (V) AC00064 Vs (V) AC00064
Figure 8. Output power vs. supply voltage Figure 9. Distortion vs. output power
(RL = 2) (RL = 4)
Po (W) THD (%)
130 10
120 Po-max
110 RL= 2Ω VS = 14.4 V
f = 1 KHz RL = 4Ω
100 1
90 THD=10%
80 f = 10 KHz
70 0.1
60
50
40 THD=1%
0.01 f = 1 KHz
30
20
10
0 0.001
8 9 10 11 12 13 14 15 16 17 18 0.1 1 10 100
Vs (V) AC00066 Po (W) AC00067
Figure 10. Distortion vs. output power Figure 11. Distortion vs. frequency
(RL = 2) (RL = 4)
THD (%) THD (%)
10 10
VS = 14.4 V VS = 14.4 V
RL = 2Ω RL = 4Ω
1 1 Po = 4 W
f = 10 KHz
0.1 0.1
f = 1 KHz
0.01 0.01
0.001 0.001
0.1 1 10 100 10 100 1000 10000 100000
Po (W) f (Hz) AC00069
AC00068
11/18
Electrical specifications TDA7850
Figure 12. Distortion vs. frequency Figure 13. Crosstalk vs. frequency
(RL = 2)
THD (%) CROSSTALK (dB)
10 -20
VS = 14.4 V -30 RL = 4Ω
RL = 2Ω Po = 4 W
1 Po = 8 W -40 Rg = 600Ω
-50
0.1 -60
-70
0.01 -80
-90
0.001 -100
10 100 1000 10000 100000 10 100 1000 10000 100000
f (Hz) AC00070 f (Hz) AC00071
Figure 14. Supply voltage rejection vs. Figure 15. Output attenuation vs. supply
frequency voltage
-20 SVR (dB) OUTPUT ATTN (dB)
-30 Rg = 600Ω 0
Vripple = 1 Vrms RL = 4Ω
-40 Po = 4 W ref
-20
-50
-40
-60
-70 -60
-80
-80
-90
-100 -100
10 100 1000 10000 100000 5 6 7 8 9 10
f (Hz) AC00072 Vs (V) AC00073
Figure 16. Power dissipation and efficiency Figure 17. Power dissipation and efficiency
vs. output power (RL = 4, SINE) vs. output power (RL = 2, SINE)
Ptot (W) η (%) Ptot (W) η (%)
90 90 180 90
η
80 VS = 14.4 V 80 160 VS = 14.4 V 80
RL = 4 x 4Ω RL = 4 x 2Ω η
70 f=1 KHz SINE 70 140 f=1 KHz SINE 70
60 60 120 60
50 50 100 50
40 40 80 Ptot 40
Ptot
30 30 60 30
20 20 40 20
10 10 20 10
0 0 0 0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 0 5 10 15 20 25 30 35 40 45 50 55
Po (W) AC00074 Po (W) AC00075
12/18
TDA7850 Electrical specifications
Figure 18. Power dissipation vs. output power Figure 19. Power dissipation vs. output power
(RL = 4, audio program simulation) (RL = 2, audio program simulation)
30 Ptot (W) 60 Ptot (W)
VS = 13.2 V 55 VS = 13.2 V
25 RL = 4 x 4Ω 50 RL = 4 x 2Ω
GAUSSIAN NOISE GAUSSIAN NOISE
45
CLIP START 40
20 CLIP START
35
30
15 25
20
10 15
10
5 5
0 1 2 3 4 5 6 0 2 4 6 8 10
Po (W) AC00076 Po (W) AC00077
Figure 20. ITU R-ARM frequency response,
weighting filter for transient pop
Output attenuation (dB)
10
0
-10
-20
-30
-40
-50
10 100 1000 10000 100000
Hz AC00343
13/18
Application hints TDA7850
4 Application hints
Referred to the circuit of Figure 2.
4.1 SVR
Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF
time sequence and, consequently, plays an essential role in the pop optimization during
ON/OFF transients. To conveniently serve both needs, Its minimum recommended value
is 10µF.
4.2 Input stage
The TDA7850's inputs are ground-compatible and can stand very high input signals (±
8Vpk) without any performance degradation.
If the standard value for the input capacitors (0.1µF) is adopted, the low frequency cut-off
will amount to 16 Hz.
4.3 Standby and muting
Standby and Muting facilities are both CMOS compatible. In absence of true CMOS ports or
microprocessors, a direct connection to Vs of these two pins is admissible but a 470k
equivalent resistance should be present between the power supply and the muting and
ST-BY pins.
R-C cells have always to be used in order to smooth down the transitions for preventing any
audible transient noises.
About the standby, the time constant to be assigned in order to obtain a virtually pop-free
transition has to be slower than 2.5 V/ms.
4.4 DC offset detector
The TDA7850 integrates a DC offset detector to avoid that an anomalous DC offset on the
inputs of the amplifier may be multiplied by the gain and result in a dangerous large offset on
the outputs which may lead to speakers damage for overheating. The feature is enabled by
the MUTE pin (according to table 3) and works with the amplifier unmuted and with no signal
on the inputs.
The DC offset detection is signaled out on the HSD pin. To ensure the correct functionality of
the Offset Detector it is necessary to connect a pulldown 10 kW resistor between HSD and
ground.
4.5 Heatsink definition
Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be
deduced from Figure 18, which reports the simulated power dissipation when real
music/speech programmes are played out. Noise with gaussian-distributed amplitude was
employed for this simulation. Based on that, frequent clipping occurrence (worst-case) will
cause Pdiss = 26 W. Assuming Tamb = 70 °C and TCHIP = 150 °C as boundary conditions, the
heatsink's thermal resistance should be approximately 2°C/W. This would avoid any thermal
shutdown occurrence even after long-term and full-volume operation.
14/18
TDA7850 Package information
5 Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 21. Flexiwatt25 (vertical) mechanical data and package dimensions
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 4.45 4.50 4.65 0.175 0.177 0.183
B 1.80 1.90 2.00 0.070 0.074 0.079 MECHANICAL DATA
C 1.40 0.055
D 0.75 0.90 1.05 0.029 0.035 0.041
E 0.37 0.39 0.42 0.014 0.015 0.016
F (1) 0.57 0.022
G 0.80 1.00 1.20 0.031 0.040 0.047
G1 23.75 24.00 24.25 0.935 0.945 0.955
H (2) 28.90 29.23 29.30 1.139 1.150 1.153
H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031
L (2) 22.07 22.47 22.87 0.869 0.884 0.904
L1 18.57 18.97 19.37 0.731 0.747 0.762
L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626
L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138
M 3.70 4.00 4.30 0.145 0.157 0.169
M1 3.60 4.00 4.40 0.142 0.157 0.173
N 2.20 0.086
O 2 0.079
R 1.70 0.067
R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019
V 5˚ (T p.) Flexiwatt25 (vertical)
V1 3˚ (Typ.)
V2 20˚ (Typ.)
V3 45˚ (Typ.)
(1): dam-bar protusion not included
(2): molding protusion included
V
C
B
V
H
V3 H1
H3 H2 A
O R3
L4 R4
V1
R2
L2 N
R
L L1
L3 V1
V2
R2 R1 D
Pin 1 L5 R1 R1
E
G G1 F
FLEX25ME M M1
7034862
15/18
Package information TDA7850
Figure 22. Flexiwatt25 (horizontal) mechanical data and package dimensions
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 4.45 4.50 4.65 0.175 0.177 0.183
B 1.80 1.90 2.00 0.070 0.074 0.079 MECHANICAL DATA
C 1.40 0.055
D 2.00 0.079
E 0.37 0.39 0.42 0.014 0.015 0.016
F (1) 0.57 0.022
G 0.75 1.00 1.25 0.029 0.040 0.049
G1 23.70 24.00 24.30 0.933 0.945 0.957
H (2) 28.90 29.23 29.30 1.139 1.150 1.153
H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031
L (2) 21.64 22.04 22.44 0.852 0.868 0.883
L1 10.15 10.5 10.85 0.40 0.413 0.427
L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626
L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 5.15 5.45 5.85 0.203 0.214 0.23
L6 1.80 1.95 2.10 0.070 0.077 0.083
M 2.75 3.00 3.50 0.108 0.118 0.138
M1 4.73 0.186
M2 5.61 0.220
N 2.20 0.086
P 3.20 3.50 3.80 0.126 0.138 0.15
R 1.70 0.067
R1 0.50 0.02
R2 0.30 0.12
R3 1.25 0.049
R4 0.50 0.02 Flexiwatt25
V 5 (Typ.)
V1 3 (Typ.) (Horizontal)
V2 20 (Typ.)
V3 45 (Typ.)
(1): dam-bar protusion not included; (2): molding protusion included
7399733 C
16/18
TDA7850 Revision history
6 Revision history
Table 5. Document revision history
Date Revision Changes
22-Nov-2006 1 Initial release.
27-Feb-2007 2 Added Chapter 3.4: Electrical characteristic curves.
09-Oct-2007 3 Updated the values for the dVOS and Iq1 parameters on the Table 4.
Added Figure 20 on page 13.
Updated Figure 2: Standard test and application circuit.
12-Sep-2008 4 Updated Section 4.4: DC offset detector and Section 4.3: Standby
and muting.
Updated the values of VOS and THD parameters on the Table 4.
07-Nov-2008 5 Modified max. values of the THD distortion in Table 4: Electrical
characteristics on page 8.
17-Sep-2013 6 Updated Disclaimer.
17/18
TDA7850
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