Advanced Power MOSFET SFR/U9034
FEATURES BVDSS = -60 V
RDS(on) = 0.14
Avalanche Rugged Technology ID = -14 A
Rugged Gate Oxide Technology
Lower Input Capacitance D-PAK I-PAK
Improved Gate Charge
Extended Safe Operating Area 2
Lower Leakage Current : 10 A (Max.) @ VDS = -60V
Lower RDS(ON) : 0.106 (Typ.)
1 1
3 2 3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS -60 V
ID Drain-to-Source Voltage -14
IDM -9.8 A
VGS Continuous Drain Current (TC=25oC) 56
EAS Continuous Drain Current (TC=100oC) 25 A
IAR 505 V
EAR Drain Current-Pulsed O1 -14 mJ
dv/dt 4.9 A
Gate-to-Source Voltage -5.5 mJ
PD 2.5 V/ns
Single Pulsed Avalanche Energy O2 49 W
TJ , TSTG 0.39 W
Avalanche Current O1 W/oC
TL - 55 to +150
Repetitive Avalanche Energy O1 oC
300
Peak Diode Recovery dv/dt O3
Total Power Dissipation (TA=25oC) *
Total Power Dissipation (TC=25oC)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8" from case for 5-seconds
Thermal Resistance
Symbol Characteristic Typ. Max. Units
2.55 oC/W
RJC Junction-to-Case -- 50
110
RJA Junction-to-Ambient * --
RJA Junction-to-Ambient --
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. C
SFR/U9034 P-CHANNEL
POWER MOSFET
Electrical Characteristics (TC=25oC unless otherwise specified)
Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS
Drain-Source Breakdown Voltage -60 -- -- V VGS=0V,ID=-250A
BV/TJ Breakdown Voltage Temp. Coeff. -- -0.05 -- V/oC ID=-250A See Fig 7
VGS(th) Gate Threshold Voltage -2.0 -- -4.0 V VDS=-5V,ID=-250A
Gate-Source Leakage , Forward -- -- -100 nA VGS=-20V
IGSS Gate-Source Leakage , Reverse -- -- 100 VGS=20V
-- -- -10 VDS=-60V
IDSS Drain-to-Source Leakage Current -- -- -100 A VDS=-48V,TC=125oC
RDS(on) Static Drain-Source -- -- 0.14 VGS=-10V,ID=-7.0A O4
On-State Resistance
gfs Forward Transconductance -- 8.1 -- VDS=-30V,ID=-7.0A O4
Ciss Input Capacitance -- 890 1155
Coss Output Capacitance -- 265 400 pF VGS=0V,VDS=-25V,f =1MHz
Crss Reverse Transfer Capacitance -- 84 125 See Fig 5
td(on) Turn-On Delay Time -- 14 40
Rise Time -- 24 60 VDD=-30V,ID=-18A, O4 O5
tr Turn-Off Delay Time RG=12
td(off) Fall Time ns
Total Gate Charge -- 43 95 See Fig 13
tf Gate-Source Charge -- 28 65
Qg Gate-Drain("Miller") Charge -- 30 38 VDS=-48V,VGS=-10V,
Qgs -- 5.3 -- nC
Qgd -- 12 -- ID=-18A
See Fig 6 & Fig 12 O4 O5
Source-Drain Diode Ratings and Characteristics
Symbol Characteristic Min. Typ. Max. Units Test Condition
Continuous Source Current
IS Pulsed-Source Current -- -- -14 A Integral reverse pn-diode
ISM Diode Forward Voltage
VSD Reverse Recovery Time O1 -- -- -56 in the MOSFET
trr Reverse Recovery Charge
Qrr O4 -- -- -3.9 V TJ=25oC,IS=-14A,VGS=0V
85 -- ns TJ=25oC,IF=-18A
--
-- 0.25 -- C diF/dt=100A/s O4
Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
O2 L=3.0mH, IAS=-14A, VDD=-25V, RG=27*, Starting TJ =25oC
O3 ISD <_ -18A, di/dt <_ 300A/s, VDD <_ BVDSS , Starting TJ =25oC
O4 Pulse Test : Pulse Width = 250s, Duty Cycle<_ 2%
O5 Essentially Independent of Operating Temperature
P-CHANNEL SFR/U9034
POWER MOSFET
Fig 2. Transfer Characteristics
Fig 1. Output Characteristics
VGS
Top : - 15 V
- 10 V
- 8.0 V
-ID , Drain Current [A] - 7.0 V -ID , Drain Current [A]
- 6.0 V 101
- 5.5 V
101 - 5.0 V
Bottom : - 4.5V
150 oC
100 25 oC @ Notes :
1. VGS = 0 V
100 @ Notes : - 55 oC 2. VDS = -30 V
10-1 3. 250 s Pulse Test
1. 250 s Pulse Test
2. TC = 25 oC
100 101 10-1 2 4 6 8 10
-VDS , Drain-Source Voltage [V] -VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.4
RDS(on) , [] 0.3 -IDR , Reverse Drain Current [A] 101
Drain-Source On-Resistance
VGS = -10 V
0.2
0.1 100 @ Notes :
150 oC 1. VGS = 0 V
2. 250 s Pulse Test
25 oC
VGS = -20 V @ Note : TJ = 25 oC
0.0 0 10 20 30 40 50 60 70 10-1
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1500
C iss Ciss= Cgs+ Cgd ( Cds= shorted ) 10 VDS = -12 V
Coss= Cds+ Cgd
1200 Crss= Cgd -VGS , Gate-Source Voltage [V] VDS = -30 V
Capacitance [pF] VDS = -48 V
C oss
900
600 @ Notes : 5
C rss 1. VGS = 0 V
2. f = 1 MHz
300
@ Notes : ID =-18 A
0 0
100 101 0 5 10 15 20 25 30 35
-VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
SFR/U9034 P-CHANNEL
POWER MOSFET
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2 2.5
-BVDSS , (Normalized) RDS(on) , (Normalized) 2.0
Drain-Source Breakdown Voltage Drain-Source On-Resistance
1.1
1.5
1.0
1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 0.5 1. VGS = -10 V
2. ID = -250 A 2. ID = -9.0 A
0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
-ID , Drain Current [A] 15
Operation in This Area
102 is Limited by R DS(on) -ID , Drain Current [A]
12
0.1 ms 9
1 ms
101
10 ms
DC 6
@ Notes :
100 1. TC = 25 oC
2. TJ = 150 oC
3
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
-VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]
Fig 11. Thermal Response
Z (t) , Thermal Response D=0.5 @ Notes :
100
JC
0.2 1. Z J C (t)=2.55 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Z J C (t)
0.05 P.DM
10- 1 0.02 t1.
0.01 t2.
single pulse
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
P-CHANNEL SFR/U9034
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
" Current Regulator " VGS
50K Same Type Qg
as DUT Qgd
12V 200nF -10V Charge
300nF
VDS Qgs
VGS
DUT
-3mA
R1 R2
Current Sampling (IG) Current Sampling (ID)
Resistor Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
Vout RL t on t off
Vin tr
RG VDD td(on) td(off) tf
( 0.5 rated VDS ) Vin 10%
DUT
-10V
Vout 90%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL EAS = --1-- LL IAS2 BVDSS
ID 2 --------------------
VDS
Vary tp to obtain BVDSS -- VDD
required peak ID
tp Time
RG
VDD VDS (t)
ID (t)
C VDD
DUT
-10V IAS
BVDSS
tp
SFR/U9034 P-CHANNEL
POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT +
IS VDS
--
VGS Driver
L
RG VDD
Compliment of DUT
VGS (N-Channel)
dv/dt controlled by "RG"
IS controlled by Duty Factor "D"
VGS D = --G--a-t-e--P--u--l-s-e--W---i-d-t-h----
( Driver ) Gate Pulse Period 10V
IS Body Diode Reverse Current
( DUT ) IRM
di/dt
VDS
( DUT ) IFM , Body Diode Forward Current
Vf
Body Diode VDD
Forward Voltage Drop
Body Diode Recovery dv/dt
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Definition of Terms
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Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
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supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
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any time without notice in order to improve design.
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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I1
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