Not Recommended for New Designs
PTB48580 Series SLTS240 DECEMBER 2004
Dual Complementary-Output
DC/DC Converter for DSL
Features Temp Range: 40 to +85 C
Industry Standard Outline
Dual Complementary Outputs Fixed Frequency Operation
(5 V, 12 V) Synchronizes with PTB48500
Powers line driver ICs for AC-7
Input Voltage Range:
36 V to 75 V and other xDSL chipsets
Safety Approvals: (Pending):
On/Off Enable for Sequencing
1500 VDC Isolation EN60950
Over-Current Protection UL/cUL60950
Over-Temperature Shutdown
Under-Voltage Lockout
Description under-voltage lockout (UVLO) as stan- Pin Configuration
dard features.
The PTB48580 series of isolated Pin Function
DC/DC converter modules produce a The control inputs, "Enable" and
complementary pair of regulated supply "Sync In," are compatible with the 1 +VI
voltages for powering line-driver ICs in "EN Out" and "Sync Out" signals of 2 Sync In
xDSL telecom applications. The mod- the PTB48500 DC/DC converter. 3 Enable *
ules operate from a standard telecom This allows the power-up and switching 4 VI
(-48 V) central office (CO) supply and frequency of the PTB48580 series to be 5 +VO
can provide up to a 30 W of power in a directly controlled from a PTB48500. 6 COM
balanced load configuration. Together a PTB48500 and a PTB48580A 7 VO Adjust
converter meet all the system power 8 VO
The A-suffix module (5 V) is designed and sequencing requirements of an AC-7
to power the line driver ICs for the AC-7 ADSL chipset. Shaded functions indicate signals
ADSL chipset. Other voltage options will
power other analog applications requiring The PTB48580 series uses double- that are referenced to VI.
a complementary supply with relatively sided surface mount contruction. The
balanced loads. The outputs can also be package size is based on an industry * Denotes negative logic:
easily configured for single-ended use. standard outline and does not require a
heatsink. Both through-hole and surface Open = Outputs Off
The modules incorporate an On/Off mount pin configurations are available.
enable control, output current limit, VI = Normal operation
over-temperature protection, and input
Stand-Alone Application
PTB48580
+VI +VO
1 +VI +VO 5
L
2 Sync In O
A
VO Adj 7 D
COM 6
3 Enable COM
VI
4 VI L
O
A
D
VO
VO 8
For technical support and further information visit http://power.ti.com
Not Recommended for New Designs
PTB48580 Series SLTS240 DECEMBER 2004
Dual Complementary-Output
DC/DC Converter for DSL
Ordering Information
Base Pt. No. (PTB48580xxx) Output Voltage (PTB48580xx) Package Options (PT48580x)
Order Prefix Description Code Voltage Code Description Pkg Ref. (1)
PTB48580xxx Basic Model A 5 V AH Horiz. T/H (ERV)
(ERS)
B 12 V AS SMD, Standard (2)
Notes: (1) Reference the applicable package reference drawing for the dimensions and PC board layout
(2) "Standard" option specifies 63/37, Sn/Pb pin solder material.
Pin Descriptions VO Adjust: Using a single resistor, this pin allows the
magnitude of both `+VO' and `VO' to be adjusted to-
+VI: The positive input supply for the module with respect gether, either higher or lower than their preset value. If
to VI. When powering the module from a 48 V telecom not used, this pin should be left open circuit.
central office supply, this input is connected to the primary
system ground. Enable*: This is an open-collector (open-drain) negative
logic input that enables the module output. This pin is
VI: The negative input supply for the module, and the referenced to -VI. A logic `0' at this pin enables the
0 VDC reference for the `Enable*', and `Sync In' signals. module's outputs, and a high impedance disables the
When the module is powered from a +48-V supply, this outputs. If this feature is not used the pin should be con-
input is connected to the 48-V Return. nected to VI. Note: Connecting this input directly to the
"EN Out" pin of the PTB4850x enables the output voltages
+VO: The positive output supply voltage, which is refer- from both converters (PTB4850x and PTB48580) to power
enced to the `COM' node. The voltage at `+VO' has the up in sequence.
same magnitude, but is the complement to that at `-VO'.
Sync In: This pin is used when the PTB48580 and PTB4850x
VO: The negative output supply voltage, which is refer- DC/DC converter modules are used together. Connect-
enced to the `COM' node. The voltage at `-VO' has the ing this pin to the `Sync Out' of the PTB4850x module
same magnitude, but is the complement to that at `+VO'. allows the PTB48580 to be synchronized to the same
switch conversion frequency as the PTB4850x.
COM: The secondary return reference for the module's
regulated output voltages. This node is dc isolated from
the input supply pins.
Environmental and General Specifications (Unless otherwise stated, all voltages are with respect to VI)
Characteristics Symbols Conditions Min Typ Max Units
VDC
Input Voltage Range VI Over output load range 36 48 75 V
Isolation Voltage -- -- pF
Capacitance TA Inputoutput/inputcase 1500 1500 -- M
Resistance OTP -- -- C
Operating Temperature Range TREFLOW Input to output -- -- C
Over-Temperature Protection TS 115 (i) +85
Input to output 10 10 -- C
Solder Reflow Temperature -- -- C
Storage Temperature -- Over VI Range 40 -- 235 (ii) G's
Mechanical Shock 125
Shutdown threshold -- 500 G's
Mechanical Vibration --
Hysterisis -- 20 grams
Weight 5 --
Flammability Surface temperature of module body or pins 13.5 --
--
-- 40
Per Mil-STD-883D, Method 2002.3 --
1 msec, Sine, mounted
Mil-STD-883D, Method 2007.2 T/H --
20-2000 Hz SMD --
--
Meets UL 94V-O
Notes: (i) This parameter is guaranteed be design
(ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum.
For technical support and further information visit http://power.ti.com
Not Recommended for New Designs
PTB48580A SLTS240 DECEMBER 2004
Dual Complementary-Output
DC/DC Converter for DSL
Specifications (Unless otherwise stated, TA =25C, VI =48 V, CI =0 F, CO =0 F, |+IO | = |IO |, and |IO | =0.5 |IO |max)
PTB48580A
Characteristic Symbol Conditions Min Typ Max Units
Output Power PO Total output power from VO 0 -- 30 (1) W
Output Current 3 (2) A
Output Load Imbalance |IO | Over VI range, |+IO | |IO | 0.1 A 0 -- 1 (3) A
Output Voltage 5.25 (2) V
|+IO | |IO | |+IO | 0.1 A, |IO | 0.1 A 0 --
Temperature Variation -- %VO
Line Regulation |VO | Inlcudes set-point, line, |+IO | |IO | 0.1 A 4.75 (2) 5 0.4 %VO
Load Regulation 40 TA +85C 0.4 %VO
Efficiency -- %
Vo Ripple (pk-pk) Regtemp 40 TA +85C, |IO | =0.1 A VO -- 1 50 (4) mVpp
Transient Response Regline Over VI range, balanced load VO -- 0.1 -- s
-- %VO
Over Current Threshold Regload Over IO range, balanced load VO -- 0.2 5.3 A
PO =PO max -- 86
Vr 20 MHz bandwidth, -- 25
CO =10 F tantalum capacitor
tS 0.1 A/s load step, 50% to 75% IO max -- 30
VO pk |VO| over/undershoot -- 1
IOtrip VI =36 V 3.3 4.3
reset followed by auto-recovery
Short Circuit Current Continuous over-current trip, |IO |PK -- 6.5 -- A
10 -- %
Output Voltage Adjust Range |+IO | = |IO | Duty -- -- 6 (5) V
Switching Frequency 470 (6) 500 kHz
Under-Voltage Lockout |VO | adj |+VO | and |VO | adjust simulataneously 3.5 33 -- V
S 32 --
On/Off Enable (pin 3) VVIIoofnf Over VI and IO ranges 440 V
Input High Voltage -- +75 (7)
Input Low Voltage VIH VVII increasing -- -- +0.8 mA
Input Low Current VIL decreasing -- -- 1 mA
IIL 2 -- ms
Standby Input Current II standby Referenced to VI (pin 4) 10 -- F
Start-up Time tON +3.6 2 -- F
Internal Input Capacitance CI -- 2,000 (8) 106 Hrs
External Output Capacitance CO 0.2
Reliability MTBF -- --
--
pin 3 open circuit --
|IO | =1 A, |VO | rising 0 to 0.95 |VO | TYP --
--
Capacitance from either output to COM (pin 6) 0
Per Telcordia SR-332 2.8
50% stress, TA =40C, ground benign
Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating.
(2) Under balanced load conditions, load current flowing out of +VO is balanced to within 0.1 A of that flowing into VO .
(3) A load imbalance is the difference in current flowing from +VO to VO . The module can operate with a higher imbalance but with reduced specifications.
(4) Output voltage ripple is measured with a 10 F tantalum capacitor connected from +VO (pin 5) or VO (pin 8), to COM (pin 6).
(5) When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module's maximum power rating.
(6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system.
(7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected
and may be connected to +VI . The open-circuit voltage is 7 V max. If it is left open circuit the converter will operate when input power is applied.
(8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using
capacitors with organic, or polymer-aluminum type electrolytes.
For technical support and further information visit http://power.ti.com
PTB48580A Not Recommended for New Designs
Dual Complementary-Output Typical Characteristics
DC/DC Converter for DSL
SLTS240 DECEMBER 2004
PTB48580A Characteristic Data @VI =48 V (See Notes A) Safe Operating Area PTB48580A (See Note C)
Efficiency vs Load Current (See Note B) Balanced Load, VI =48 VDC (See Note B)
90 90
80
80 Ambient Temperature C
70 Airflow
Efficiency % 70 400LFM
60
60
200LFM
100LFM
50
Nat conv
40
50
30
40 20
0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3
|IO| Balanced Output Current A |IO| Balanced Output Current A
Power Dissipation vs Load Current (See Note B)
6
PD Power Dissipation W 5
4
3
2
1
0
0 0.5 1 1.5 2 2.5 3
|IO| Balanced Output Current A
Cross Regulation, |+VO| vs |IO|, with |+IO| = 1 A
300
|+VO| Cross Regulation mV 200
100
0
-100
-200
-300
0 0.5 1 1.5 2 2.5 3
|IO| Output Current A
Cross Regulation, |VO| vs |+IO|, with |IO| = 1 A
300
|-VO| Cross Regulation mV 200
100
0
-100
-200
-300
0 0.5 1 1.5 2 2.5 3
|+IO| Output Current A
Note A: Characteristic data has been developed from actual products tested at 25C. This data is considered typical data for the converter.
Note B: Under a balanced load, current flowing out of +VO is equal to that flowing into VO.
Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to
modules soldered directly to a 4 in. 4 in. double-sided PCB with 2 oz. copper.
For technical support and further information visit http://power.ti.com
Not Recommended for New Designs
PTB48580B SLTS240 DECEMBER 2004
Dual Complementary-Output
DC/DC Converter for DSL
Specifications (Unless otherwise stated, TA =25C, VI =48 V, CI =0 F, CO =0 F, |+IO | = |IO |, and |IO | =0.5 |IO |max)
PTB48580B
Characteristic Symbol Conditions Min Typ Max Units
Output Power PO Total output power from VO 0 -- 30 (1) W
Output Current 1.25 (2) A
Output Load Imbalance |IO | Over VI range, |+IO | |IO | 0.1 A 0 -- 0.5 (3) A
Output Voltage 12.4 (2) V
|+IO | |IO | |+IO | 0.1 A, |IO | 0.1 A 0 --
Temperature Variation -- %VO
Line Regulation |VO | Inlcudes set-point, line, |+IO | |IO | 0.1 A 11.6 (2) 12 0.5 %VO
Load Regulation 40 TA +85C 1 %VO
Efficiency -- %
Vo Ripple (pk-pk) Regtemp 40 TA +85C, |IO | =0.1 A VO -- 1 100 (4) mVpp
Transient Response Regline Over VI range, balanced load VO -- 0.1 -- s
-- %VO
Over Current Threshold Regload Over IO range, balanced load VO -- 0.1 2.4 A
PO =PO max -- 88
Vr 20 MHz bandwidth, -- 50
CO =10 F tantalum capacitor
tS 0.1 A/s load step, 50% to 75% IO max -- 30
VO pk |VO | over/undershoot -- 1
IOtrip VI =36 V 1.4 1.9
reset followed by auto-recovery
Short Circuit Current Continuous over-current trip, |IO |PK -- 3 -- A
10 -- %
Output Voltage Adjust Range |+IO | = |IO | Duty -- -- 13.4 (5) V
Switching Frequency 480 (6) 520 kHz
Under-Voltage Lockout |VO | adj |+VO | and |VO | adjust simulataneously 6.5 33 -- V
S 32 --
On/Off Enable (pin 3) VIon Over VI and IO ranges 440 V
Input High Voltage VIoff -- +75 (7)
Input Low Voltage VI increasing -- -- +0.8 mA
Input Low Current VIH -- 1 mA
VIL VI decreasing -- 2 -- ms
Standby Input Current IIL 10 -- F
Start-up Time II standby Referenced to VI (pin 4) 2 -- F
Internal Input Capacitance tON +3.6 -- 1,500 (8) 106 Hrs
External Output Capacitance CI
Reliability CO 0.2 -- --
MTBF
--
pin 3 open circuit --
|IO | =1 A, |VO | rising 0 to 0.95 |VO | TYP --
--
Capacitance from either output to COM (pin 6) 0
Per Telcordia SR-332 2.8
50% stress, TA =40C, ground benign
Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating.
(2) Under balanced load conditions, load current flowing out of +VO is balanced to within 0.1 A of that flowing into VO .
(3) A load imbalance is the difference in current flowing from +VO to VO . The module can operate with a higher imbalance but with reduced specifications.
(4) Output voltage ripple is measured with a 10-F tantalum capacitor connected from +VO (pin 5) or VO (pin 8), to COM (pin 6).
(5) When the output voltage is adjusted higher than the nominal output voltage the load current must not exceed the module's maximum power rating.
(6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system.
(7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected
and may be connected to +VI . The open-circuit voltage is 7 V max. If it is left open circuit the converter will operate when input power is applied.
(8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using
capacitors with organic, or polymer-aluminum type electrolytes.
For technical support and further information visit http://power.ti.com
PTB48580B Not Recommended for New Designs
Dual Complementary-Output Typical Characteristics
DC/DC Converter for DSL
SLTS240 DECEMBER 2004
PTB48580B Characteristic Data @VIN =48 V (See Notes A) Safe Operating Area PTB48580B (See Note C)
Efficiency vs Load Current (See Note B) Balanced Load, VI =48 VDC (See Note B)
90 90
80
80 Ambient Temperature C
70 Airflow
Efficiency % 70 60 200LFM
100LFM
60 50 Nat conv
40
50
30
40 20
0
0 0.25 0.5 0.75 1 1.25 0.25 0.5 0.75 1 1.25
|IO| Balanced Output Current A |IO| Balanced Output Current A
Power Dissipation vs Load Current (See Note B)
5
PD Power Dissipation W 4
3
2
1
0
0 0.25 0.5 0.75 1 1.25
|IO| Balanced Output Current A
Cross Regulation, |+VO| vs |IO|, with |+IO| = 0.6 A
300
|+VO| Cross Regulation mV 200
100
0
-100
-200
-300
0 0.25 0.5 0.75 1 1.25
|IO| Output Current A
Cross Regulation, |VO| vs |+IO|, with |IO| = 0.6 A
300
|VO| Cross Regulation mV 200
100
0
-100
-200
-300
0 0.25 0.5 0.75 1 1.25
|+IO| Output Current A
Note A: Characteristic data has been developed from actual products tested at 25C. This data is considered typical data for the converter.
Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into Vo.
Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to
modules soldered directly to a 4 in. 4 in. double-sided PCB with 2 oz. copper.
For technical support and further information visit http://power.ti.com
Not Recommended for New Designs
Application Notes
PTB48580 Series
Adjusting the Output Voltages of the Calculation of Resistor Adjust Values
PTB48580 Series of DC/DC Converters The value of the adjust resistor is calculated using one of
the following equations. Use the equation for R1 to adjust
The PTB48580 series of DC/DC converters produce a up, or (R2) to adjust down.
balanced pair of complementary output voltages. They
are identified +VO and -VO , respectively. The magnitude R1 [Adjust Up] = VR RO RS k
of both output voltages can be adjusted together as a
pair, higher or lower, by up to 10% of their nominal. The 2 (VA VO )
adjustment method uses a single external resistor. 1 The
value of the resistor determines the magnitude of the (R2) [Adjust Down] = RO (2 VA VR ) RS k
adjustment, and its placement determines whether the 2 (VO VA )
magnitude is increased or decreased. The resistor values
can be calculated using the appropriate formula (see Where: VO = Magitude of the original VO
below). The formula constants are given in Table 1-1. VA = Magnitude of the adjusted voltage
The placement of each resistor is as follows. VR = The reference voltage from Table 1-1
RO = The resistance value in Table 1-1
Adjust Up: To increase the magnitude (3) of both output RS = The series resistance from Table 1-1
voltages, place a resistor R1 between VO Adj (pin 7) and
the -VO (pin 8) voltage rail; see Figure 1-1(a).
Figure 1-1a
PTB48580 +VO
+VO 5
Table 1-1
ADJUSTMENT RANGE AND FORMULA PARAMETERS
7 Series Pt. No. PTB48580A PTB48580B
VO Adj
R1 VO (nom) 5V 12 V
6 Adjust Up VA (min) 3.5 V 6.5 V
COM VA (max) (3) 6V 13.4 V
VO VR 2.495 V 2.495 V
8 RO (k) 7.5 18.2
VO RS (k) 9.09 16.9
Adjust Down: To decrease the magnitude of both output Notes:
voltages, add a resistor (R2), between VO Adj (pin 7) and 1. A 0.05-W rated resistor may be used. The tolerance
the +VO (pin 5) voltage rail; see Figure 1-1(b).
should be 1%, with a temperature stability of 100 ppm/C or
Figure 1-1b better. Place the resistor in either the R1 or (R2)
location, as close to the converter as possible.
PTB48580 +VO
2. Never connect capacitors to the VO Adj pin. Capacitance
+VO 5 added to this pin can affect the stability of the regulated
output.
(R2)
3. When the output voltage is adjusted higher than the
Adj Down nominal output voltage the load current must not exceed
the module's maximum power rating of 30 W. For example,
7 when the PTB48580A is adjusted to 6 V (12 V in the
VO Adj single output configuration), the load current is limited to
2.5 A.
6
COM
8 VO
VO
For technical support and further information visit http://power.ti.com
Not Recommended for New Designs
Application Notes
PTB48580 Series
Configuring the PTB48580 Series of Power-Up Sequencing
DC/DC Converters for DSL Applications The desired power-up sequence for the AC7 supply volt-
ages requires that the two logic-level voltages from the
When operated as a pair, the PTB4850x and PTB48580 PTB4850x converter rise to regulation prior to the two
converters are specifically designed to provide all the complementary voltages that power the transceiver ICs.
required supply voltages for powering xDSL chipsets. This sequence cannot be guaranteed if the PTB4850x
The PTB4850x produces two logic voltages. They include and PTB48580 are allowed to power up independently,
a 3.3-V source for logic and I/O, and a low-voltage for especially if the 48-V input voltage rises relatively slowly.
powering a digital signal processor core. The PTB48580 To ensure the desired power-up sequence, the "EN Out"
produces a balanced pair of complementary supply voltages pin of the PTB4850x is directly connected to the active-
that is required for the xDSL transceiver ICs. When used low "Enable" input of the PTB48580 (see Figure 2-1).
together in these types of applications, the PTB4850x and This allows the PTB4850x to momentarily hold off the
PTB48580 may be configured for power-up sequencing, outputs from the PTB48580 until the logic-level voltages
and also synchronized to a common switch conversion have risen first. Figure 2-2 shows the power-up wave-
frequency. Figure 2-1 shows the required cross-connects forms of all four supply voltages from the schematic of
between the two converters to enable these two features. Figure 2-1.
Switching Frequency Synchronization Figure 2-2; Power-Up Sequencing Waveforms
Unsynchronized, the difference in switch frequency
introduces a beat frequency into the input and output VCCIO (1 V/Div)
AC ripple components from the converters. The beat VCORE (1 V/Div)
frequency can vary considerably with any slight variation
in either converter's switch frequency. This results in a +VTCVR (5 V/Div)
variable and undefined frequency spectrum for the ripple VTCVR (5 V/Div)
waveforms, which would normally require separate filters
at the input of each converter. When the switch frequency
of the converters are synchronized, the ripple components
are constrained to the fundamental and higher. This
simplifies the design of the output filters, and allows a
common filter to be specified for the treatment of input
ripple.
HORIZ SCALE: 10 ms/Div
Figure 2-1; Example of PTB4850x & PTB48580A Modules Configured for DSL Applications
48 V RTN VO2 Adj
48 V
+ +VI VO1 VCCIO
VCORE
Input PTB4850xA VO2
Filter
Enable
VI COM
EN Out Sync Out
Sync In VO Adj +VTCVR
+VI +VO VTCVR
PTB48580A
COM
Enable
VI VO
For technical support and further information visit http://power.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com 20-Jul-2012
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package Pins Package Qty Eco Plan (2) Lead/ MSL Peak Temp (3) Samples
PTB48580AAH Drawing 8 15 Pb-Free (RoHS) Ball Finish (Requires Login)
PTB48580AAS 8 15
PTB48580AAZ NRND Through- ERV 8 15 TBD SN N / A for Pkg Type
PTB48580BAH NRND Hole Module ERS 8 15 Pb-Free (RoHS)
PTB48580BAZ NRND ERS 8 15 Pb-Free (RoHS) SNPB Level-1-235C-UNLIM/
NRND Surface ERV Pb-Free (RoHS) SNAGCU Level-3-260C-168HRS
NRND Mount Module ERS
Level-3-260C-168 HR
Surface
Mount Module SN N / A for Pkg Type
Through- SNAGCU Level-3-260C-168 HR
Hole Module
Surface
Mount Module
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
www.ti.com PACKAGE OPTION ADDENDUM
20-Jul-2012
Addendum-Page 2
IMPORTANT NOTICE
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