PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Rev. 02 -- 16 July 2009 Product data sheet
1. General description
The PCA9685 is an I2C-bus controlled 16-channel LED controller optimized for LCD
Red/Green/Blue/Amber (RGBA) color backlighting applications. Each LED output has its
own 12-bit resolution (4096 steps) fixed frequency individual PWM controller that operates
at a programmable frequency from a typical of 40 Hz to 1000 Hz with a duty cycle that is
adjustable from 0 % to 100 % to allow the LED to be set to a specific brightness value.
All outputs are set to the same PWM frequency.
Each LED output can be off or on (no PWM control), or set at its individual PWM controller
value. The LED output driver is programmed to be either open-drain with a 25 mA current
sink capability at 5 V or totem pole with a 25 mA sink, 10 mA source capability at 5 V. The
PCA9685 operates with a supply voltage range of 2.3 V to 5.5 V and the inputs and
outputs are 5.5 V tolerant. LEDs can be directly connected to the LED output (up to
25 mA, 5.5 V) or controlled with external drivers and a minimum amount of discrete
components for larger current or higher voltage LEDs.
The PCA9685 is in the new Fast-mode Plus (Fm+) family. Fm+ devices offer higher
frequency (up to 1 MHz) and more densely populated bus operation (up to 4000 pF).
Although the PCA9635 and PCA9685 have many similar features, the PCA9685 has
some unique features that make it more suitable for applications such as LCD backlighting
and Ambilight:
The PCA9685 allows staggered LED output on and off times to minimize current
surges. The on and off time delay is independently programmable for each of the
16 channels. This feature is not available in PCA9635.
The PCA9685 has 4096 steps (12-bit PWM) of individual LED brightness control. The
PCA9635 has only 256 steps (8-bit PWM).
When multiple LED controllers are incorporated in a system, the PWM pulse widths
between multiple devices may differ if PCA9635s are used. The PCA9685 has a
programmable prescaler to adjust the PWM pulse widths of multiple devices.
The PCA9685 has an external clock input pin that will accept user-supplied clock
(50 MHz max.) in place of the internal 25 MHz oscillator. This feature allows
synchronization of multiple devices. The PCA9635 does not have external clock input
feature.
Like the PCA9635, PCA9685 also has a built-in oscillator for the PWM control.
However, the frequency used for PWM control in the PCA9685 is adjustable from
about 40 Hz to 1000 Hz as compared to the typical 97.6 kHz frequency of the
PCA9635. This allows the use of PCA9685 with external power supply controllers. All
bits are set at the same frequency.
The Power-On Reset (POR) default state of LEDn output pins is LOW in the case of
PCA9685. It is HIGH for PCA9635.
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
The active LOW Output Enable input pin (OE) allows asynchronous control of the LED
outputs and can be used to set all the outputs to a defined I2C-bus programmable logic
state. The OE can also be used to externally `pulse width modulate' the outputs, which is
useful when multiple devices need to be dimmed or blinked together using software
control.
Software programmable LED All Call and three Sub Call I2C-bus addresses allow all or
defined groups of PCA9685 devices to respond to a common I2C-bus address, allowing
for example, all red LEDs to be turned on or off at the same time or marquee chasing
effect, thus minimizing I2C-bus commands. Six hardware address pins allow up to
62 devices on the same bus.
The Software Reset (SWRST) General Call allows the master to perform a reset of the
PCA9685 through the I2C-bus, identical to the Power-On Reset (POR) that initializes the
registers to their default state causing the outputs to be set LOW. This allows an easy and
quick way to reconfigure all device registers to the same condition via software.
2. Features
I 16 LED drivers. Each output programmable at:
N Off
N On
N Programmable LED brightness
N Programmable LED turn-on time to help reduce EMI
I 1 MHz Fast-mode Plus compatible I2C-bus interface with 30 mA high drive capability
on SDA output for driving high capacitive buses
I 4096-step (12-bit) linear programmable brightness per LED output varying from fully
off (default) to maximum brightness
I LED output frequency (all LEDs) typically varies from 40 Hz to 1000 Hz (Default of 1Eh
in PRE_SCALE register results in a 200 Hz refresh rate with oscillator clock of
25 MHz.)
I Sixteen totem pole outputs (sink 25 mA and source 10 mA at 5 V) with software
programmable open-drain LED outputs selection (default at totem pole). No input
function.
I Output state change programmable on the Acknowledge or the STOP Command to
update outputs byte-by-byte or all at the same time (default to `Change on STOP').
I Active LOW Output Enable (OE) input pin. LEDn outputs programmable to logic 1,
logic 0 (default at power-up) or `high-impedance' when OE is HIGH.
I 6 hardware address pins allow 62 PCA9685 devices to be connected to the same
I2C-bus
I Toggling OE allows for hardware LED blinking
I 4 software programmable I2C-bus addresses (one LED All Call address and three LED
Sub Call addresses) allow groups of devices to be addressed at the same time in any
combination (for example, one register used for `All Call' so that all the PCA9685s on
the I2C-bus can be addressed at the same time and the second register used for three
different addresses so that 1/3 of all devices on the bus can be addressed at the same
time in a group). Software enable and disable for these I2C-bus address.
I Software Reset feature (SWRST General Call) allows the device to be reset through
the I2C-bus
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 2 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
I 25 MHz typical internal oscillator requires no external components
I External 50 MHz (max.) clock input
I Internal power-on reset
I Noise filter on SDA/SCL inputs
I Edge rate control on outputs
I No output glitches on power-up
I Supports hot insertion
I Low standby current
I Operating power supply voltage range of 2.3 V to 5.5 V
I 5.5 V tolerant inputs
I -40 C to +85 C operation
I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
I Packages offered: TSSOP28, HVQFN28
3. Applications
I RGB or RGBA LED drivers
I LED status information
I LED displays
I LCD backlights
I Keypad backlights for cellular phones or handheld devices
4. Ordering information
Table 1. Ordering information
Type number Topside mark Package
Name
PCA9685PW PCA9685PW TSSOP28 Description Version
SOT361-1
PCA9685PW/Q900[1] PCA9685PW TSSOP28 plastic thin shrink small outline package;
28 leads; body width 4.4 mm SOT361-1
PCA9685BS PCA9685BS HVQFN28
plastic thin shrink small outline package; SOT788-1
28 leads; body width 4.4 mm
plastic thermal enhanced very thin quad flat
package; no leads; 28 terminals;
body 6 6 0.85 mm
[1] PCA9685PW/Q900 is AEC-Q100 compliant. Contact i2c.support@nxp.com for PPAP.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 3 of 50
NXP Semiconductors PCA9685
5. Block diagram 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
A0 A1 A2 A3 A4 A5
SCL PCA9685 I2C-BUS
SDA INPUT FILTER CONTROL
VDD
VSS POWER-ON VDD
RESET
EXTCLK
OE LED
STATE
SELECT
REGISTER
PRESCALE PWM LEDn
REGISTER X
BRIGHTNESS
CONTROL
25 MHz CLOCK MUX/
OSCILLATOR SWITCH CONTROL
'0' permanently OFF
'1' permanently ON
002aac824
Remark: Only one LED output shown for clarity.
Fig 1. Block diagram of PCA9685
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 4 of 50
NXP Semiconductors PCA9685
6. Pinning information 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
6.1 Pinning
A0 1 28 VDD terminal 1 28 A2
A1 2 27 SDA index area 27 A1
A2 3 26 SCL 26 A0
A3 4 25 EXTCLK A3 1 25 VDD
A4 5 24 A5 A4 2 24 SDA
LED0 6 23 OE LED0 3 23 SCL
LED1 7 22 LED15 LED1 4 22 EXTCLK
LED2 8 21 LED14 LED2 5
LED3 9 PCA9685PW 20 LED13 LED3 6 PCA9685BS 21 A5
LED4 10 PCA9685PW/Q900 19 LED12 LED4 7 20 OE
LED5 11 18 LED11 19 LED15
LED6 12 17 LED10 18 LED14
LED7 13 16 LED9 17 LED13
VSS 14 15 LED8 16 LED12
15 LED11
LED5 8 002aad236
LED6 9
LED7 10
VSS 11
LED8 12
LED9 13
LED10 14
002aac825 Transparent top view
Fig 2. Pin configuration for TSSOP28 Fig 3. Pin configuration for HVQFN28
6.2 Pin description
Table 2. Pin description
Symbol
Pin Type Description
A0
A1 TSSOP28 HVQFN28 I address input 0
A2 I address input 1
A3 1 26 I address input 2
A4 I address input 3
LED0 2 27 I address input 4
LED1 O LED driver 0
LED2 3 28 O LED driver 1
LED3 O LED driver 2
LED4 4 1 O LED driver 3
LED5 O LED driver 4
LED6 5 2 O LED driver 5
LED7 O LED driver 6
VSS 6 3 O LED driver 7
LED8 power supply supply ground
LED9 7 4 O LED driver 8
LED10 O LED driver 9
LED11 8 5 O LED driver 10
O LED driver 11
9 6
10 7
11 8
12 9
13 10
14 11[1]
15 12
16 13
17 14
18 15
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 5 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 2. Pin description ...continued
Symbol
Pin Type Description
LED12
LED13 TSSOP28 HVQFN28 LED driver 12
LED14 LED driver 13
LED15 19 16 O LED driver 14
OE LED driver 15
A5 20 17 O active LOW output enable
EXTCLK address input 5
SCL 21 18 O external clock input[2]
SDA serial clock line
VDD 22 19 O serial data line
supply voltage
23 20 I
24 21 I
25 22 I
26 23 I
27 24 I/O
28 25 power supply
[1] HVQFN28 package die supply ground is connected to both VSS pin and exposed center pad. VSS pin must
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
PCB in the thermal pad region.
[2] This pin must be grounded when this feature is not used.
7. Functional description
Refer to Figure 1 "Block diagram of PCA9685".
7.1 Device addresses
Following a START condition, the bus master must output the address of the slave it is
accessing.
There are a maximum of 64 possible programmable addresses using the 6 hardware
address pins. Two of these addresses, Software Reset and LED All Call, cannot be used
because their default power-up state is ON, leaving a maximum of 62 addresses. Using
other reserved addresses, as well as any other subcall address, will reduce the total
number of possible addresses even further.
7.1.1 Regular I2C-bus slave address
The I2C-bus slave address of the PCA9685 is shown in Figure 4. To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
Remark: Using reserved I2C-bus addresses will interfere with other devices, but only if the
devices are on the bus and/or the bus will be open to other I2C-bus systems at some later
date. In a closed system where the designer controls the address assignment these
addresses can be used since the PCA9685 treats them like any other address. The
LED All Call, Software Reset and PCA9564 or PCA9665 slave address (if on the bus) can
never be used for individual device addresses.
PCA9685 LED All Call address (1110 000) and Software Reset (0000 0110) which
are active on start-up
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 6 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
PCA9564 (0000 000) or PCA9665 (1110 000) slave address which is active on
start-up
`reserved for future use' I2C-bus addresses (0000 011, 1111 1XX)
slave devices that use the 10-bit addressing scheme (1111 0XX)
slave devices that are designed to respond to the General Call address (0000 000)
which is used as the software reset address
High-speed mode (Hs-mode) master code (0000 1XX)
slave address
1 A5 A4 A3 A2 A1 A0 R/W
fixed hardware selectable
002aad168
Fig 4. Slave address
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
7.1.2 LED All Call I2C-bus address
Default power-up value (ALLCALLADR register): E0h or 1110 000X
Programmable through I2C-bus (volatile programming)
At power-up, LED All Call I2C-bus address is enabled. PCA9685 sends an ACK when
E0h (R/W = 0) or E1h (R/W = 1) is sent by the master.
See Section 7.3.7 "ALLCALLADR, LED All Call I2C-bus address" for more detail.
Remark: The default LED All Call I2C-bus address (E0h or 1110 000X) must not be used
as a regular I2C-bus slave address since this address is enabled at power-up. All the
PCA9685s on the I2C-bus will acknowledge the address if sent by the I2C-bus master.
7.1.3 LED Sub Call I2C-bus addresses
3 different I2C-bus addresses can be used
Default power-up values:
SUBADR1 register: E2h or 1110 001X
SUBADR2 register: E4h or 1110 010X
SUBADR3 register: E8h or 1110 100X
Programmable through I2C-bus (volatile programming)
At power-up, Sub Call I2C-bus addresses are disabled. PCA9685 does not send an
ACK when E2h (R/W = 0) or E3h (R/W = 1), E4h (R/W = 0) or E5h (R/W = 1), or
E8h (R/W = 0) or E9h (R/W = 1) is sent by the master.
See Section 7.3.6 "SUBADR1 to SUBADR3, I2C-bus subaddress 1 to 3" for more detail.
Remark: The default LED Sub Call I2C-bus addresses may be used as regular I2C-bus
slave addresses as long as they are disabled.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 7 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.1.4 Software Reset I2C-bus address
The address shown in Figure 5 is used when a reset of the PCA9685 needs to be
performed by the master. The Software Reset address (SWRST Call) must be used with
R/W = logic 0. If R/W = logic 1, the PCA9685 does not acknowledge the SWRST. See
Section 7.6 "Software reset" for more detail.
R/W
00000110
002aab416
Fig 5. Software Reset address
Remark: The Software Reset I2C-bus address is a reserved address and cannot be used
as a regular I2C-bus slave address or as an LED All Call or LED Sub Call address.
7.2 Control register
Following the successful acknowledgement of the slave address, LED All Call address or
LED Sub Call address, the bus master will send a byte to the PCA9685, which will be
stored in the Control register.
This register is used as a pointer to determine which register will be accessed.
D7 D6 D5 D4 D3 D2 D1 D0
002aac826
Fig 6. reset state = 00h
Remark: The Control register does not apply to the Software Reset I2C-bus address.
Control register
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 8 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.3 Register definitions
Table 3. Register summary
Register Register D7 D6 D5 D4 D3 D2 D1 D0 Name Type Function
# # (hex)
(decimal)
0 00 0 0 0 0 0 0 0 0 MODE1 read/write Mode register 1
read/write
1 01 0 0 0 0 0 0 0 1 MODE2 read/write Mode register 2
read/write I2C-bus subaddress 1
2 02 0 0 0 0 0 0 1 0 SUBADR1 read/write I2C-bus subaddress 2
read/write I2C-bus subaddress 3
3 03 0 0 0 0 0 0 1 1 SUBADR2 read/write LED All Call I2C-bus
read/write address
4 04 0 0 0 0 0 1 0 0 SUBADR3 read/write
read/write LED0 output and
5 05 0 0 0 0 0 1 0 1 ALLCALLADR read/write brightness control byte 0
read/write
6 06 0 0 0 0 0 1 1 0 LED0_ON_L read/write LED0 output and
read/write brightness control byte 1
7 07 0 0 0 0 0 1 1 1 LED0_ON_H read/write
read/write LED0 output and
8 08 0 0 0 0 1 0 0 0 LED0_OFF_L read/write brightness control byte 2
read/write
9 09 0 0 0 0 1 0 0 1 LED0_OFF_H read/write LED0 output and
read/write brightness control byte 3
10 0A 0 0 0 0 1 0 1 0 LED1_ON_L read/write
read/write LED1 output and
11 0B 0 0 0 0 1 0 1 1 LED1_ON_H brightness control byte 0
12 0C 0 0 0 0 1 1 0 0 LED1_OFF_L LED1 output and
brightness control byte 1
13 0D 0 0 0 0 1 1 0 1 LED1_OFF_H
LED1 output and
14 0E 0 0 0 0 1 1 1 0 LED2_ON_L brightness control byte 2
15 0F 0 0 0 0 1 1 1 1 LED2_ON_H LED1 output and
brightness control byte 3
16 10 0 0 0 1 0 0 0 0 LED2_OFF_L
LED2 output and
17 11 0 0 0 1 0 0 0 1 LED2_OFF_H brightness control byte 0
18 12 0 0 0 1 0 0 1 0 LED3_ON_L LED2 output and
brightness control byte 1
19 13 0 0 0 1 0 0 1 1 LED3_ON_H
LED2 output and
20 14 0 0 0 1 0 1 0 0 LED3_OFF_L brightness control byte 2
21 15 0 0 0 1 0 1 0 1 LED3_OFF_H LED2 output and
brightness control byte 3
LED3 output and
brightness control byte 0
LED3 output and
brightness control byte 1
LED3 output and
brightness control byte 2
LED3 output and
brightness control byte 3
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 9 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 3. Register summary ...continued
Register Register D7 D6 D5 D4 D3 D2 D1 D0 Name Type Function
# # (hex)
(decimal)
22 16 0 0 0 1 0 1 1 0 LED4_ON_L read/write LED4 output and
read/write brightness control byte 0
23 17 0 0 0 1 0 1 1 1 LED4_ON_H read/write
read/write LED4 output and
24 18 0 0 0 1 1 0 0 0 LED4_OFF_L read/write brightness control byte 1
read/write
25 19 0 0 0 1 1 0 0 1 LED4_OFF_H read/write LED4 output and
read/write brightness control byte 2
26 1A 0 0 0 1 1 0 1 0 LED5_ON_L read/write
read/write LED4 output and
27 1B 0 0 0 1 1 0 1 1 LED5_ON_H read/write brightness control byte 3
read/write
28 1C 0 0 0 1 1 1 0 0 LED5_OFF_L read/write LED5 output and
read/write brightness control byte 0
29 1D 0 0 0 1 1 1 0 1 LED5_OFF_H read/write
read/write LED5 output and
30 1E 0 0 0 1 1 1 1 0 LED6_ON_L read/write brightness control byte 1
read/write
31 1F 0 0 0 1 1 1 1 1 LED6_ON_H read/write LED5 output and
read/write brightness control byte 2
32 20 0 0 1 0 0 0 0 0 LED6_OFF_L
LED5 output and
33 21 0 0 1 0 0 0 0 1 LED6_OFF_H brightness control byte 3
34 22 0 0 1 0 0 0 1 0 LED7_ON_L LED6 output and
brightness control byte 0
35 23 0 0 1 0 0 0 1 1 LED7_ON_H
LED6 output and
36 24 0 0 1 0 0 1 0 0 LED7_OFF_L brightness control byte 1
37 25 0 0 1 0 0 1 0 1 LED7_OFF_H LED6 output and
brightness control byte 2
38 26 0 0 1 0 0 1 1 0 LED8_ON_L
LED6 output and
39 27 0 0 1 0 0 1 1 1 LED8_ON_H brightness control byte 3
40 28 0 0 1 0 1 0 0 0 LED8_OFF_L LED7 output and
brightness control byte 0
41 29 0 0 1 0 1 0 0 1 LED8_OFF_H
LED7 output and
brightness control byte 1
LED7 output and
brightness control byte 2
LED7 output and
brightness control byte 3
LED8 output and
brightness control byte 0
LED8 output and
brightness control byte 1
LED8 output and
brightness control byte 2
LED8 output and
brightness control byte 3
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 10 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 3. Register summary ...continued
Register Register D7 D6 D5 D4 D3 D2 D1 D0 Name Type Function
# # (hex)
(decimal)
42 2A 0 0 1 0 1 0 1 0 LED9_ON_L read/write LED9 output and
read/write brightness control byte 0
43 2B 0 0 1 0 1 0 1 1 LED9_ON_H read/write
read/write LED9 output and
44 2C 0 0 1 0 1 1 0 0 LED9_OFF_L read/write brightness control byte 1
read/write
45 2D 0 0 1 0 1 1 0 1 LED9_OFF_H read/write LED9 output and
read/write brightness control byte 2
46 2E 0 0 1 0 1 1 1 0 LED10_ON_L read/write
read/write LED9 output and
47 2F 0 0 1 0 1 1 1 1 LED10_ON_H read/write brightness control byte 3
read/write
48 30 0 0 1 1 0 0 0 0 LED10_OFF_L read/write LED10 output and
read/write brightness control byte 0
49 31 0 0 1 1 0 0 0 1 LED10_OFF_H read/write
read/write LED10 output and
50 32 0 0 1 1 0 0 1 0 LED11_ON_L read/write brightness control byte 1
read/write
51 33 0 0 1 1 0 0 1 1 LED11_ON_H read/write LED10 output and
read/write brightness control byte 2
52 34 0 0 1 1 0 1 0 0 LED11_OFF_L
LED10 output and
53 35 0 0 1 1 0 1 0 1 LED11_OFF_H brightness control byte 3
54 36 0 0 1 1 0 1 1 0 LED12_ON_L LED11 output and
brightness control byte 0
55 37 0 0 1 1 0 1 1 1 LED12_ON_H
LED11 output and
56 38 0 0 1 1 1 0 0 0 LED12_OFF_L brightness control byte 1
57 39 0 0 1 1 1 0 0 1 LED12_OFF_H LED11 output and
brightness control byte 2
58 3A 0 0 1 1 1 0 1 0 LED13_ON_L
LED11 output and
59 3B 0 0 1 1 1 0 1 1 LED13_ON_H brightness control byte 3
60 3C 0 0 1 1 1 1 0 0 LED13_OFF_L LED12 output and
brightness control byte 0
61 3D 0 0 1 1 1 1 0 1 LED13_OFF_H
LED12 output and
brightness control byte 1
LED12 output and
brightness control byte 2
LED12 output and
brightness control byte 3
LED13 output and
brightness control byte 0
LED13 output and
brightness control byte 1
LED13 output and
brightness control byte 2
LED13 output and
brightness control byte 3
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 11 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 3. Register summary ...continued
Register Register D7 D6 D5 D4 D3 D2 D1 D0 Name Type Function
# # (hex)
(decimal)
62 3E 0 0 1 1 1 1 1 0 LED14_ON_L read/write LED14 output and
brightness control byte 0
63 3F 0 0 1 1 1 1 1 1 LED14_ON_H read/write LED14 output and
brightness control byte 1
64 40 0 1 0 0 0 0 0 0 LED14_OFF_L read/write LED14 output and
brightness control byte 2
65 41 0 1 0 0 0 0 0 1 LED14_OFF_H read/write LED14 output and
brightness control byte 3
66 42 0 1 0 0 0 0 1 0 LED15_ON_L read/write LED15 output and
brightness control byte 0
67 43 0 1 0 0 0 0 1 1 LED15_ON_H read/write LED15 output and
brightness control byte 1
68 44 0 1 0 0 0 1 0 0 LED15_OFF_L read/write LED15 output and
brightness control byte 2
69 45 0 1 0 0 0 1 0 1 LED15_OFF_H read/write LED15 output and
brightness control byte 3
... reserved for future use
250 FA 1 1 1 1 1 0 1 0 ALL_LED_ON_L write/read load all the LEDn_ON
zero registers, byte 0
251 FB 1 1 1 1 1 0 1 1 ALL_LED_ON_H write/read load all the LEDn_ON
zero registers, byte 1
252 FC 1 1 1 1 1 1 0 0 ALL_LED_OFF_L write/read load all the LEDn_OFF
zero registers, byte 0
253 FD 1 1 1 1 1 1 0 1 ALL_LED_OFF_H write/read load all the LEDn_OFF
zero registers, byte 1
254 FE 1 1 1 1 1 1 1 0 PRE_SCALE[1] read/write prescaler for output
frequency
255 FF 1 1 1 1 1 1 1 1 TestMode[2] read/write defines the test mode to
be entered
... All further addresses are reserved for future use; reserved addresses will not be acknowledged.
[1] Writes to PRE_SCALE register are blocked when SLEEP bit is logic 0 (MODE 1).
[2] Reserved. Writes to this register may cause unpredictable results.
Remark: Auto Increment past register 69 will point to MODE1 register (register 0).
Auto Increment also works from register 250 to register 254, then rolls over to register 0.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 12 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.3.1 Mode register 1, MODE1
Table 4. MODE1 - Mode register 1 (address 00h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 RESTART R Shows state of RESTART logic. See Section 7.3.1.1 for detail.
W User writes logic 1 to this bit to clear it to logic 0. A user write of logic 0 will have no
effect. See Section 7.3.1.1 for detail.
0* Restart disabled.
1 Restart enabled.
6 EXTCLK R/W To use the EXTCLK pin, this bit must be set by the following sequence:
1. Set the SLEEP bit in MODE1. This turns off the internal oscillator.
2. Write logic 1s to both the SLEEP and EXTCLK bits in MODE1. The switch is
now made. The external clock can be active during the switch because the
SLEEP bit is set.
This bit is a `sticky bit', that is, it cannot be cleared by writing a logic 0 to it. The
EXTCLK bit can only be cleared by a power cycle or software reset.
EXTCLK range is DC to 50 MHz.
refresh_rate = 4---0---9---6-------E---(-X--p--T-r---eC---s-L-c---Ka----l--e----+-----1---)-
0* Use internal clock.
1 Use EXTCLK pin clock.
Register Auto-Increment disabled[1].
5 AI R/W 0*
1 Register Auto-Increment enabled.
Normal mode[2].
4 SLEEP R/W 0 Low power mode. Oscillator off[3][4].
PCA9685 does not respond to I2C-bus subaddress 1.
1* PCA9685 responds to I2C-bus subaddress 1.
PCA9685 does not respond to I2C-bus subaddress 2.
3 SUB1 R/W 0* PCA9685 responds to I2C-bus subaddress 2.
PCA9685 does not respond to I2C-bus subaddress 3.
1 PCA9685 responds to I2C-bus subaddress 3.
PCA9685 does not respond to LED All Call I2C-bus address.
2 SUB2 R/W 0* PCA9685 responds to LED All Call I2C-bus address.
1
1 SUB3 R/W 0*
1
0 ALLCALL R/W 0
1*
[1] When the Auto Increment flag is set, AI = 1, the Control register is automatically incremented after a read or write. This allows the user
to program the registers sequentially.
[2] It takes 500 s max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not
guaranteed if PWM control registers are accessed within the 500 s window. There is no start-up delay required when using the
EXTCLK pin as the PWM clock.
[3] No PWM control is possible when the oscillator is off.
[4] When the oscillator is off (Sleep mode) the LEDn outputs cannot be turned on, off or dimmed/blinked.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 13 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.3.1.1 Restart mode
If the PCA9685 is operating and the user decides to put the chip to sleep (setting MODE1
bit 4) without stopping any of the PWM channels, the RESTART bit (MODE1 bit 7) will be
set to logic 1 at the end of the PWM refresh cycle. The contents of each PWM register are
held valid when the clock is off.
To restart all of the previously active PWM channels with a few I2C-bus cycles do the
following steps:
1. Read MODE1 register.
2. Check that bit 7 (RESTART) is a logic 1. If it is, clear bit 4 (SLEEP). Allow time for
oscillator to stabilize (500 s).
3. Write logic 1 to bit 7 of MODE1 register. All PWM channels will restart and the
RESTART bit will clear.
Remark: The SLEEP bit must be logic 0 for at least 500 s, before a logic 1 is written into
the RESTART bit.
Other actions that will clear the RESTART bit are:
1. Power cycle.
2. I2C Software Reset command.
3. If the MODE2 OCH bit is logic 0, write to any PWM register then issue an I2C-bus
STOP.
4. If the MODE2 OCH bit is logic 1, write to all four PWM registers in any PWM channel.
Likewise, if the user does an orderly shutdown1 of all the PWM channels before setting the
SLEEP bit, the RESTART bit will be cleared. If this is done the contents of all PWM
registers are invalidated and must be reloaded before reuse.
An example of the use of the RESTART bit would be the restoring of a customer's laptop
LCD backlight intensity coming out of Standby to the level it was before going into
Standby.
1. Two methods can be used to do an orderly shutdown. The fastest is to write a logic 1 to bit 4 in register ALL_LED_OFF_H. The
other method is to write logic 1 to bit 4 in each active PWM channel LEDn_OFF_H register.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 14 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.3.2 Mode register 2, MODE2
Table 5. MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 to 5 - read only 000* reserved
4 INVRT[1] R/W 0* Output logic state not inverted. Value to use when external driver used.
Applicable when OE = 0.
1 Output logic state inverted. Value to use when no external driver used.
Applicable when OE = 0.
3 OCH R/W 0* Outputs change on STOP command[2].
1 Outputs change on ACK[3].
2 OUTDRV[1] R/W 0 The 16 LEDn outputs are configured with an open-drain structure.
1* The 16 LEDn outputs are configured with a totem pole structure.
1 to 0 OUTNE[1:0][4] R/W 00* When OE = 1 (output drivers not enabled), LEDn = 0.
01 When OE = 1 (output drivers not enabled):
LEDn = 1 when OUTDRV = 1
LEDn = high-impedance when OUTDRV = 0 (same as OUTNE[1:0] = 10)
1X When OE = 1 (output drivers not enabled), LEDn = high-impedance.
[1] See Section 7.7 "Using the PCA9685 with and without external drivers" for more details. Normal LEDs can be driven directly in either
mode. Some newer LEDs include integrated Zener diodes to limit voltage transients, reduce EMI, protect the LEDs and these must be
driven only in the open-drain mode to prevent overheating the IC.
[2] Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9685. Applicable to registers from
06h (LED0_ON_L) to 45h (LED15_OFF_H) only. 1 or more registers can be written, in any order, before STOP.
[3] Update on ACK requires all 4 PWM channel registers to be loaded before outputs will change on the last ACK.
[4] See Section 7.4 "Active LOW output enable input" for more details.
7.3.3 LED output and PWM control
The turn-on time of each LED driver output and the duty cycle of PWM can be controlled
independently using the LEDn_ON and LEDn_OFF registers.
There will be two 12-bit registers per LED output. These registers will be programmed by
the user. Both registers will hold a value from 0 to 4095. One 12-bit register will hold a
value for the ON time and the other 12-bit register will hold the value for the OFF time. The
ON and OFF times are compared with the value of a 12-bit counter that will be running
continuously from 0000h to 0FFFh (0 to 4095 decimal).
Update on ACK requires all 4 PWM channel registers to be loaded before outputs will
change on the last ACK.
The ON time, which is programmable, will be the time the LED output will be asserted and
the OFF time, which is also programmable, will be the time when the LED output will be
negated. In this way, the phase shift becomes completely programmable. The resolution
for the phase shift is 1/4096 of the target frequency. Table 6 lists these registers.
The following two examples illustrate how to calculate values to be loaded into these
registers.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 15 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Example 1: (assumes that the LED0 output is used and
(delay time) + (PWM duty cycle) 100 %)
Delay time = 10 %; PWM duty cycle = 20 % (LED on time = 20 %; LED off time = 80 %).
Delay time = 10 % = 409.6 ~ 410 counts = 19Ah.
Since the counter starts at 0 and ends at 4095, we will subtract 1, so delay time = 199h
counts.
LED0_ON_H = 1h; LED0_ON_L = 99h
LED on time = 20 % = 819.2 ~ 819 counts.
Off time = 4CCh (decimal 410 + 819 - 1 = 1228)
LED0_OFF_H = 4h; LED0_OFF_L = CCh
STOP 4095 0 4095 0 4095 0
0
example 1 819 819 819 819
1228 1228 1228 1228
LEDn_ON
LEDn_OFF 002aad812
Fig 7. LED output, example 1
Example 2: (assumes that the LED4 output is used and
(delay time) + (PWM duty cycle > 100 %)
Delay time = 90 %; PWM duty cycle = 90 % (LED on time = 90 %; LED off time = 10 %).
Delay time = 90 % = 3686.4 ~ 3686 counts - 1 = 3685 = E65h.
LED4_ON_H = Eh; LED4_ON_L = 65h
LED on time = 90 % = 3686 counts.
Since the delay time and LED on period of the duty cycle is greater than 4096 counts,
the LEDn_OFF count will occur in the next frame. Therefore, 4096 is subtracted from
the LEDn_OFF count to get the correct LEDn_OFF count. See Figure 9, Figure 10 and
Figure 11.
Off time = 4CBh (decimal 3685 + 3686 = 7372 - 4096 = 3275)
LED4_OFF_H = 4h; LED4_OFF_L = CBh
STOP 4095 0 4095 0 4095 0
0 3686
3686 3686
example 2 3275 3275
LEDn_ON
LEDn_OFF
002aad813
Fig 8. LED output, example 2
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 16 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
STOP 4095 0 4095 0 4095 0
0 511 3071
511 2047
example 1 3071 3071
LEDn_ON 511 767 2047
767
LEDn_OFF
example 2 2047
LEDn_ON
LEDn_OFF
example 3 1023
LEDn_ON
example 4 off 1023
1023
LEDn_ON
LEDn_OFF
002aad193
Fig 9. Example 1: LEDn_ON < LEDn_OFF
Example 2: LEDn_ON > LEDn_OFF
Example 3: LEDn_ON[12] = 1; LEDn_ON[11:0] = 1022; LEDn_OFF[12] = 0; LEDn_OFF[11:0] = don't care
Example 4: LEDn_ON[12] = 0; LEDn_OFF[12] = 0; LEDn_ON[11:0] = LEDn_OFF[11:0]
Output example
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 17 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
STOP 4095 0 4095 0 4095 0
0 register(s) updated in this cycle output(s) updated in this cycle 002aad194
example 1 511
1023
LEDn_ON 511 511
1023
LEDn_OFF 3071
example 2
LEDn_ON 511 767 767
1023 1023
LEDn_OFF 3071
example 3
LEDn_ON 511 3071
LEDn_OFF 3071 1023
example 4 off
3071
LEDn_ON 511
LEDn_OFF
Example 1: LEDn_ON unchanged and LEDn_OFF decreased.
Example 2: LEDn_ON increased and LEDn_OFF decreased.
Example 3: LEDn_ON made > LEDn_OFF.
Example 4: LEDn_OFF[12] set to 1.
Fig 10. Update examples when LEDn_ON < LEDn_OFF
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 18 of 50
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
PCA9685_2 STOP 4095 0 4095 0 4095 0 4095 0 NXP Semiconductors
0 register(s) updated in this cycle output(s) updated in this cycle
Product data sheet 3413
example 1 511
LEDn_ON 3071 3071 3071
LEDn_OFF 511 3413
1023
example 2 3071 1023 3413 002aad195
1023 511
LEDn_ON
LEDn_OFF
example 3 3071 3071
off 3413
LEDn_ON
Rev. 02 -- 16 July 2009 LEDn_OFF
on
example 4
LEDn_ON
LEDn_OFF
Example 1: LEDn_ON unchanged and LEDn_OFF decreased, but delay still > LEDn_OFF PCA9685
Example 2: LEDn_ON changed and LEDn_OFF changed, but delay still > LEDn_OFF
Example 3: LEDn_ON unchanged and LEDn_OFF increased where LEDn_ON < LEDn_OFF 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Example 4: LEDn_ON[12] = 1 and LEDn_OFF[12] changed from 0 to 1
Fig 11. Update examples when LEDn_ON > LEDn_OFF
NXP B.V. 2009. All rights reserved.
19 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description
Legend: * default value.
Address Register Bit Symbol Access Value Description
06h LED0_ON_L 7:0 LED0_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED0, 8 LSBs
07h LED0_ON_H 7:5 reserved R 000* non-writable
4 LED0_ON_H[4] R/W 0* LED0 full ON
3:0 LED0_ON_H[3:0] R/W 0000* LEDn_ON count for LED0, 4 MSBs
08h LED0_OFF_L 7:0 LED0_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED0, 8 LSBs
09h LED0_OFF_H 7:5 reserved R 000* non-writable
4 LED0_OFF_H[4] R/W 1* LED0 full OFF
3:0 LED0_OFF_H[3:0] R/W 0000*
0Ah LED1_ON_L 7:0 LED1_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED1, 8 LSBs
0Bh LED1_ON_H 7:5 reserved R 000* non-writable
4 LED1_ON_H[4] R/W 0* LED1 full ON
3:0 LED1_ON_H[3:0] R/W 0000* LEDn_ON count for LED1, 4 MSBs
0Ch LED1_OFF_L 7:0 LED1_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED1, 8 LSBs
0Dh LED1_OFF_H 7:5 reserved R 000* non-writable
4 LED1_OFF_H[4] R/W 1* LED1 full OFF
3:0 LED1_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED1, 4 MSBs
0Eh LED2_ON_L 7:0 LED2_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED2, 8 LSBs
0Fh LED2_ON_H 7:5 reserved R 000* non-writable
4 LED2_ON_H[4] R/W 0* LED2 full ON
3:0 LED2_ON_H[3:0] R/W 0000* LEDn_ON count for LED2, 4 MSBs
10h LED2_OFF_L 7:0 LED2_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED2, 8 LSBs
11h LED2_OFF_H 7:5 reserved R 000* non-writable
4 LED2_OFF_H[4] R/W 1* LED2 full OFF
3:0 LED2_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED2, 4 MSBs
12h LED3_ON_L 7:0 LED3_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED3, 8 LSBs
13h LED3_ON_H 7:5 reserved R 000* non-writable
4 LED3_ON_H[4] R/W 0* LED3 full ON
3:0 LED3_ON_H[3:0] R/W 0000* LEDn_ON count for LED3, 4 MSBs
14h LED3_OFF_L 7:0 LED3_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED3, 8 LSBs
15h LED3_OFF_H 7:5 reserved R 000* non-writable
4 LED3_OFF_H[4] R/W 1* LED3 full OFF
3:0 LED3_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED3, 4 MSBs
16h LED4_ON_L 7:0 LED4_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED4, 8 LSBs
17h LED4_ON_H 7:5 reserved R 000* non-writable
4 LED4_ON_H[4] R/W 0* LED4 full ON
3:0 LED4_ON_H[3:0] R/W 0000* LEDn_ON count for LED4, 4 MSBs
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 20 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description ...continued
Legend: * default value.
Address Register Bit Symbol Access Value Description
18h LED4_OFF_L 7:0 LED4_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED4, 8 LSBs
19h LED4_OFF_H 7:5 reserved R 000* non-writable
4 LED4_OFF_H[4] R/W 1* LED4 full OFF
3:0 LED4_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED4, 4 MSBs
1Ah LED5_ON_L 7:0 LED5_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED5, 8 LSBs
1Bh LED5_ON_H 7:5 reserved R 000* non-writable
4 LED5_ON_H[4] R/W 0* LED5 full ON
3:0 LED5_ON_H[3:0] R/W 0000* LEDn_ON count for LED5, 4 MSBs
1Ch LED5_OFF_L 7:0 LED5_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED5, 8 LSBs
1Dh LED5_OFF_H 7:5 reserved R 000* non-writable
4 LED5_OFF_H[4] R/W 1* LED5 full OFF
3:0 LED5_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED5, 4 MSBs
1Eh LED6_ON_L 7:0 LED6_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED6, 8 LSBs
1Fh LED6_ON_H 7:5 reserved R 000* non-writable
4 LED6_ON_H[4] R/W 0* LED6 full ON
3:0 LED6_ON_H[3:0] R/W 0000* LEDn_ON count for LED6, 4 MSBs
20h LED6_OFF_L 7:0 LED6_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED6, 8 LSBs
21h LED6_OFF_H 7:5 reserved R 000* non-writable
4 LED6_OFF_H[4] R/W 1* LED6 full OFF
3:0 LED6_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED6, 4 MSBs
22h LED7_ON_L 7:0 LED7_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED7, 8 LSBs
23h LED7_ON_H 7:5 reserved R 000* non-writable
4 LED7_ON_H[4] R/W 0* LED7 full ON
3:0 LED7_ON_H[3:0] R/W 0000* LEDn_ON count for LED7, 4 MSBs
24h LED7_OFF_L 7:0 LED7_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED7, 8 LSBs
25h LED7_OFF_H 7:5 reserved R 000* non-writable
4 LED7_OFF_H[4] R/W 1* LED7 full OFF
3:0 LED7_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED7, 4 MSBs
26h LED8_ON_L 7:0 LED8_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED8, 8 LSBs
27h LED8_ON_H 7:5 reserved R 000* non-writable
4 LED8_ON_H[4] R/W 0* LED8 full ON
3:0 LED8_ON_H[3:0] R/W 0000* LEDn_ON count for LED8, 4 MSBs
28h LED8_OFF_L 7:0 LED8_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED8, 8 LSBs
29h LED8_OFF_H 7:5 reserved R 000* non-writable
4 LED8_OFF_H[4] R/W 1* LED8 full OFF
3:0 LED8_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED8, 4 MSBs
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 21 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description ...continued
Legend: * default value.
Address Register Bit Symbol Access Value Description
2Ah LED9_ON_L 7:0 LED9_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED9, 8 LSBs
2Bh LED9_ON_H 7:5 reserved R 000* non-writable
4 LED9_ON_H[4] R/W 0* LED9 full ON
3:0 LED9_ON_H[3:0] R/W 0000* LEDn_ON count for LED9, 4 MSBs
2Ch LED9_OFF_L 7:0 LED9_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED9, 8 LSBs
2Dh LED9_OFF_H 7:5 reserved R 000* non-writable
4 LED9_OFF_H[4] R/W 1* LED9 full OFF
3:0 LED9_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED9, 4 MSBs
2Eh LED10_ON_L 7:0 LED10_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED10, 8 LSBs
2Fh LED10_ON_H 7:5 reserved R 000* non-writable
4 LED10_ON_H[4] R/W 0* LED10 full ON
3:0 LED10_ON_H[3:0] R/W 0000* LEDn_ON count for LED10, 4 MSBs
30h LED10_OFF_L 7:0 LED10_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED10, 8 LSBs
31h LED10_OFF_H 7:5 reserved R 000* non-writable
4 LED10_OFF_H[4] R/W 1* LED10 full OFF
3:0 LED10_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED10, 4 MSBs
32h LED11_ON_L 7:0 LED11_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED11, 8 LSBs
33h LED11_ON_H 7:5 reserved R 000* non-writable
4 LED11_ON_H[4] R/W 0* LED11 full ON
3:0 LED11_ON_H[3:0] R/W 0000* LEDn_ON count for LED11, 4 MSBs
34h LED11_OFF_L 7:0 LED11_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED11, 8 LSBs
35h LED11_OFF_H 7:5 reserved R 000* non-writable
4 LED11_OFF_H[4] R/W 1* LED11 full OFF
3:0 LED11_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED11, 4 MSBs
36h LED12_ON_L 7:0 LED12_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED12, 8 LSBs
37h LED12_ON_H 7:5 reserved R 000* non-writable
4 LED12_ON_H[4] R/W 0* LED12 full ON
3:0 LED12_ON_H[3:0] R/W 0000* LEDn_ON count for LED12, 4 MSBs
38h LED12_OFF_L 7:0 LED12_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED12, 8 LSBs
39h LED12_OFF_H 7:5 reserved R 000* non-writable
4 LED12_OFF_H[4] R/W 1* LED12 full OFF
3:0 LED12_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED12, 4 MSBs
3Ah LED13_ON_L 7:0 LED13_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED13, 8 LSBs
3Bh LED13_ON_H 7:5 reserved R 000* non-writable
4 LED13_ON_H[4] R/W 0* LED13 full ON
3:0 LED13_ON_H[3:0] R/W 0000* LEDn_ON count for LED13, 4 MSBs
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 22 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description ...continued
Legend: * default value.
Address Register Bit Symbol Access Value Description
3Ch LED13_OFF_L 7:0 LED13_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED13, 8 LSBs
3Dh LED13_OFF_H 7:5 reserved R 000* non-writable
4 LED13_OFF_H[4] R/W 1* LED13 full OFF
3:0 LED13_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED13, 4 MSBs
3Eh LED14_ON_L 7:0 LED14_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED14, 8 LSBs
3Fh LED14_ON_H 7:5 reserved R 000* non-writable
4 LED14_ON_H[4] R/W 0* LED14 full ON
3:0 LED14_ON_H[3:0] R/W 0000* LEDn_ON count for LED14, 4 MSBs
40h LED14_OFF_L 7:0 LED14_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED14, 8 LSBs
41h LED14_OFF_H 7:5 reserved R 000* non-writable
4 LED14_OFF_H[4] R/W 1* LED14 full OFF
3:0 LED14_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED14, 4 MSBs
42h LED15_ON_L 7:0 LED15_ON_L[7:0] R/W 0000 0000* LEDn_ON count for LED15, 8 LSBs
43h LED15_ON_H 7:5 reserved R 000* non-writable
4 LED15_ON_H[4] R/W 0* LED15 full ON
3:0 LED15_ON_H[3:0] R/W 0000* LEDn_ON count for LED15, 4 MSBs
44h LED15_OFF_L 7:0 LED15_OFF_L[7:0] R/W 0000 0000* LEDn_OFF count for LED15, 8 LSBs
45h LED15_OFF_H 7:5 reserved R 000* non-writable
4 LED15_OFF_H[4] R/W 1* LED15 full OFF
3:0 LED15_OFF_H[3:0] R/W 0000* LEDn_OFF count for LED15, 4 MSBs
The LEDn_ON_H output control bit 4, when set to logic 1, causes the output to be always
ON. The turning ON of the LED is delayed by the amount in the LEDn_ON registers.
LEDn_OFF[11:0] are ignored. When this bit = 0, then the LEDn_ON and LEDn_OFF
registers are used according to their normal definition.
The LEDn_OFF_H output control bit 4, when set to logic 1, causes the output to be
always OFF. In this case the values in the LEDn_ON registers are ignored.
Remark: When all LED outputs are configured as `always OFF', the prescale counter and
all associated PWM cycle timing logic are disabled. If LEDn_ON_H[4] and
LEDn_OFF_H[4] are set at the same time, the LEDn_OFF_H[4] function takes
precedence.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 23 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.3.4 ALL_LED_ON and ALL_LED_OFF control
The ALL_LED_ON and ALL_LED_OFF registers allow just four I2C-bus write sequences
to fill all the ON and OFF registers with the same patterns.
Table 7. ALL_LED_ON and ALL_LED_OFF control registers (address FAh to FEh) bit description
Legend: * default value.
Address Register Bit Symbol Access Value Description
FAh ALL_LED_ON_L 7:0 ALL_LED_ON_L[7:0] W only 0000 0000* LEDn_ON count for ALL_LED, 8 MSBs
FBh ALL_LED_ON_H 7:5 reserved R 000* non-writable
4 ALL_LED_ON_H[4] W only 1* ALL_LED full ON
3:0 ALL_LED_ON_H[3:0] W only 0000* LEDn_ON count for ALL_LED, 4 MSBs
FCh ALL_LED_OFF_L 7:0 ALL_LED_OFF_L[7:0] W only 0000 0000* LEDn_OFF count for ALL_LED,
8 MSBs
FDh ALL_LED_OFF_H 7:5 reserved R 000* non-writable
4 ALL_LED_OFF_H[4] W only 1* ALL_LED full OFF
3:0 ALL_LED_OFF_H[3:0] W only 0000* LEDn_OFF count for ALL_LED,
4 MSBs
FEh PRE_SCALE 7:0 PRE_SCALE[7:0] R/W 0001 1110* prescaler to program the output
frequency
The LEDn_ON and LEDn_OFF counts can vary from 0 to 4095. The LEDn_ON and
LEDn_OFF count registers should never be programmed with the same values.
Because the loading of the LEDn_ON and LEDn_OFF registers is via the I2C-bus, and
asynchronous to the internal oscillator, we want to ensure that we do not see any visual
artifacts of changing the ON and OFF values. This is achieved by updating the changes at
the end of the LOW cycle.
7.3.5 PWM frequency PRE_SCALE
The hardware forces a minimum value that can be loaded into the PRE_SCALE register at
`3'. The PRE_SCALE register defines the frequency at which the outputs modulate. The
prescale value is determined with the formula shown in Equation 1:
prescale value = round 4----0---9---6---o---s---cu---_p---c-d--l-a-o--t--ce---k_----r--a----t--e- 1 (1)
where the update rate is the output modulation frequency required. For example, for an
output frequency of 200 Hz with an oscillator clock frequency of 25 MHz:
prescale value = round 4---0-2--9-5--6---M-----H--2---0z---0- 1 = 30 (2)
The PRE_SCALE register can only be set when the SLEEP bit of MODE1 register is set
to logic 1.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 24 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.3.6 SUBADR1 to SUBADR3, I2C-bus subaddress 1 to 3
Table 8. SUBADR1 to SUBADR3 - I2C-bus subaddress registers 0 to 3 (address 02h to 04h)
bit description
Legend: * default value.
Address Register Bit Symbol Access Value Description
02h SUBADR1 7:1 A1[7:1] R/W 1110 001* I2C-bus subaddress 1
0 A1[0] R only 0* reserved
03h SUBADR2 7:1 A2[7:1] R/W 1110 010* I2C-bus subaddress 2
0 A2[0] R only 0* reserved
04h SUBADR3 7:1 A3[7:1] R/W 1110 100* I2C-bus subaddress 3
0 A3[0] R only 0* reserved
Subaddresses are programmable through the I2C-bus. Default power-up values are E2h,
E4h, E8h, and the device(s) will not acknowledge these addresses right after power-up
(the corresponding SUBx bit in MODE1 register is equal to 0).
Once subaddresses have been programmed to their right values, SUBx bits need to be
set to logic 1 in order to have the device acknowledging these addresses (MODE1
register).
Only the 7 MSBs representing the I2C-bus subaddress are valid. The LSB in SUBADRx
register is a read-only bit (0).
When SUBx is set to logic 1, the corresponding I2C-bus subaddress can be used during
either an I2C-bus read or write sequence.
7.3.7 ALLCALLADR, LED All Call I2C-bus address
Table 9. ALLCALLADR - LED All Call I2C-bus address register (address 05h) bit
description
Legend: * default value.
Address Register Bit Symbol Access Value Description
05h ALLCALLADR 7:1 AC[7:1] R/W 1110 000* ALLCALL I2C-bus
address register
0 AC[0] R only 0* reserved
The LED All Call I2C-bus address allows all the PCA9685s in the bus to be programmed
at the same time (ALLCALL bit in register MODE1 must be equal to 1 (power-up default
state)). This address is programmable through the I2C-bus and can be used during either
an I2C-bus read or write sequence. The register address can also be programmed as a
Sub Call.
Only the 7 MSBs representing the All Call I2C-bus address are valid. The LSB in
ALLCALLADR register is a read-only bit (0).
If ALLCALL bit = 0, the device does not acknowledge the address programmed in register
ALLCALLADR.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 25 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.4 Active LOW output enable input
The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at
the same time.
When a LOW level is applied to OE pin, all the LED outputs are enabled and follow the
output state defined in the LEDn_ON and LEDn_OFF registers with the polarity
defined by INVRT bit (MODE2 register).
When a HIGH level is applied to OE pin, all the LED outputs are programmed to the
value that is defined by OUTNE[1:0] in the MODE2 register.
Table 10. LED outputs when OE = 1
OUTNE1 OUTNE0 LED outputs
0 0 0
0 1 1 if OUTDRV = 1, high-impedance if OUTDRV = 0
1 0 high-impedance
1 1 high-impedance
The OE pin can be used as a synchronization signal to switch on/off several PCA9685
devices at the same time. This requires an external clock reference that provides blinking
period and the duty cycle.
The OE pin can also be used as an external dimming control signal. The frequency of the
external clock must be high enough not to be seen by the human eye, and the duty cycle
value determines the brightness of the LEDs.
7.5 Power-on reset
When power is applied to VDD, an internal power-on reset holds the PCA9685 in a reset
condition until VDD has reached VPOR. At this point, the reset condition is released and the
PCA9685 registers and I2C-bus state machine are initialized to their default states.
Thereafter, VDD must be lowered below 0.2 V to reset the device.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 26 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.6 Software reset
The Software Reset Call (SWRST Call) allows all the devices in the I2C-bus to be reset to
the power-up state value through a specific formatted I2C-bus command. To be performed
correctly, it implies that the I2C-bus is functional and that there is no device hanging the
bus.
The SWRST Call function is defined as the following:
1. A START command is sent by the I2C-bus master.
2. The reserved SWRST I2C-bus address `0000 000' with the R/W bit set to `0' (write) is
sent by the I2C-bus master.
3. The PCA9685 device(s) acknowledge(s) after seeing the General Call address
`0000 0000' (00h) only. If the R/W bit is set to `1' (read), no acknowledge is returned to
the I2C-bus master.
4. Once the General Call address has been sent and acknowledged, the master sends
1 byte with 1 specific value (SWRST data byte 1):
a. Byte 1 = 06h: the PCA9685 acknowledges this value only. If byte 1 is not equal to
06h, the PCA9685 does not acknowledge it.
If more than 1 byte of data is sent, the PCA9685 does not acknowledge any more.
5. Once the correct byte (SWRST data byte 1) has been sent and correctly
acknowledged, the master sends a STOP command to end the SWRST Call: the
PCA9685 then resets to the default value (power-up value) and is ready to be
addressed again within the specified bus free time (tBUF).
General Call address SWRST data byte 1
S0 0 0 0 0 0 0 0A0 0 0 0 0 1 1 0AP
START condition acknowledge acknowledge
from slave from slave
STOP
condition
002aac900
Fig 12. SWRST Call
The I2C-bus master must interpret a non-acknowledge from the PCA9685 (at any time) as
a `SWRST Call Abort'. The PCA9685 does not initiate a reset of its registers. This
happens only when the format of the SWRST Call sequence is not correct.
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Product data sheet 27 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.7 Using the PCA9685 with and without external drivers
The PCA9685 LED output drivers are 5.5 V only tolerant and can sink up to 25 mA at 5 V.
If the device needs to drive LEDs to a higher voltage and/or higher current, use of an
external driver is required.
INVRT bit (MODE2 register) can be used to keep the LED PWM control firmware the
same independently of the type of external driver. This bit allows LED output polarity
inversion/non-inversion only when OE = 0.
OUTDRV bit (MODE2 register) allows minimizing the amount of external components
required to control the external driver (N-type or P-type device).
Table 11. Use of INVRT and OUTDRV based on connection to the LEDn outputs when OE = 0[1]
INVRT OUTDRV Direct connection to LEDn External N-type driver External P-type driver
Firmware External Firmware External Firmware External
pull-up pull-up pull-up
resistor resistor resistor
0 0 formulas and LED LED current formulas and LED required formulas and LED required
output state values limiting R[2] output state output state values
inverted apply
values inverted
0 1 formulas and LED LED current formulas and LED not formulas and LED not required
output state values output state values
inverted limiting R[2] output state required[3] inverted
values apply[3]
1 0 formulas and LED LED current formulas and LED required formulas and LED required
limiting R output state output state values
output state values inverted
apply[2] values apply
1 1 formulas and LED LED current formulas and LED not required formulas and LED not
output state values limiting R output state output state values required[4]
apply[2]
values inverted apply[4]
[1] When OE = 1, LED output state is controlled only by OUTNE[1:0] bits (MODE2 register).
[2] Correct configuration when LEDs directly connected to the LEDn outputs (connection to VDD through current limiting resistor).
[3] Optimum configuration when external N-type (NPN, NMOS) driver used.
[4] Optimum configuration when external P-type (PNP, PMOS) driver used.
+5 V +5 V
LED0 LED0
002aad169
LED0 +VDD
INVRT = 0 002aad171
OUTDRV = 1 002aad170
Fig 13. External N-type driver INVRT = 1
INVRT = 1 OUTDRV = 0
OUTDRV = 1 Fig 15. Direct LED connection
Fig 14. External P-type driver
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 28 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
8. Characteristics of the I2C-bus
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
8.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 16).
SDA
SCL
data line change mba607
stable; of data
data valid allowed
Fig 16. Bit transfer
8.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see Figure 17).
SDA
SCL P
S
STOP condition
START condition mba608
Fig 17. Definition of START and STOP conditions
8.2 System configuration
A device generating a message is a `transmitter'; a device receiving is the `receiver'. The
device that controls the message is the `master' and the devices which are controlled by
the master are the `slaves' (see Figure 18).
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 29 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
SDA SLAVE SLAVE MASTER MASTER I2C-BUS
SCL RECEIVER TRANSMITTER/ TRANSMITTER TRANSMITTER/ MULTIPLEXER
MASTER RECEIVER RECEIVER
TRANSMITTER/
RECEIVER
SLAVE
002aaa966
Fig 18. System configuration
8.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold
time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
data output
by transmitter
not acknowledge
data output
by receiver
acknowledge
SCL from master 1 2 8 9
S clock pulse for
acknowledgement
START
condition 002aaa987
Fig 19. Acknowledgement on the I2C-bus
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 30 of 50
NXP Semiconductors PCA9685
9. Bus transactions 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
slave address control register data for register D[7:0](1)
S 1 A5 A4 A3 A2 A1 A0 0 A D7 D6 D5 D4 D3 D2 D1 D0 A AP
START condition R/W acknowledge acknowledge acknowledge
from slave from slave from slave
STOP
condition
002aac829
(1) See Table 3 for register definition.
Fig 20. Write to a specific register
slave address control register = MODE1 register MODE1 register MODE2 register
1
S 1 A5 A4 A3 A2 A1 A0 0 A 0 0 0 0 0 0 0 0 A AI bit set A A (cont.)
START condition R/W acknowledge acknowledge acknowledge acknowledge
from slave from slave from slave from slave
LED15_OFF_L register LED15_OFF_H register
(cont.) A AP
acknowledge acknowledge
from slave from slave
STOP 002aad187
condition
Fig 21. Write to all registers using the Auto-Increment feature; AI initially clear
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 31 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
slave address control register = MODE1 register MODE1 register
1
S 1 A5 A4 A3 A2 A1 A0 0 A 0 0 0 0 0 0 0 0 A A (cont.)
START condition R/W acknowledge acknowledge AI bit set acknowledge
from slave from slave from slave
slave address data from MODE1 data from MODE2
(cont.) Sr 1 A5 A4 A3 A2 A1 A0 1 A A A
ReSTART R/W acknowledge acknowledge acknowledge
condition from slave from master from master
data from LED15_OFF_H register 002aad188
AP
not acknowledge STOP
from master condition
Fig 22. Read all registers using the Auto-Increment feature; AI initially clear
slave address control register = ALL_LED_ON_L register ALL_LED_ON_H register
ALL_LED_ON_L register
S 1 A5 A4 A3 A2 A1 A0 0 A 1 1 1 1 1 0 1 0 A A A (cont.)
START condition R/W acknowledge acknowledge acknowledge acknowledge
from slave from slave from slave from slave
ALL_LED_OFF_L register ALL_LED_OFF_H register
(cont.) A AP
acknowledge acknowledge STOP condition 002aad189
from slave from slave
Fig 23. Write to ALL_LED_ON and ALL_LED_OFF registers using the Auto-Increment feature; AI initially set
slave address control register = ALL_LED_OFF_H register
ALL_LED_OFF_H register
S 1 A5 A4 A3 A2 A1 A0 0 A 1 1 1 1 1 1 0 1 A 0 0 0 1 X X X X A P
START condition R/W acknowledge acknowledge acknowledge
from slave from slave from slave
STOP
condition
002aad190
Fig 24. Write to ALL_LED_OFF_H to turn OFF all PWMs
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 32 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
slave address control register data for MODE1 register
sequence (A)(1) S 1 A5 A4 A3 A2 A1 A0 0 A 0 0 0 0 0 0 0 0 A 0 0 1 0 0 1 1 1 A P
START condition R/W MODE1 AI on enable ALL CALL STOP
register selection condition
acknowledge acknowledge acknowledge
from slave control register from slave from slave
slave address new LEDALLCALL I2C-bus address
sequence (B)(1) S 1 A5 A4 A3 A2 A1 A0 0 A 0 0 0 0 0 1 0 1 A 1 0 1 0 1 0 1 X A P
START condition R/W ALLCALLADR acknowledge acknowledge STOP
register selection from slave from slave condition
acknowledge
from slave control register data for control register
ALL_LED_ON_L
LEDALLCALL I2C-bus address
sequence (C) S 1 0 1 0 1 0 1 0 A 1 1 1 1 1 0 1 0 A 0 0 0 0 0 0 0 0 A (cont.)
START condition R/W ALL_LED_ON_L acknowledge(2) acknowledge(2)
register selection from slave from slave
acknowledge(2) from all the
ALL_LED_OFF_H
devices configured for the new
LEDALLCALL I2C-bus address
(cont.) 0 0 0 0 0 0 0 0 A 0 0 0 0 0 0 0 0 A 0 0 0 0 1 0 0 0 A P
ALL_LED_ON_H data for ALL_LED_OFF_L acknowledge(2) acknowledge(2) STOP
control register control register from slave from slave condition
acknowledge(2) 002aad192
from slave
(1) In this example, several PCA9685s are used and the same sequences (A) and (B) above are sent to each of them.
(2) Acknowledge from all the slave devices configured for the new LED All Call I2C-bus address in sequence (B).
Fig 25. LED All Call I2C-bus address programming and LED All Call sequence example
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 33 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
10. Application design-in information
5V 12 V
VDD = 2.5 V, 3.3 V or 5.0 V 12 V
12 V
(1) (1) 10 k(2)
I2C-BUS/SMBus SDA VDD
MASTER SCL LED0
SDA
LED1
SCL
LED2
OE OE LED3
5V
PCA9685
LED4
LED5
LED6
LED7
5V
LED8
LED9
LED10
LED11
EXTCLK 5V 12 V
A0
A1
A2
A3 LED12
A4
LED13
A5
LED14
VSS LED15
002aac827
I2C-bus address = 1010 101x.
All 16 of the LEDn outputs configurable as either open-drain or totem pole. Mixing of configuration is not possible.
Remark: Set INVRT = 0, OUTDRV = 1, OUTNE = 01 (MODE2 register bits)
(1) Resistor value should be chosen by referencing section 7 of UM10204, "I2C-bus specification and user manual".
(2) OE requires pull-up resistor if control signal from the master is open-drain.
Fig 26. Typical application
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 34 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Question 1: What kind of edge rate control is there on the outputs?
The typical edge rates depend on the output configuration, supply voltage, and the
applied load. The outputs can be configured as either open-drain NMOS or totem pole
outputs. If the customer is using the part to directly drive LEDs, they should be using it
in an open-drain NMOS, if they are concerned about the maximum ISS and ground
bounce. The edge rate control was designed primarily to slow down the turn-on of the
output device; it turns off rather quickly (~1.5 ns). In simulation, the typical turn-on
time for the open-drain NMOS was ~14 ns (VDD = 3.6 V; CL = 50 pF; RPU = 500 ).
Question 2: Is ground bounce possible?
Ground bounce is a possibility, especially if all 16 outputs are changed at full current
(25 mA each). There is a fair amount of decoupling capacitance on chip (~50 pF),
which is intended to suppress some of the ground bounce. The customer will need to
determine if additional decoupling capacitance externally placed as close as
physically possible to the device is required.
Question 3: Can I really sink 400 mA through the single ground pin on the package and
will this cause any ground bounce problem due to the PWM of the LEDs?
Yes, you can sink 400 mA through a single ground pin on the package. Although the
package only has one ground pin, there are two ground pads on the die itself
connected to this one pin. Although some ground bounce is likely, it will not disrupt the
operation of the part and would be reduced by the external decoupling capacitance.
Question 4: I can't turn the LEDs on or off, but their registers are set properly. Why?
Check the MODE1 register SLEEP (bit 4) setting. The bit needs to be 0 in order to
enable the clocking. If both clock sources (internal osc and EXTCLK) are turned OFF
(bit 4 = 1), the LEDs cannot be dimmed or blinked.
Question 5: I'm using LEDs with integrated Zener diodes and the IC is getting very hot.
Why?
The IC outputs can be set to either open-drain or push-pull and default to push-pull
outputs. In this application with the Zener diodes, they need to be set to open-drain
since in the push-pull architecture there is a low resistance path to GND through the
Zener and this is causing the IC to overheat.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 35 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
LED supply CONSTANT FB
VIN CURRENT OUT
SWITCH MODE
REGULATOR Iconstant
LIGHT
SENSOR
VDD = 2.5 V, 3.3 V or 5.0 V LED
string
(1) (1) 10 k(2)
Rsense
ASIC/MICRO SDA VDD
SCL LED0
SDA LED1
SCL OE LED2
LED3
OE
PCA9685
LED4
LED5
LED6
LED7
EXTCLK
LED8
LED9
LED10
LED11
A0
A1
A2
A3 LED12
A4
LED13
A5
LED14
VSS LED15
002aac828
I2C-bus address = 1010 101x.
Remark: Set INVRT = 0, OUTDRV = 1, OUTNE = 01 (MODE2 register bits) for this configuration.
(1) Resistor value should be chosen by referencing Section 7 of UM10204, "I2C-bus specification and
user manual".
(2) OE requires pull-up resistor if control signal from the master is open-drain.
Fig 27. LCD backlighting application
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 36 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
11. Limiting values
Table 12. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage -0.5 +6.0 V
VI/O voltage on an input/output pin VSS - 0.5 5.5 V
IO(LEDn) output current on pin LEDn - 25 mA
ISS ground supply current - 400 mA
Ptot total power dissipation
Tstg storage temperature - 400 mW
Tamb ambient temperature
-65 +150 C
operating -40 +85 C
12. Static characteristics
Table 13. Static characteristics
VDD = 2.3 V to 5.5 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supply -
6
VDD supply voltage 2.3 5.5 V
- 2.2
IDD supply current operating mode; no load; 10 mA
fSCL = 1 MHz; VDD = 2.3 V to 5.5 V - 1.70
Istb standby current [1] - 15.5 A
no load; fSCL = 0 Hz; VI = VDD or VSS; -
VPOR power-on reset voltage VDD = 2.3 V to 5.5 V - 2.0 V
28
no load; VI = VDD or VSS 40
-
Input SCL; input/output SDA 6
VIL LOW-level input voltage -0.5 25 +0.3VDD V
0.7VDD -
VIH HIGH-level input voltage 20 - 5.5 V
30 -
IOL LOW-level output current VOL = 0.4 V; VDD = 2.3 V -1 - - mA
VOL = 0.4 V; VDD = 5.0 V - -
VI = VDD or VSS - - mA
VI = VSS 5
IL leakage current +1 A
Ci input capacitance 10 pF
LED driver outputs
IOL LOW-level output current VOL = 0.5 V; VDD = 2.3 V to 4.5 V [2] 12 - mA
IOL(tot) total LOW-level output current VOL = 0.5 V; VDD = 4.5 V [2] -
IOH HIGH-level output current open-drain; VOH = VDD 400 mA
VOH HIGH-level output voltage IOH = -10 mA; VDD = 2.3 V -10
IOH = -10 mA; VDD = 3.0 V 1.6 +10 A
IOZ OFF-state output current IOH = -10 mA; VDD = 4.5 V 2.3
Co output capacitance 3-state; VOH = VDD or VSS 4.0 - V
-10
- - V
- V
+10 A
8 pF
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 37 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Table 13. Static characteristics ...continued
VDD = 2.3 V to 5.5 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Address inputs; OE input; EXTCLK
VIL LOW-level input voltage -0.5 - +0.3VDD V
VIH HIGH-level input voltage 0.7VDD - 5.5 V
ILI input leakage current -1 - +1 A
Ci input capacitance - 3 5 pF
[1] VDD must be lowered to 0.2 V in order to reset part.
[2] Each bit must be limited to a maximum of 25 mA and the total package limited to 400 mA due to internal busing limits.
10 002aad877 60 002aad878
IDD
(mA) VDD = 5.5 V IOL VDD = 4.5 V
(mA) 3.0 V
8
40
6
4 3.3 V 2.3 V
20
2 2.3 V
0 0
-50 0 50 100 -50 0 50 100
Tamb (C) Tamb (C)
Fig 28. IDD typical values with OSC on and Fig 29. IOL typical drive (LEDn outputs) versus
fSCL = 1 MHz versus temperature temperature
5 002aad879
Istb
(A)
4
3 VDD = 5.5 V
2
1
3.3 V
2.3 V
0
-50 0 50 100
Tamb (C)
Fig 30. Standby supply current versus temperature
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 38 of 50
PCA9685_2 Table 14. xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx NXP Semiconductors
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
Product data sheet xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx 13. Dynamic characteristics
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
Dynamic characteristics
Symbol Parameter Conditions Standard-mode Fast-mode I2C-bus Fast-mode Plus Unit
I2C-bus I2C-bus
Min Max Min Max Min Max
fSCL SCL clock frequency [1] 0 100 0 400 0 1000 kHz
fEXTCLK frequency on pin EXTCLK
tBUF bus free time between a STOP DC 50 DC 50 DC 50 MHz
and START condition
4.7 - 1.3 - 0.5 - s
tHD;STA hold time (repeated) START 4.0 - 0.6 - 0.26 - s
condition
tSU;STA set-up time for a repeated 4.7 - 0.6 - 0.26 - s
START condition
tSU;STO set-up time for STOP condition 4.0 - 0.6 - 0.26 - s
tHD;DAT data hold time
tVD;ACK data valid acknowledge time 0 - 0 - 0 - ns
tVD;DAT data valid time
tSU;DAT data set-up time [2] 0.3 3.45 0.1 0.9 0.05 0.45 s
tLOW LOW period of the SCL clock
Rev. 02 -- 16 July 2009 tHIGH HIGH period of the SCL clock [3] 0.3 3.45 0.1 0.9 0.05 0.45 s
tf fall time of both SDA and SCL
signals 250 - 100 - 50 - ns
4.7 - 1.3 - 0.5 - s
4.0 - 0.6 - 0.26 - s PCA9685
[4][5] - 300 20 + 0.1Cb[6] 300 - 120 ns 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
tr rise time of both SDA and SCL - 1000 20 + 0.1Cb[6] 300 - 120 ns
signals
tSP pulse width of spikes that must [7] - 50 - 50 - 50 ns
be suppressed by the input filter
tPLZ LOW to OFF-state propagation OE to LEDn; - 40 - 40 - 40 ns
delay OUTNE[1:0] = 10 or 11
in MODE2 register
tPZL OFF-state to LOW propagation OE to LEDn; - 60 - 60 - 60 ns
delay OUTNE[1:0] = 10 or 11
NXP B.V. 2009. All rights reserved. in MODE2 register
39 of 50 tPHZ HIGH to OFF-state propagation OE to LEDn; - 60 - 60 - 60 ns
delay OUTNE[1:0] = 10 or 11
in MODE2 register
PCA9685_2 Table 14. xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx NXP Semiconductors
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
Product data sheet xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Dynamic characteristics ...continued
Symbol Parameter Conditions Standard-mode Fast-mode I2C-bus Fast-mode Plus Unit
I2C-bus I2C-bus
Min Max Min Max Min Max
tPZH OFF-state to HIGH propagation OE to LEDn; - 40 - 40 - 40 ns
delay OUTNE[1:0] = 10 or 11
in MODE2 register
tPLH LOW to HIGH propagation delay OE to LEDn; - 40 - 40 - 40 ns
OUTNE[1:0] = 01
in MODE2 register
tPHL HIGH to LOW propagation delay OE to LEDn; - 60 - 60 - 60 ns
OUTNE[1:0] = 00
in MODE2 register
Rev. 02 -- 16 July 2009 [1] Minimum SCL clock frequency is limited by the bus time-out feature, which resets the serial bus interface if either SDA or SCL is held LOW for a minimum of 25 ms. Disable bus PCA9685
time-out feature for DC operation.
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
[2] tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
[3] tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
[4] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the VIL of the SCL signal) in order to bridge the undefined region of SCL's falling
edge.
[5] The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (tf) for the SDA output stage is specified at 250 ns. This allows series protection
resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified tf.
[6] Cb = total capacitance of one bus line in pF.
[7] Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
NXP B.V. 2009. All rights reserved.
40 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
SDA
tBUF tr tf tHD;STA tSP
tLOW
SCL
tHD;STA tSU;STA tSU;STO
Sr P
P S tHD;DAT tHIGH tSU;DAT
002aaa986
Fig 31. Definition of timing
protocol START bit 7 bit 6 bit 1 bit 0 acknowledge STOP
condition MSB (A6) (D1) (D0) (A) condition
(A7)
(S) (P)
tSU;STA tLOW tHIGH 1 / fSCL
tBUF
SCL tr tf
SDA
tHD;STA tSU;DAT tHD;DAT tVD;DAT tVD;ACK tSU;STO
002aab285
Rise and fall times refer to VIL and VIH.
Fig 32. I2C-bus timing diagram
VI VM VM
OE input tPLZ tPZL
VSS tPHZ VX VM
VY tPZH
LEDn output VDD
LOW-to-OFF outputs outputs VM
OFF-to-LOW enabled disabled
outputs
VOL enabled
002aad810
LEDn output VOH
HIGH-to-OFF
OFF-to-HIGH
VSS
Fig 33. tPLZ, tPZL and tPHZ, tPZH times
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 41 of 50
NXP Semiconductors PCA9685
14. Test information 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
VDD RL VDD
500 open
VSS
PULSE VI VO
GENERATOR
DUT
RT CL
50 pF
002aab880
RL = Load resistor for LEDn.
CL = Load capacitance includes jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generators.
Fig 34. Test circuitry for switching times
VDD S1 VDD 2
open
RL
500 VSS
PULSE VI VO
GENERATOR
DUT
RT CL RL
50 pF 500
002aad811
RL = Load resistor for LEDn.
CL = Load capacitance includes jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generators.
Test data are given in Table 15.
Fig 35. Test circuitry for switching times for enable/disable
Table 15. Test data for enable/disable switching times
Test Load Switch
tPD CL RL open
tPLZ, tPZL 50 pF 500 VDD 2
tPHZ, tPZH 50 pF 500 VSS
50 pF 500
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 42 of 50
NXP Semiconductors PCA9685
15. Package outline 16-channel, 12-bit PWM Fm+ I2C-bus LED controller
TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm SOT361-1
D E A X
y c vM A
Z HE
28
15 Q
pin 1 index
14 A2 (A 3) A
1 wM A1
e
bp
Lp
L
detail X
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1)
max.
mm 1.1 0.15 0.95 0.25 0.30 0.2 9.8 4.5 0.65 6.6 1 0.75 0.4 0.2 0.13 0.1 0.8 8o
0.05 0.80 0.19 0.1 9.6 4.3 6.2 0.50 0.3 0.5 0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE REFERENCES EUROPEAN ISSUE DATE
PROJECTION
VERSION IEC JEDEC JEITA 99-12-27
03-02-19
SOT361-1 MO-153
Fig 36. Package outline SOT361-1 (TSSOP28)
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 43 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
HVQFN28: plastic thermal enhanced very thin quad flat package; no leads; SOT788-1
28 terminals; body 6 x 6 x 0.85 mm
c
D BA
terminal 1
index area
E A A1
detail X
e1 C
e b vMC A B y1 C y
8
L 14 wMC
7
15
e
Eh e2
1 21
terminal 1 28
index area 22
Dh X
0 2.5 5 mm
DIMENSIONS (mm are the original dimensions) scale
A(1) c D(1) Dh E(1) Eh e e1 e2 L v w y y1
UNIT max. A1 b
mm 1 0.05 0.35 0.2 6.1 4.25 6.1 4.25 0.65 3.9 3.9 0.75 0.1 0.05 0.05 0.1
0.00 0.25 5.9 3.95 5.9 3.95 0.50
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
OUTLINE REFERENCES EUROPEAN ISSUE DATE
PROJECTION 02-10-22
VERSION IEC JEDEC JEITA
SOT788-1 --- MO-220 ---
Fig 37. Package outline SOT788-1 (HVQFN28)
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 44 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
16. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.
17. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 "Surface mount reflow
soldering description".
17.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
17.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
Through-hole components
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
17.3 Wave soldering
Key characteristics in wave soldering are:
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 45 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
Solder bath specifications, including temperature and impurities
17.4 Reflow soldering
Key characteristics in reflow soldering are:
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 38) than a SnPb process, thus
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 16 and 17
Table 16. SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350
< 2.5 235 220
2.5 220 220
Table 17. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350 to 2000 > 2000
260
< 1.6 260 260 245
245
1.6 to 2.5 260 250
> 2.5 250 245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 38.
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 46 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
temperature maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 38. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
"Surface mount reflow soldering description".
18. Abbreviations
Table 18. Abbreviations
Acronym Description
CDM Charged-Device Model
DUT Device Under Test
EMI ElectroMagnetic Interference
ESD ElectroStatic Discharge
HBM Human Body Model
I2C-bus Inter-Integrated Circuit bus
LCD Liquid Crystal Display
LED Light Emitting Diode
LSB Least Significant Bit
MM Machine Model
MSB Most Significant Bit
NMOS Negative-channel Metal-Oxide Semiconductor
PCB Printed-Circuit Board
PMOS Positive-channel Metal-Oxide Semiconductor
POR Power-On Reset
PWM Pulse Width Modulation; Pulse Width Modulator
RGB Red/Green/Blue
RGBA Red/Green/Blue/Amber
SMBus System Management Bus
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 47 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
19. Revision history
Table 19. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PCA9685_2 20090716 Product data sheet - PCA9685_1
Modifications: Table 1 "Ordering information":
added type number PCA9685PW/Q900
added Table note [1]
Figure 2 "Pin configuration for TSSOP28": added type number PCA9685PW/Q900
PCA9685_1 20080724 Product data sheet - -
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 48 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
20. Legal information
20.1 Data sheet status
Document status[1][2] Product status[3] Definition
This document contains data from the objective specification for product development.
Objective [short] data sheet Development This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term `short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
20.2 Definitions damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
Draft -- The document is a draft version only. The content is still under therefore such inclusion and/or use is at the customer's own risk.
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any Applications -- Applications that are described herein for any of these
representations or warranties as to the accuracy or completeness of products are for illustrative purposes only. NXP Semiconductors makes no
information included herein and shall have no liability for the consequences of representation or warranty that such applications will be suitable for the
use of such information. specified use without further testing or modification.
Short data sheet -- A short data sheet is an extract from a full data sheet Limiting values -- Stress above one or more limiting values (as defined in
with the same product type number(s) and title. A short data sheet is intended the Absolute Maximum Ratings System of IEC 60134) may cause permanent
for quick reference only and should not be relied upon to contain detailed and damage to the device. Limiting values are stress ratings only and operation of
full information. For detailed and full information see the relevant full data the device at these or any other conditions above those given in the
sheet, which is available on request via the local NXP Semiconductors sales Characteristics sections of this document is not implied. Exposure to limiting
office. In case of any inconsistency or conflict with the short data sheet, the values for extended periods may affect device reliability.
full data sheet shall prevail.
Terms and conditions of sale -- NXP Semiconductors products are sold
20.3 Disclaimers subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
General -- Information in this document is believed to be accurate and intellectual property rights infringement and limitation of liability, unless
reliable. However, NXP Semiconductors does not give any representations or explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
warranties, expressed or implied, as to the accuracy or completeness of such any inconsistency or conflict between information in this document and such
information and shall have no liability for the consequences of use of such terms and conditions, the latter will prevail.
information.
No offer to sell or license -- Nothing in this document may be interpreted
Right to make changes -- NXP Semiconductors reserves the right to make or construed as an offer to sell products that is open for acceptance or the
changes to information published in this document, including without grant, conveyance or implication of any license under any copyrights, patents
limitation specifications and product descriptions, at any time and without or other industrial or intellectual property rights.
notice. This document supersedes and replaces all information supplied prior
to the publication hereof. Export control -- This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
Suitability for use -- NXP Semiconductors products are not designed, authorization from national authorities.
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or 20.4 Trademarks
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus -- logo is a trademark of NXP B.V.
21. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PCA9685_2 Rev. 02 -- 16 July 2009 NXP B.V. 2009. All rights reserved.
Product data sheet 49 of 50
NXP Semiconductors PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
22. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1 17.1 Introduction to soldering. . . . . . . . . . . . . . . . . 45
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 17.2 Wave and reflow soldering . . . . . . . . . . . . . . . 45
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 17.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 45
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 17.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 46
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 47
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . 48
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 20 Legal information . . . . . . . . . . . . . . . . . . . . . . 49
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 20.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 49
7 Functional description . . . . . . . . . . . . . . . . . . . 6 20.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.1 Device addresses . . . . . . . . . . . . . . . . . . . . . . . 6 20.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.1.1 Regular I2C-bus slave address . . . . . . . . . . . . . 6
7.1.2 LED All Call I2C-bus address . . . . . . . . . . . . . . 7 20.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 49
7.1.3 LED Sub Call I2C-bus addresses . . . . . . . . . . . 7
7.1.4 Software Reset I2C-bus address . . . . . . . . . . . 8 21 Contact information . . . . . . . . . . . . . . . . . . . . 49
7.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.3 Register definitions . . . . . . . . . . . . . . . . . . . . . . 9 22 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.3.1 Mode register 1, MODE1 . . . . . . . . . . . . . . . . 13
7.3.1.1 Restart mode . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.3.2 Mode register 2, MODE2 . . . . . . . . . . . . . . . . 15
7.3.3 LED output and PWM control . . . . . . . . . . . . . 15
7.3.4 ALL_LED_ON and ALL_LED_OFF control. . . 24
7.3.5 PWM frequency PRE_SCALE . . . . . . . . . . . . 24
7.3.6 SUBADR1 to SUBADR3, I2C-bus
subaddress 1 to 3 . . . . . . . . . . . . . . . . . . . . . . 25
7.3.7 ALLCALLADR, LED All Call I2C-bus
address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.4 Active LOW output enable input . . . . . . . . . . . 26
7.5 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 26
7.6 Software reset. . . . . . . . . . . . . . . . . . . . . . . . . 27
7.7 Using the PCA9685 with and without
external drivers . . . . . . . . . . . . . . . . . . . . . . . . 28
8 Characteristics of the I2C-bus. . . . . . . . . . . . . 29
8.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.1.1 START and STOP conditions . . . . . . . . . . . . . 29
8.2 System configuration . . . . . . . . . . . . . . . . . . . 29
8.3 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 30
9 Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 31
10 Application design-in information . . . . . . . . . 34
11 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 37
12 Static characteristics. . . . . . . . . . . . . . . . . . . . 37
13 Dynamic characteristics . . . . . . . . . . . . . . . . . 39
14 Test information . . . . . . . . . . . . . . . . . . . . . . . . 42
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 43
16 Handling information. . . . . . . . . . . . . . . . . . . . 45
17 Soldering of SMD packages . . . . . . . . . . . . . . 45
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section `Legal information'.
NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 July 2009
Document identifier: PCA9685_2
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