19-2532; Rev 6; 2/11
EVAALVUAAILTAIOBNLEKIT 300mA LDO Linear Regulators with
Internal Microprocessor Reset Circuit
General Description Features MAX6469–MAX6484
The MAX6469–MAX6484 are low-dropout linear regula- o 3 3 UCSP, 6-Pin SOT23, and 8-Pin TDFN
tors with a fully integrated microprocessor reset circuit. Packages
Each is available with preset output voltages from +1.5V o Preset +1.5V to +3.3V Output (100mV Increments)
to +3.3V in 100mV increments and delivers up to 300mA o SET Pin for Adjustable Output Voltage
of load current. These devices consume only 82µA of o 75µVRMS LDO Output Voltage Noise
supply current. The low supply current, low dropout volt- (MAX6477–MAX6484)
age, and integrated reset functionality make these o ±2.0% Accuracy Over Temperature
devices ideal for battery-powered portable equipment.
The MAX6469–MAX6484 include a reset output that indi- o Guaranteed 300mA Output Current
cates when the regulator output drops below standard o Low Dropout Voltage
microprocessor supply tolerances (-7.5% or -12.5% of 55mV at 150mA
nominal output voltage). This eliminates the need for an 114mV at 300mA
external microprocessor supervisor, while ensuring that o 82µA Supply Current, 0.1µA Shutdown Current
supply voltages and clock oscillators have stabilized o Input Reverse Current, Thermal and Short-Circuit
before processor activity is enabled. Push-pull and open- Protection
drain active-low reset outputs are available, with reset o Microprocessor Reset with Four Timeout Options
timeout periods of 2.5ms, 20ms, 150ms, or 1200ms (min). o Push-Pull or Open-Drain RESET
The MAX6469/MAX6470/MAX6473–MAX6478/MAX6481– o Manual Reset Input
MAX6484 also have a shutdown feature that reduces the o Remote Feedback Sense
supply current to 0.1µA (typ). The MAX6471–MAX6474/ Ordering Information
MAX6479–MAX6482 offer a manual reset input to assert a
microprocessor reset while the regulator output is within
specification. The MAX6475/MAX6476/MAX6483/ PART* TEMP RANGE PIN-
MAX6484 feature a remote feedback sense pin for use PACKAGE
with an external NPN transistor for higher-current applica- MAX6469UT_ _ _D_-T -40°C to +85°C 6 SOT23-6
tions. The MAX6469–MAX6476 are available in 6-pin MAX6469TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP***
SOT23 and 8-pin TDFN packages. The MAX6477– MAX6470UT_ _ _D_-T -40°C to +85°C 6 SOT23-6
MAX6484 are available in a 3 × 3 chip-scale package MAX6470TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP***
(UCSP™). All devices are specified for operation from Ordering Information continued at end of data sheet.
-40°C to +85°C.
*Devices are also available in a lead(Pb)-free/RoHS-compliant
Applications packages. Specify lead(Pb)-free by substituting a +T instead of
Handheld Instruments (PDAs, Palmtops) a -T when ordering.
**Future product—contact factory for availability.
PCMCIA Cards/USB Devices ***EP = Exposed pad.
Cellular/Cordless Telephones Note: The first “_ _” are placeholders for the output voltage lev-
CD/DVD Drives els of the devices. Desired output voltages are set by the suffix
found in the Output Voltage Suffix Guide (Table 1). The third “_”
Notebook Computers is a placeholder for the reset threshold accuracy. Desired reset
Digital Cameras threshold accuracy is set by the suffix found in the Reset
Threshold Accuracy Guide (Table 2). The “_” following the D is
Bluetooth Modules/Wireless LAN a placeholder for the reset timeout delay time. Desired reset
timeout delay time is set by the suffix found in the Reset
Timeout Delay Guide (Table 3). For example, the
MAX6481BL30BD4-T has a 3.0V output voltage, 12.5% reset
UCSP is a trademark of Maxim Integrated Products, Inc. threshold tolerance, and a 1200ms (min) reset timeout delay.
Sample stock is generally available on standard versions only
Pin Configurations appear at end of data sheet. (Table 4). Standard versions require a minimum order incre-
ment of 2.5k units. Nonstandard versions must be ordered in
Typical Operating Circuits appear at end of data sheet. 10k-unit increments. Contact factory for availability.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.) 6-Pin SOT23 (derate 9.1mW/°C above +70°C).............727mW
IN, SHDN, OUT, FB ..................................................-0.3V to +7V 8-Pin TDFN (derate 24.4mW/°C above +70°C) ..........1951mW
MR, SET .......................................................-0.3V to (VIN + 0.3V) Operating Temperature Range ..........................-40°C to +85°C
RESET (push-pull) ...................................-0.3V to (VOUT + 0.3V) Junction Temperature ......................................................+150°C
RESET (open drain)..................................................-0.3V to +7V Storage Temperature Range .............................-65°C to +150°C
OUT Short Circuit .......................................................Continuous Lead Temperature (soldering, 10s) .................................+300°C
Input/Output Current (all pins except IN and OUT) ............20mA Soldering Temperature (reflow)
Continuous Power Dissipation (TA = +70°C) Lead(Pb)-free packages...............................................+260°C
3 x 3 UCSP (derate 10.5mW/°C above +70°C) ............840mW Packages containing lead(Pb)......................................+240°C
Note 1: The MAX6477–MAX6484 are constructed using a unique set of packaging techniques that impose a limit on the thermal pro-
file the devices can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder
profiles recommended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and
Convection reflow. Pre-heating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF, TA = -40°C to +85°C. Typical specifications are at TA = +25°C,
unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Voltage Range VIN 2.5 5.5 V
Input Undervoltage Lockout VUVLO VIN falling 2.25 2.47 V
Supply Current (Ground Current) IQ IOUT = 0A 82 136 µA
IOUT = 300mA 96
Shutdown Supply Current ISHDN TA = +25°C 0.1 1 µA
REGULATOR CIRCUIT
Output Current 300 mA
Output Voltage Accuracy (Fixed 1mA ≤ IOUT ≤ 150mA, TA = +25°C -1.3 +1.3
Output Voltage Operation, 1mA ≤ IOUT ≤ 150mA, TA = -40°C to +85°C -2.3 +2.3 %
Table 1) MAX6469–MAX6476 1mA ≤ IOUT ≤ 300mA, TA = -40°C to +85°C -2.7 +2.7
2mA ≤ IOUT ≤ 100mA, TA = +25°C -1.1 +1.1
Output Voltage Accuracy (Fixed 2mA ≤ IOUT ≤ 100mA, TA = -40°C to +85°C -2.0 +2.0
Output Voltage Operation, 2mA ≤ IOUT ≤ 300mA, TA = -40°C to +85°C %
Table 1) MAX6477–MAX6484 -2.5 +2.5
(Note 3)
Adjustable Output Voltage Range VSET 5.0 V
SET Reference Voltage VSET 1.200 1.229 1.258 V
SET Dual ModeTM Threshold 185 mV
SET Input Leakage Current ISET VSET = 0V, +1.2V (Note 3) ±20 ±100 nA
Dual Mode is a trademark of Maxim Integrated Products, Inc.
2 _______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
ELECTRICAL CHARACTERISTICS (continued) MAX6469–MAX6484
(VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF, TA = -40°C to +85°C. Typical specifications are at TA = +25°C,
unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VOUT = +3.3V IOUT = 50mA 23 32
(fixed output operation) IOUT = 150mA 55 90
IOUT = 300mA 114 180
VOUT = +3.0V IOUT = 50mA 25 40
(fixed output operation) IOUT = 150mA 61 100
Dropout Voltage ∆VDO IOUT = 300mA 114 190 mV
(Notes 3, 4) VOUT = +2.8V IOUT = 50mA 26 50
(fixed output operation) IOUT = 150mA 65 110
IOUT = 300mA 137 210
VOUT = +2.5V IOUT = 50mA 30 60
(fixed output operation) IOUT = 150mA 75 150
IOUT = 300mA 158 250
Output Current Limit VIN ≥ 2.5V (Note 3) 450 mA
Input Reverse Leakage Current VIN = 4V, VOUT = 5.5V, SHDN deasserted 0.01 1.5 µA
(OUT to IN Leakage Current)
Rising edge of VIN or SHDN to VOUT
Startup Time Response within specification, RL = 68Ω, SET = GND, 20 µs
IOUT = 10mA
SHDN Input Low Voltage VIL 0.3 × VIN V
SHDN Input High Voltage VIH 0.7 × VIN V
SHDN Input Current VSHDN = VIN or VGND -1 0.1 +1 µA
Thermal-Shutdown Temperature TSHDN 180 °C
Thermal-Shutdown Hysteresis ∆TSHDN 20 °C
Line Regulation VOUT = 1.5V, 2.5V ≤ VIN ≤ 5.5V, 0.09 %/V
IOUT = 10mA
Load Regulation VOUT = 1.5V, VIN = 2.5V, 1mA ≤ IOUT ≤ 0.2 %
150mA
10Hz to 100kHz, MAX6469–MAX6476 150
Output Voltage Noise CIN = 0.1µF, µVRMS
IOUT = 100mA, MAX6477–MAX6484 75
VOUT = 1.5V
RESET CIRCUIT
VOUT Reset Threshold MAX64_ _ _ _ _ _ A 90 92.5 95
(VFB for MAX6475/MAX6476/ VTHOUT %VOUT
MAX6483/MAX6484) (Note 5) MAX64_ _ _ _ _ _ B 85 87.5 90
VOUT to Reset Delay
(VFB for MAX6475/MAX6476/ 35 µs
MAX6483/MAX6484)
D1 2.5 3.75 5.0
Reset Timeout Period tRP D2 20 30 40 ms
(Note 6) D3 150 225 300
D4 1200 1800 2400
_______________________________________________________________________________________ 3
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 ELECTRICAL CHARACTERISTICS (continued)
(VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF, TA = -40°C to +85°C. Typical specifications are at TA = +25°C,
unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MR Input Low Voltage VIL 0.3 × V
VOUT
MR Input High Voltage VIH (Note 3) 0.7 × V
VOUT
MR Minimum Input Pulse 1 µs
MR Glitch Rejection 120 ns
MR to Reset Delay 200 ns
MR Pullup Resistance MR to OUT 25 40 70 kΩ
RESET Output Voltage VOL VOUT ≥ 1.0V, ISINK = 50µA, RESET asserted 0.3 V
(Open Drain) VOUT ≥ 1.5V, ISINK = 3.2mA, RESET asserted 0.4
Open-Drain Reset Output ILKG (Note 3) 1 µA
Leakage Current
VOL VOUT ≥ 1.0V, ISINK = 50µA, RESET asserted 0.3
RESET Output Voltage Push-Pull VOUT ≥ 1.5V, ISINK = 3.2mA, RESET asserted 0.4 V
VOH VOUT ≥ 2.0V, ISOURCE = 500µA, RESET 0.8 ×
deasserted VOUT
Note 2: All devices are 100% production tested at +25°C and are guaranteed by correlation for TA = TMIN to TMAX.
Note 3: Guaranteed by design.
Note 4: Dropout voltage is defined as (VIN - VOUT) when VOUT is 2% below the value of VOUT for VIN = VOUT(NOM) + 1V.
Note 5: MAX6473/MAX6474/MAX6481/MAX6482 are guaranteed by design for VOUT < 2.5V.
Note 6: Select the reset timeout period using the Reset Timeout Delay Guide (Table 3). Insert the appropriate suffix in the part number
when ordering.
Typical Operating Characteristics
(VIN = 5V, VOUT = 3.3V, COUT = 3.3µF, TA = +25°C, unless otherwise noted.)
GROUND CURRENT vs. INPUT VOLTAGE GROUND CURRENT vs. INPUT VOLTAGE MAXIMUM TRANSIENT DURATION
(NO LOAD) (300mA LOAD) vs. RESET THRESHOLD OVERDRIVE
120 MAX6469 toc01 120 MAX6469 toc02 150 MAX6469 toc03
+85°C
100 +25°C 100 125
RESET ASSERTS ABOVE
GROUND CURRENT (µA) -40°C GROUND CURRENT (µA) +85°C PULSE DURATION (µs) THIS LINE
80 80 100
60 60 +25°C 75
40 40 -40°C 50
20 20 25
0 0 0
0 1 2 3 4 5 6 0 1 2 3 4 5 6 1 10 100
INPUT VOLTAGE (V) INPUT VOLTAGE (V) RESET THRESHOLD OVERDRIVE (mV)
4 _______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
Typical Operating Characteristics (continued) MAX6469–MAX6484
(VIN = 5V, VOUT = 3.3V, COUT = 3.3µF, TA = +25°C, unless otherwise noted.)
REGION OF STABLE COUT ESR
DROPOUT VOLTAGE vs. LOAD CURRENT PSRR vs. FREQUENCY vs. LOAD CURRENT
125 MAX6469 toc04 0 MAX6469 toc05 5 MAX6469 toc06
VOUT = 3.3V VOUT = 3.3V
COUT = 3.3µF COUT = 3.3µF
100 -10 ILOAD = 30mA 4
DROPOUT VOLTAGE (mV) -20 COUT ESR (Ω)
75 PSRR (dB) 3
-30 COUT = 4.7µF
50 2
-40 COUT = 3.3µF
25 -50 1
STABLE REGION
0 -60 0
0 50 100 150 200 250 300 0.01 0.1 1 10 100 1000 0 50 100 150 200 250 300
LOAD CURRENT (mA) FREQUENCY (kHz) LOAD CURRENT (mA)
OUTPUT NOISE OUTPUT NOISE vs. FREQUENCY SHUTDOWN RESPONSE
MAX6469 toc07 100 MAX6469 toc09
VIN = 4.5V VIN = 2.5V MAX6469 toc08
VOUT = 3.3V VOUT = 1.5V
ILOAD = 100mA 80 IOUT = 100mA
VSHDN
VRMS (µV) 60 5V/div
100µV/div
40
VOUT
20 2V/div
ILOAD = 50mA
0
500µs/div 10 100 1k 10k 100k 20ms/div
FREQUENCY (Hz)
LOAD-TRANSIENT RESPONSE
STARTUP RESPONSE LOAD-TRANSIENT RESPONSE NEAR DROPOUT
MAX6469 toc10 MAX6469 toc11 MAX6469 toc12
VIN = 5V VIN = 5V
VIN VOUT = 3.3V VOUT = 3.3V
2V/div ILOAD = 10mA TO 300mA ILOAD = 100mA
VOUT VOUT VOUT
20mV/div 5mV/div
2V/div
10µs/div 100µs/div 10µs/div
_______________________________________________________________________________________ 5
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 Typical Operating Characteristics (continued)
(VIN = 5V, VOUT = 3.3V, COUT = 3.3µF, TA = +25°C, unless otherwise noted.)
LINE-TRANSIENT RESPONSE RESET DELAY RESPONSE RESET RESPONSE TO MR
MAX6469 toc13 MAX6469 toc14 MAX6469 toc15
5V VIN
4.5V 500mV/div
VIN MR
1V TO 4V
2V/div 2V/div
VOUT
20mV/div
AC-COUPLED
RESET RESET
2V/div 2V/div
VOUT = 3.3V
ILOAD = 10mA
100µs/div 200ms/div 200ns/div
NORMALIZED OUTPUT VOLTAGE
RESET RESPONSE TO VIN RISING vs. TEMPERATURE
MAX6469 toc16 1.012
NORMALIZED TO +25°C toc17
VOLTAGE MAX6469
RESET 1.006
2V/div
OUTPUT ILOAD = 10mA
1.000
VOUT NORMALIZED
2V/div ILOAD = 150mA ILOAD = 300mA
0.994
VIN
5V/div
0.988
200ms/div -40 -15 10 35 60 85
TEMPERATURE (°C)
6 _______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469/MAX6470/MAX6477/MAX6478 Pin Description MAX6469–MAX6484
PIN BUMP
MAX6469/MAX6470 MAX6477/MAX6478 NAME FUNCTION
SOT23 TDFN-EP UCSP
1 1, 2 A1 IN Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
3 4 A3 SHDN Active-Low Shutdown Input. Connect SHDN to VIN for normal operation.
Active-Low Reset Output. RESET remains low while VOUT is below the
4 5 C3 RESET reset threshold. RESET remains low for the duration of the reset timeout
period after the reset conditions are terminated. RESET is available in
open-drain and push-pull configurations.
Feedback Input for Externally Setting the Output Voltage. Connect SET
5 6 C2 SET to GND to select the preset output voltage. Connect SET to an external
resistor-divider network for adjustable output operation.
6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR
capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
— — — EP Connect EP to the ground plane to provide a low thermal-resistance
path from the IC junction to the PCB. Do not use as the electrical
connection to GND.
MAX6471/MAX6472/MAX6479/MAX6480 Pin Description
PIN BUMP
MAX6471/MAX6472 MAX6479/MAX6480 NAME FUNCTION
SOT23 TDFN-EP UCSP
1 1, 2 A1 IN Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
Active-Low Manual Reset Input. The reset output is asserted while MR
is pulled low and remains asserted for the duration of the reset timeout
3 4 A3 MR period after MR transitions from low to high. Leave MR unconnected or
connect to VOUT if not used. MR has an internal pullup resistor of 40kΩ
(typ) to VOUT.
Active-Low Reset Output. RESET remains low while VOUT is below the
reset threshold or while MR is held low. RESET remains low for the
4 5 C3 RESET duration of the reset timeout period after the reset conditions are
terminated. RESET is available in open-drain and push-pull
configurations.
Feedback Input for Externally Setting the Output Voltage. Connect SET
5 6 C2 SET to GND to select the preset output voltage. Connect SET to an external
resistor-divider network for adjustable output operation.
6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR
capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
— — — EP Connect EP to the ground plane to provide a low thermal-resistance
path from the IC junction to the PCB. Do not use as the electrical
connection to GND.
_______________________________________________________________________________________ 7
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 MAX6473/MAX6474/MAX6481/MAX6482 Pin Description
PIN BUMP
MAX6473/MAX6474 MAX6481/MAX6482 NAME FUNCTION
SOT23 TDFN-EP UCSP
1 1, 2 A1 IN Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
3 4 A3 SHDN Active-Low Shutdown Input. Connect SHDN to VIN for normal operation.
Active-Low Reset Output. RESET remains low while VOUT is below the
reset threshold or while MR is held low. RESET remains low for the
4 5 C3 RESET duration of the reset timeout period after the reset conditions are
terminated. RESET is available in open-drain and push-pull
configurations.
Active-Low Manual Reset Input. The reset output is asserted while MR
is pulled low and remains asserted for the duration of the reset timeout
5 6 C2 MR period after MR transitions from low to high. Leave MR unconnected or
connect to VOUT if not used. MR has an internal pullup resistor of 40kΩ
(typ) to VOUT.
6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF (min)
low-ESR capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
— — — EP Connect EP to the ground plane to provide a low thermal-resistance
path from the IC junction to the PCB. Do not use as the electrical
connection to GND.
MAX6475/MAX6476/MAX6483/MAX6484 Pin Description
PIN BUMP
MAX6475/MAX6476 MAX6483/MAX6484 NAME FUNCTION
SOT23 TDFN-EP UCSP
1 1, 2 A1 IN Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
2 3 A2 GND Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
3 4 A3 SHDN Active-Low Shutdown Input. Connect SHDN to VIN for normal operation.
Active-Low Reset Output. RESET remains low while FB is below the
4 5 C3 RESET reset threshold. RESET remains low for the duration of the reset timeout
period after the reset conditions are terminated. RESET is available in
open-drain and push-pull configurations.
Feedback Input for Linear Regulator Controller or Remote Sense
5 6 C2 FB Applications. Connect FB to the external load (VCC) to obtain the fixed
output voltage.
6 7, 8 C1 OUT Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR
capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
— — — EP Connect EP to the ground plane to provide a low thermal-resistance path
from the IC junction to the PCB. Do not use as the electrical connection
to GND.
8 _______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
Detailed Description 2.5V TO 5.5V MAX6469–MAX6484
The MAX6469–MAX6484 are ultra-low, quiescent cur- IN
rent, low-dropout linear regulators with an integrated OUT
microprocessor reset circuit. These devices guarantee
300mA (min) drive capabilities and are available with
preset output voltages in 100mV increments between MAX6469–MAX6472 R1
+1.5V and +3.3V. The internal reset circuit monitors the MAX6477–MAX6480
regulator output voltage and asserts the reset output (MR) SET COUT
when the regulator output is below the microprocessor MANUAL GND
supply tolerance. RESET
R2
Regulator
The regulator core operates with +2.5V to +5.5V input ( ) ARE FOR MAX6471/MAX6472/MAX6479/MAX6480 ONLY
voltage range. The output voltage is offered in 100mV
increments between +1.5V and +3.3V (contact factory Figure 1. Adjustable Output Voltage Configuration
for other output voltage options). The MAX6469– the reset threshold. RESET asserts when MR is pulled
MAX6472/MAX6477–MAX6480 offer an adjustable out- low (MAX6471–MAX6474/MAX6479–MAX6482). RESET
put voltage implemented with an external resistor- asserts when SHDN is pulled low (MAX6469/
divider network between OUT, SET, and GND (Figure MAX6470/MAX6473–MAX6478/MAX6481–MAX6484).
1). SET must be connected to either GND for fixed
VOUT or to an external divider for adjustable VOUT. The Shutdown
MAX6469–MAX6472/MAX6477–MAX6480 automatically (MAX6469/MAX6470/MAX6473–MAX6478/MAX6481–
determine the feedback path depending on the con- MAX6484 only)
nection of SET. The Typical Operating Circuit shows a SHDN allows the regulator to shut down, thereby reduc-
typical connection for the MAX6469. OUT is an internal- ing the total IIN consumption of the device. SHDN pro-
ly regulated low-dropout (LDO) linear regulator that vides a digitally controlled active-low shutdown. In
powers a microprocessor. shutdown mode, the pass transistor, control circuit, and
Reset Circuit reference turn off to reduce the supply current to below
The reset supervisor circuit is fully integrated in the 0.1µA. Connect SHDN to IN for normal operation.
MAX6469–MAX6484 and uses the same reference volt- Manual Reset Input
age as the regulator. Two supply tolerance reset (MAX6471–MAX6474/MAX6479–MAX6482 only)
thresholds, -7.5% and -12.5%, are provided for each Many µP-based products require manual reset capabil-
type of device. ity, allowing the operator, a test technician, or external
-7.5% Reset: Reset does not assert until the regulator logic circuitry to initiate a reset. A logic low on MR
output voltage is at least -5% out of tolerance and asserts reset while the regulator output voltage is still
always asserts before the regulator output voltage is within tolerance.
-10% out of tolerance. Reset remains asserted while MR is low and for the
-12.5% Reset: Reset does not assert until the regulator reset timeout period (tRP) after MR returns high. The
output voltage is at least -10% out of tolerance and MR input has an internal pullup of 40kΩ (typ) to OUT.
always asserts before the regulator output voltage is MR can be driven with TTL/CMOS logic levels or with
-15% out of tolerance. open-drain/collector outputs. Connect a normally open
RESET Output switch from MR to GND to create a manual reset func-
A µP’s reset input starts the µP in a known state. The tion; external debounce circuitry is not required. If MR
MAX6469–MAX6484 µP supervisory circuits assert is driven from long cables or the device is used in a
RESET during power-up, power-down, and brownout noisy environment, connect a 0.1µF capacitor from MR
conditions. RESET asserts when the input voltage is to GND to provide additional noise immunity.
below the undervoltage lockout threshold. RESET Feedback Input
asserts when VOUT is below the reset threshold and (MAX6475/MAX6476/MAX6483/MAX6484 only)
remains asserted for at least the minimum selected reset The feedback input (FB) connects to an internal resistor-
timeout period (tRP, Table 3) after VIN rises above the divider network (Functional Diagram). FB is not internally
undervoltage lockout threshold and VOUT rises above connected to VOUT, and as a result can be used to
_______________________________________________________________________________________ 9
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 remotely sense the output voltage of the device. Using OUT-to-GND current through the LDO is 40µA (typ). The
FB with an external npn transistor, the current drive capa- regulator output can be held up with an external super
bility can be increased according to the following equa- capacitor or backup battery at OUT until the IN battery is
tion (Figure 2): replaced. The RESET output is asserted while the IN bat-
IOUT(TOTAL) = IOUT (β+1) tery is removed to place the system in a low-power
mode. Volatile memory content is maintained until the
The external npn pass transistor must meet specifica- super capacitor or battery voltage drops below RAM
tions for current gain, power dissipation, and collector standby specifications. RESET deasserts when the IN
current. The beta influences the maximum output cur- battery has been replaced and OUT exceeds the
rent the circuit can deliver. The largest guaranteed out- desired reset threshold. For nonrechargeable backup
put current is given by ILOAD (max) = 300mA × beta battery applications, place a reverse diode between
(min). The transistor’s rated power dissipation must OUT and the backup battery (to prevent battery charg-
exceed the actual power dissipated in the transistor. ing). The external diode does not affect the regulator’s
The power dissipated (PD) equals the maximum load dropout voltage because it is not between the LDO out-
current (ILOAD (max)) times the maximum input-to-out- put and the processor/memory VCC supply. The diode
put voltage differential: PD = ILOAD (max) × (VIN (max) - can be replaced with a current-limiting resistor for
VOUT). The rated transistor collector current must rechargeable backup battery applications.
exceed the maximum load current. Current Limit
Reverse Leakage Protection The MAX6469–MAX6484 include an internal current-
Reverse OUT to IN Current limit circuit that monitors and controls the pass transis-
An internal circuit monitors the MAX6469–MAX6484 tor’s gate voltage, limiting the output current to 450mA
input and output voltages. When the output voltage is (min). The output can be shorted to ground indefinitely
greater than the input voltage, the internal IN-to-OUT without damaging the part.
pass transistor and parasitic diode turn off. An external Thermal Shutdown
voltage applied to OUT does not reverse charge a bat- When the junction temperature (TJ) exceeds +180°C
tery or power source applied to IN (the leakage path (typ), the thermal sensor signals the shutdown logic,
from OUT to IN is 0.01µA typ). When the output voltage turning off the pass transistor and allowing the IC to
exceeds the input voltage, OUT powers the device and
shutdown must be logic high (greater than 0.7 VOUT).
RESET asserts until IN exceeds OUT and OUT is above
REMOVABLE
the specified VTHOUT threshold (based on the selected
LITHIUM ION OR
or adjusted regulator OUT nominal voltage). 3-CELL
ALKALINE
Reverse OUT to Ground Current IN OUT
The MAX6469–MAX6484 maintain a low OUT-to-GND MAX6469– 3.3µF
reverse-current flow when the IN power source is MAX6484 3.0V
removed. When IN floats (input battery removed) and LITHIUM µP MEMORY
SHDN is pulled up to VOUT (by an external diode), the SHDN
5.0V
REMOVABLE
LITHIUM ION OR
3-CELL OUT
1A TOTAL CURRENT VCC = 3.3V ALKALINE
IN IN
OUT
MAX6469–
MAX6475/MAX6476 330Ω 3.3µF 0.1µF RPULLUP MAX6484 3.3µF
MAX6483/MAX6484 µP µP MEMORY
FB SUPERCAP
SHDN
GND RESET
Figure 2. High-Current, External Transistor Application Figure 3. Battery Backup
10 ______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
cool. The thermal sensor turns the pass transistor on Choose R2 = 50kΩ to maintain stability, accuracy and MAX6469–MAX6484
again after the IC’s junction temperature cools by 20°C, high-frequency power-supply rejection. Avoid selecting
resulting in a pulsed output during continuous thermal resistor values greater than 100kΩ. In preset voltage
overload conditions. Thermal overload protection is mode, the impedance between SET and ground should
designed to protect the MAX6469–MAX6484 in the always be less than 50kΩ. In most applications, con-
event of fault conditions. For continuous operation, do nect SET directly to ground.
not exceed the absolute maximum junction temperature Low-Noise UCSP Output
rating of TJMAX = +150°C. MAX6477–MAX6484 UCSP products include internal fil-
Operating Region and Power Dissipation tering to yield low output noise without an additional
The MAX6469–MAX6484’s maximum power dissipation external bypass capacitor. The devices yield 75µVRMS
depends on the thermal resistance of the case and cir- (typ) output noise (for VOUT = 3.0V) and 150µVRMS (for
cuit board, the temperature difference between the die VOUT = 3.3V). This low-noise feature makes the
junction and the ambient air, and the rate of airflow. The MAX6477–MAX6484 ideal for audio applications.
power dissipation across the device is: Capacitor Selection and Regulator
P = IOUT (VIN - VOUT) Stability
The maximum power dissipation is: For stable operation over the full temperature range
PMAX = (TJ - TA) / (ØJB + ØBA) and with load currents up to 300mA, use a 3.3µF (min)
where TJ - TA is the temperature difference between the ceramic output capacitor with an ESR <0.2Ω. To
die junction and the surrounding air, ØJB (or ØJC) is the reduce noise and improve load transient response, sta-
thermal resistance of the package, and ØBA is the ther- bility, and power-supply rejection, use large output
mal resistance through the PC board, copper traces, capacitor values such as 10µF.
and other materials to the surrounding air. The Note that some ceramic capacitors exhibit large capac-
MAX6469–MAX6476 TDFN package ØJC = 41°C/W, itance and ESR variation with temperature. With capaci-
and the MAX6469–MAX6476 SOT package ØJC = tor dielectrics such as Z5U and Y5V, use 4.7µF or more
110°C/W. to ensure stability over temperature. With X7R or X5R
The MAX6469–MAX6484’s ground pin (GND) performs capacitor dielectrics, 3.3µF should be sufficient at all
the dual function of providing an electrical connection operating temperatures. Higher ESR capacitors require
to the system ground and channeling heat away. more capacitance to maintain stability. A graph of the
Connect GND to the system ground using a large pad Region of Stable ESR vs. Load Current is shown in the
or ground plane. For continuous operation, do not Typical Operating Characteristics.
exceed the absolute maximum junction temperature To improve power-supply rejection and transient
rating of TJMAX = +150°C. response, use a 1µF capacitor between IN and GND.
Applications Information The MAX6469–MAX6484 remain stable with purely
resistive loads or current loads up to 300mA.
Output Voltage Selection Reset Transient Immunity
The MAX6469–MAX6484 feature dual-mode operation: The reset circuit is relatively immune to short-duration,
they operate in either a preset output voltage mode falling VOUT transients. The Typical Operating
or an adjustable mode. In preset voltage mode, internal Characteristics section shows a graph of the Maximum
feedback resistors set the MAX6469–MAX6484’s output Transient Duration vs. Reset Threshold Overdrive for
from +1.5V to +3.3V (Table 1). Select this mode by con- which reset is not asserted. The graph was produced
necting SET to ground (MAX6469–MAX6472/ using falling VOUT transients starting at VOUT and end-
MAX6477–MAX6480). In adjustable mode, select an ing below the reset threshold by the magnitude indicat-
output between 1.25V and 5.5V using two external ed (reset threshold overdrive). The graph shows the
resistors connected as a voltage-divider to SET (Figure maximum pulse width that a falling VOUT transient can
1). The output voltage is set by the following equation: typically have without triggering a reset pulse. As the
VOUT = VSET (1 + R1 / R2) amplitude of the transient increases (i.e., goes further
where VSET = 1.23V. To simplify resistor selection: below the reset threshold), the maximum allowable
R1 = R2 (VOUT / VSET - 1) pulse width decreases. Typically, a VOUT transient that
goes only 10mV below the reset threshold and lasts for
75µs does not trigger a reset pulse.
______________________________________________________________________________________ 11
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 Power Dissipation Consideration UCSP Reliability
For the SOT23 package, any pin except the SET pin The chip-scale package (UCSP) represents a unique
can be used as a heatsink. If the SET pin is used as a packaging form factor that might not perform equally to
heatsink, excessive parasitic capacitance can affect a packaged product through traditional mechanical
stability. For the TDFN package, the exposed metal reliability tests. CSP reliability is integrally linked to the
pad on the back side of a package connects to GND of user’s assembly methods, circuit-board material, and
the chip. This metal pad can be used as a heatsink. usage environment. The user should closely review
UCSP Consideration these areas when considering a CSP package.
For general UCSP package information and PC layout Performance through operating life test and moisture
considerations, refer to Maxim Application Note: Wafer- resistance remains uncompromised, because it is pri-
Level Chip-Scale Package. marily determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a CSP package. CSPs are attached through
direct solder contact to the user’s PC board, forgoing
the inherent stress relief of a packaged product’s lead
frame. Solder-joint contact integrity must be considered.
Information on Maxim’s qualification plan, test data, and
recommendations are detailed in the UCSP application
note on Maxim’s website at www.maxim-ic.com.
Table 1. Output Voltage Suffix Guide Table 2. Reset Threshold Accuracy Guide
SUFFIX OUTPUT SUFFIX VOUT RESET
VOLTAGE (V) TOLERANCE (%)
15 1.5 A -7.5
16 1.6 B -12.5
17 1.7
18 1.8
19 1.9 Table 3. Reset Timeout Delay Guide
20 2.0 SUFFIX MINIMUM RESET
21 2.1 TIMEOUT PERIOD (ms)
22 2.2 D1 2.5
23 2.3 D2 20
24 2.4 D3 150
25 2.5 D4 1200
26 2.6
27 2.7
28 2.8
285 2.85
29 2.9
30 3.0
31 3.1
32 3.2
33 3.3
Note: Factory-trimmed custom output voltages may be avail-
able; contact factory for availability.
12 ______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
Table 4. Standard Versions MAX6469–MAX6484
DEVICE TOP MARK DEVICE TOP MARK
MAX6469TA15BD3 ADO MAX6474TA28BD3 AET
MAX6469TA18AD3 ADP MAX6474TA30AD3 AEU
MAX6469TA25BD3 ADQ MAX6474TA33BD3 AEV
MAX6469TA28AD3 ACT MAX6475TA15BD3 AEW
MAX6469TA30BD3 ADR MAX6475TA18AD3 AEX
MAX6469TA33AD3 ADS MAX6475TA25BD3 AEY
MAX6470TA15BD3 ADT MAX6475TA28AD3 AEZ
MAX6470TA18AD3 ADU MAX6475TA30BD3 AFA
MAX6470TA25BD3 ADV MAX6475TA33AD3 ACZ
MAX6470TA28AD3 ADW MAX6476TA15BD3 AFB
MAX6470TA30BD3 ADY MAX6476TA18AD3 AFC
MAX6470TA33AD3 ACU MAX6476TA25BD3 AFD
MAX6471TA15AD3 ADZ MAX6476TA28AD3 AFE
MAX6471TA18BD3 AEA MAX6476TA30BD3 AEF
MAX6471TA25AD3 AEB MAX6476TA33AD3 AFG
MAX6471TA28BD3 AEC MAX6477BL15BD3 ABW
MAX6471TA30AD3 AED MAX6477BL18AD3 ABG
MAX6471TA33BD3 AEE MAX6477BL25BD3 ABX
MAX6472TA15AD3 AEF MAX6477BL28AD3 ABY
MAX6472TA18BD3 ACW MAX6477BL30BD3 ABZ
MAX6472TA25AD3 AEG MAX6477BL33AD3 ACA
MAX6472TA28BD3 AEH MAX6478BL15BD3 ACB
MAX6472TA30AD3 AEI MAX6478BL18AD3 ACC
MAX6472TA33BD3 AEJ MAX6478BL25BD3 ACD
MAX6473TA15AD3 AEK MAX6478BL28AD3 ACE
MAX6473TA18BD3 AEL MAX6478BL30BD3 ACF
MAX6473TA25AD3 AEM MAX6478BL33AD3 ACG
MAX6473TA28BD3 AEN MAX6479BL15AD3 ACH
MAX6473TA30AD3 AEO MAX6479BL18BD3 ACI
MAX6473TA33BD3 AEP MAX6479BL25AD3 ACJ
MAX6474TA15AD3 AEQ MAX6479BL28BD3 ACK
MAX6474TA18BD3 AER MAX6479BL30AD3 ACL
MAX6474TA25AD3 AES MAX6479BL33BD3 ACM
______________________________________________________________________________________ 13
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 Table 4. Standard Versions (continued)
DEVICE TOP MARK DEVICE TOP MARK
MAX6480BL15BD3 ACN MAX6482BL28AD3 ADB
MAX6480BL18AD3 ACO MAX6482BL30BD3 ADC
MAX6480BL25BD3 ACP MAX6482BL33AD3 ADD
MAX6480BL28AD3 ACQ MAX6483BL15BD3 ADE
MAX6480BL30BD3 ACR MAX6483BL18AD3 ADF
MAX6480BL33AD3 ABJ MAX6483BL25BD3 ADG
MAX6481BL15BD3 ACS MAX6483BL28AD3 ADH
MAX6481BL18AD3 ACT MAX6483BL30BD3 ADI
MAX6481BL25BD3 ACU MAX6483BL33AD3 ADJ
MAX6481BL28AD3 ACV MAX6484BL15BD3 ADK
MAX6481BL30BD3 ACW MAX6484BL18AD3 ADL
MAX6481BL33AD3 ACX MAX6484BL25BD3 ADM
MAX6482BL15BD3 ACY MAX6484BL28AD3 ADN
MAX6482BL18AD3 ACZ MAX6484BL30BD3 ADO
MAX6482BL25BD3 ADA MAX6484BL33AD3 ADP
Sample stock is generally available on standard versions only. Standard versions require a minimum order increment of 2.5k units.
Nonstandard versions must be ordered in 10k-unit increments. Contact factory for availability.
14 ______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
Pin Configurations MAX6469–MAX6484
TOP VIEW OUT OUT SET RESET
8 7 6 5
IN 1 6 OUT IN 1 6 OUT
GND 2 MAX6469 5 SET MAX6471
MAX6470 GND 2 MAX6472 5 SET
MAX6469
SHDN 3 4 RESET MAX6470 MR 3 4 RESET
EP*
SOT23-6 SOT23-6
1 2 3 4
IN IN GND SHDN
TDFN
OUT OUT SET RESET OUT OUT MR RESET
8 7 6 5 8 7 6 5
IN 1 6 OUT
GND 2 MAX6473 5 MR
MAX6474
MAX6471 MAX6473
MAX6472 SHDN 3 4 RESET MAX6474
EP* EP*
SOT23-6
1 2 3 4 1 2 3 4
IN IN GND MR IN IN GND SHDN
TDFN TDFN
OUT OUT FB RESET
8 7 6 5
IN 1 6 OUT
GND 2 MAX6475 5 FB
MAX6476
MAX6475
SHDN 3 4 RESET MAX6476
SOT23-6
1 2 3 4
IN IN GND SHDN
TDFN
*EP = EXPOSED PAD.
______________________________________________________________________________________ 15
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 Pin Configurations (continued)
TOP VIEW
IN GND SHDN IN GND SHDN
A1 A2 A3 A1 A2 A3
MAX6477 MAX6481
MAX6478 MAX6482
C1 C2 C3 C1 C2 C3
OUT SET RESET OUT MR RESET
3 x 3 UCSP 3 x 3 UCSP
IN GND MR IN GND SHDN
A1 A2 A3 A1 A2 A3
MAX6479 MAX6483
MAX6480 MAX6484
C1 C2 C3 C1 C2 C3
OUT SET RESET OUT FB RESET
3 x 3 UCSP 3 x 3 UCSP
UCSP DEVICES SHOWN AS
MOUNTED ON PC BOARD.
BALL SOLDERED DOWN.
16 ______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
Functional Diagrams MAX6469–MAX6484
IN REVERSE THERMAL SENSOR
IN REVERSE THERMAL SENSOR LEAKAGE OUT
LEAKAGE OUT SHDN* PROTECTION
SHDN PROTECTION
MOS DRIVER WITH
CURRENT LIMIT
MOS DRIVER WITH
CURRENT LIMIT
FB ERROR
AMP
ERROR SET**
AMP FEEDBACK-MODE
COMPARATOR
1.23V
1.23V MAX6475/MAX6476 185mV
MAX6483/MAX6484
RESET OUTPUT RESET
TIMEOUT STAGE
RESET OUTPUT RESET
TIMEOUT STAGE
RESET MAX6469–MAX6474
COMPARATOR MAX6477–MAX6482
RESET
COMPARATOR GND
MR***
GND *MAX6469/MAX6470/MAX6473–MAX6478/MAX6481–MAX6484
**MAX6469–MAX6472/MAX6477–MAX6480
***MAX6471–MAX6474/MAX6479–MAX6482
Typical Operating Circuit Chip Information
PROCESS: BiCMOS
2.5V TO 5.5V
IN
SHDN OUT VCC
3.3µF
MAX6469/MAX6470 µP
MAX6477/MAX6478
SET RESET RESET
GND GND
______________________________________________________________________________________ 17
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 Ordering Information (continued)
PART* TEMP RANGE PIN- PART* TEMP RANGE PIN-
PACKAGE PACKAGE
MAX6471UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6476UT_ _ _D_-T -40°C to +85°C 6 SOT23-6
MAX6471TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** MAX6476TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP***
MAX6472UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6477BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6472TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** MAX6478BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6473UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6479BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6473TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** MAX6480BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6474UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6481BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6474TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** MAX6482BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6475UT_ _ _D_-T -40°C to +85°C 6 SOT23-6 MAX6483BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
MAX6475TA_ _ _D_-T** -40°C to +85°C 8 TDFN-EP*** MAX6484BL_ _ _D_-T -40°C to +85°C 6 UCSP-6
*Devices are also available in a lead(Pb)-free/RoHS-compliant packages. Specify lead(Pb)-free by substituting a +T instead of a -T
when ordering.
**Future product—contact factory for availability.
***EP = Exposed pad.
Note: The first “_ _” are placeholders for the output voltage levels of the devices. Desired output voltages are set by the suffix found
in the Output Voltage Suffix Guide (Table 1). The third “_” is a placeholder for the reset threshold accuracy. Desired reset threshold
accuracy is set by the suffix found in the Reset Threshold Accuracy Guide (Table 2). The “_” following the D is a placeholder for the
reset timeout delay time. Desired reset timeout delay time is set by the suffix found in the Reset Timeout Delay Guide (Table 3). For
example, the MAX6481BL30BD4-T has a 3.0V output voltage, 12.5% reset threshold tolerance, and a 1200ms (min) reset timeout
delay. Sample stock is generally available on standard versions only (Table 4). Standard versions require a minimum order incre-
ment of 2.5k units. Nonstandard versions must be ordered in 10k-unit increments. Contact factory for availability.
Selector Guide
PART SET SHDN MR FB PUSH-PULL OPEN-DRAIN PACKAGE
RESET RESET
MAX6469 √ √ — — √ — SOT23-6/8-TDFN
MAX6470 √ √ — — — √ SOT23-6/8-TDFN
MAX6471 √ — √ — √ — SOT23-6/8-TDFN
MAX6472 √ — √ — — √ SOT23-6/8-TDFN
MAX6473 — √ √ — √ — SOT23-6/8-TDFN
MAX6474 — √ √ — — √ SOT23-6/8-TDFN
MAX6475 — √ — √ √ — SOT23-6/8-TDFN
MAX6476 — √ — √ — √ SOT23-6/8-TDFN
MAX6477 √ √ — — √ — 3 x 3 UCSP B9-3
MAX6478 √ √ — — — √ 3 x 3 UCSP B9-3
MAX6479 √ — √ — √ — 3 x 3 UCSP B9-3
MAX6480 √ — √ — — √ 3 x 3 UCSP B9-3
MAX6481 — √ √ — √ — 3 x 3 UCSP B9-3
MAX6482 — √ √ — — √ 3 x 3 UCSP B9-3
MAX6483 — √ — √ √ — 3 x 3 UCSP B9-3
MAX6484 — √ — √ — √ 3 x 3 UCSP B9-3
18 ______________________________________________________________________________________
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
Package Information MAX6469–MAX6484
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND
PATTERN NO.
6 SOT23-6 U6F-6 21-0058 90-0175
8 TDFN-EP T833-2 21-0137 90-0059
6 UCSP B9-3 21-0093 —
______________________________________________________________________________________ 19
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
MAX6469–MAX6484 Revision History
REVISION REVISION DESCRIPTION PAGES
NUMBER DATE CHANGED
0 07/02 Initial release —
4 04/05 Removed SOT23 standard versions from the data sheet 13, 14
5 12/07 Updated Typical Operating Characteristics and Pin Descriptions sections 1, 5, 7, 8
Added soldering temperatures to the Absolute Maximum Ratings section
6 2/11 and corrected MAX6471/MAX6472/MAX6479/MAX6480 Pin Description 2, 7
section
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Mouser Electronics
Authorized Distributor
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