LT1579
300mA Dual Input Smart
Battery Backup Regulator
FEATURES DESCRIPTION U
s Maintains Output Regulation with Dual Inputs The LT®1579 is a dual input, single output, low dropout
s Dropout Voltage: 0.4V regulator. This device is designed to provide an
s Output Current: 300mA uninterruptible output voltage from two independent input
s 50µA Quiescent Current voltage sources on a priority basis. All of the circuitry
s No Protection Diodes Needed needed to switch smoothly and automatically between
s Two Low-Battery Comparators inputs is incorporated.
s Status Flags Aid Power Management The LT1579 can supply 300mA of output current from
s Adjustable Output from 1.5V to 20V either input at a dropout voltage of 0.4V. Quiescent current
s Fixed Output Voltages: 3V, 3.3V and 5V is 50µA, dropping to 7µA in shutdown. Two comparators
s 7µA Quiescent Current in Shutdown are included to monitor input voltage status. Two addi-
s Reverse-Battery Protection tional status flags indicate which input is supplying power
s Reverse Current Protection and provide an early warning against loss of output
s Remove, Recharge and Replace Batteries Without regulation when both inputs are low. A secondary select
Loss of RegulationDaisy-Chained Control Outputs pin is provided so that the user can force the device to
U switch from the primary input to the secondary input.
APPLICATIONS Internal protection circuitry includes reverse-battery pro-
Dual Battery Systems tection, current limiting, thermal limiting and reverse-
s current protection.
s Battery Backup Systems
s Automatic Power Management for The device is available in fixed output voltages of 3V, 3.3V
Battery-Operated Systems and 5V, and as an adjustable device with a 1.5V reference
voltage. The LT1579 regulators are available in narrow
, LTC and LT are registered trademarks of Linear Technology Corporation. 16-lead SO and 16-lead SSOP packages with all features,
and in SO-8 with limited features.
TYPICAL APPLICATION U
5V Dual Battery Supply Automatic Input Switching
5V 12
+ IN1 OUT + 300mA 10 VIN1 VIN2 = 10V
2.7M INPUT VOLTAGE (V) SWITCHOVER ILOAD = 50mA
1µF 4.7µF 8 POINT 80 INPUT CURRENT (mA)
LBI1
1M LT1579-5 6 IIN1 IIN2 60
SS 4 40
IN2 SHDN 2 20
+ 2.7M LBO1 TO OUTPUT VOLTAGE (V) 0 0
1µF POWER 5.05
LBI2 LB02 MANAGEMENT
1M BACKUP 5.00
DROPOUT 4.95
BIASCOMP
GND 0.01µF 0 2 4 6 8 10 12 14 16 18 20
TIME (ms)
1579 TA01
1578 TA02
1
LT1579
W WW U
ABSOLUTE MAXIMUM RATINGS
Power Input Pin Voltage ...................................... ±20V* BIASCOMP Pin Voltage ............................... 6.5V, – 0.6V
Output Pin Voltage BIASCOMP Pin Current .......................................... 5mA
Fixed Devices............................................. 6.5V, – 6V Logic Flag Output Voltage ............................ 6.5V, – 0.6V
Adjustable Device ............................................ ±20V* Logic Flag Input Current ......................................... 5mA
Output Pin Reverse Current .................................... 5mA Output Short-Circuit Duration .......................... Indefinite
ADJ Pin Voltage .............................................. 2V, – 0.6V Storage Temperature Range ................. – 65°C to 150°C
ADJ Pin Current ...................................................... 5mA Operating Junction Temperature Range .... 0°C to 125°C
Control Input Pin Voltage ............................ 6.5V, – 0.6V Lead Temperature (Soldering, 10 sec).................. 300°C
Control Input Pin Current ....................................... 5mA *For applications requiring input voltage ratings greater than 20V,
consult factory.
PACKAGE/ORDER I U FOR W ATIO U
ORDER PART ORDER PART
TOP VIEW NUMBER TOP VIEW NUMBER
GND 1 16 GND LT1579CGN-3 GND 1 16 GND LT1579CGN
POWER VIN1 2 15 OUT POWER VIN1 2 15 OUT
INPUTS VIN2 3 14 BACKUP LT1579CGN-3.3 INPUTS VIN2 3 14 ADJ LT1579CS
SS 4 13 DROPOUT LOGIC LT1579CGN-5 SS 4 13 BACKUP
CONTROL SHDN 5 12 LBO1 OUTPUTS LT1579CS-3 CONTROL SHDN 5 12 LBO1 LOGIC
INPUTS INPUTS OUTPUTS
LBI1 6 11 LBO2 LT1579CS-3.3 LBI1 6 11 LBO2
LBI2 7 10 BIASCOMP LT1579CS-5 LBI2 7 10 BIASCOMP
GND 8 9 GND GND 8 9 GND
GN PACKAGE S PACKAGE GN PART MARKING GN PACKAGE S PACKAGE GN PART MARKING
16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO 16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO
SEE APPLICATION INFORMATION SECTION 15793 SEE APPLICATION INFORMATION SECTION 1579
TJMAX = 125°C, θJA = 95°C/W (GN) 157933 TJMAX = 125°C, θJA = 95°C/W (GN)
TJMAX = 125°C, θJA = 68°C/W (S) TJMAX = 125°C, θJA = 68°C/W (S)
15795
ORDER PART ORDER PART
TOP VIEW NUMBER TOP VIEW NUMBER
POWER VIN1 1 8 OUT LT1579CS8-3 POWER VIN1 1 8 OUT LT1579CS8
INPUTS VIN2 2 7 BACKUP LT1579CS8-3.3 INPUTS VIN2 2 7 ADJ
LOGIC
CONTROL SHDN 3 6 DROPOUT OUTPUTS CONTROL SHDN 3 6 BACKUP LOGIC
INPUT LT1579CS8-5 INPUT OUTPUT
GND 4 5 BIASCOMP GND 4 5 BIASCOMP
S8 PACKAGE S8 PART MARKING S8 PACKAGE S8 PART MARKING
8-LEAD PLASTIC SO 8-LEAD PLASTIC SO
SEE APPLICATION INFORMATION SECTION 15793 SEE APPLICATION INFORMATION SECTION 1579
TJMAX = 125°C, θJA = 90°C/W 157933 TJMAX = 125°C, θJA = 90°C/W
15795
Consult factory for Industrial and Military grade parts.
2
LT1579
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Regulated Output LT1579-3 VIN1 = VIN2 = 3.5V, ILOAD = 1mA, TJ = 25°C 2.950 3.000 3.050 V
Voltage (Note 1) 4V < VIN1 < 20V, 4V < VIN2 < 20V, 1mA < ILOAD < 300mA q 2.900 3.000 3.100 V
LT1579-3.3 VIN1 = VIN2 = 3.8V, ILOAD = 1mA, TJ = 25°C 3.250 3.300 3.350 V
4.3V < VIN1 < 20V, 4.3V < VIN2 < 20V, 1mA < ILOAD < 300mA q 3.200 3.300 3.400 V
LT1579-5 VIN1 = VIN2 = 5.5V, ILOAD = 1mA, TJ = 25°C 4.925 5.000 5.075 V
6V < VIN1 < 20V, 6V < VIN2 < 20V, 1mA < ILOAD < 300mA q 4.850 5.000 5.150 V
Adjust Pin Voltage LT1579 VIN1 = VIN2 = 3.2V, ILOAD = 1mA, TJ = 25°C (Note 2) 1.475 1.500 1.525 V
3.7V < VIN1 < 20V, 3.7V < VIN2 < 20V, 1mA < ILOAD < 300mA q 1.450 1.500 1.550 V
Line Regulation LT1579-3 ∆VIN1 = 3.5V to 20V, ∆VIN2 = 3.5V to 20V, ILOAD = 1mA q 1.5 10 mV
LT1579-3.3 ∆VIN1 = 3.8V to 20V, ∆VIN2 = 3.8V to 20V, ILOAD = 1mA q 1.5 10 mV
LT1579-5 ∆VIN1 = 5.5V to 20V, ∆VIN2 = 5.5V to 20V, ILOAD = 1mA q 1.5 10 mV
LT1579 ∆VIN1 = 3.2V to 20V, ∆VIN2 = 3.2V to 20V, ILOAD = 1mA (Note 2) q 1.5 10 mV
Load Regulation LT1579-3 VIN1 = VIN2 = 4V, ∆ILOAD = 1mA to 300mA, TJ = 25°C 3 12 mV
VIN1 = VIN2 = 4V, ∆ILOAD = 1mA to 300mA q 25 mV
LT1579-3.3 VIN1 = VIN2 = 4.3V, ∆ILOAD = 1mA to 300mA, TJ = 25°C 3 12 mV
VIN1 = VIN2 = 4.3V, ∆ILOAD = 1mA to 300mA q 25 mV
LT1579-5 VIN1 = VIN2 = 6V, ∆ILOAD = 1mA to 300mA, TJ = 25°C 5 15 mV
VIN1 = VIN2 = 6V, ∆ILOAD = 1mA to 300mA q 35 mV
LT1579 VIN1 = VIN2 = 3.7V, ∆ILOAD = 1mA to 300mA, TJ = 25°C (Note 2) 2 10 mV
VIN1 = VIN2 = 3.7V, ∆ILOAD = 1mA to 300mA q 20 mV
Dropout Voltage ILOAD = 10mA, TJ = 25°C 0.10 0.28 V
(Notes 3, 4) ILOAD = 10mA q 0.39 V
VIN1 = VIN2 = ILOAD = 50mA, TJ = 25°C 0.18 0.35 V
VOUT(NOMINAL) ILOAD = 50mA q 0.45 V
ILOAD = 150mA, TJ = 25°C 0.25 0.47 V
ILOAD = 150mA q 0.60 V
ILOAD = 300mA, TJ = 25°C 0.34 0.60 V
ILOAD = 300mA q 0.75 V
Ground Pin Current ILOAD = 0mA, TJ = 25°C 50 100 µA
(Note 5) ILOAD = 0mA q 400 µA
VIN1 = VIN2 = ILOAD = 1mA, TJ = 25°C 100 200 µA
VOUT(NOMINAL) + 1V ILOAD = 1mA q 500 µA
ILOAD = 50mA q 0.7 1.5 mA
ILOAD = 150mA q 2 4 mA
ILOAD = 300mA q 5.8 12 mA
Standby Current IVIN2: VIN1 = 20V, VIN2 = VOUT(NOMINAL) + 0.5V, VSS = Open (HI) q 3.3 7.0 µA
(Note 6) ILOAD = 0mA IVIN1: VIN1 = VOUT(NOMINAL) + 0.5V, VIN2 = 20V, VSS = 0V q 2.0 7.0 µA
Shutdown Threshold VOUT = Off to On q 0.9 2.8 V
VOUT = On to Off q 0.25 0.75 V
Shutdown Pin Current VSHDN = 0V q 1.3 5 µA
(Note 7)
Quiescent Current in IVIN1: VIN1 = 20V, VIN2 = 6V, VSHDN = 0V q 5 12 µA
Shutdown (Note 9) IVIN2: VIN1 = 6V, VIN2 = 20V, VSHDN = 0V q 5 12 µA
ISRC: VIN1 = VIN2 = 20V, VSHDN = 0V 3 µA
3
LT1579
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Adjust Pin Bias Current TJ = 25°C 6 30 nA
(Notes 2, 7)
Minimum Input Voltage ILOAD = 0mA q 2.7 3.2 V
(Note 8)
Minimum Load Current LT1579 VIN1 = VIN2 = 3.2V q 3 µA
Secondary Select Switch from VIN2 to VIN1 q 1.2 2.8 V
Threshold Switch from VIN1 to VIN2 q 0.25 0.75 V
Secondary Select Pin VSS = 0V q 1 1.5 µA
Current (Note 7)
Low-Battery Trip Threshold VIN1 = VIN2 = VOUT(NOMINAL) + 1V, High-to-Low Transition q 1.440 1.500 1.550 V
Low-Battery Comparator VIN1 = VIN2 = 6V, ILBO = 20µA (Note 11) q 18 30 mV
Hysteresis
Low-Battery Comparator VIN1 = VIN2 = 6V, VLBI = 1.4V, TJ = 25°C 2 5 nA
Bias Current (Notes 7, 10)
Logic Flag Output Voltage ISINK = 20µA q 0.17 0.45 V
ISINK = 5mA q 0.97 1.3 V
Ripple Rejection VIN1 – VOUT = VIN2 – VOUT = 1.2V (Avg), VRIPPLE = 0.5VP-P 55 70 dB
fRIPPLE = 120Hz, ILOAD = 150mA
Current Limit VIN1 = VIN2 = VOUT(NOMINAL) + 1V, ∆VOUT = – 0.1V q 320 400 mA
Input Reverse Leakage VIN1 = VIN2 = –20V, VOUT = 0V q 1.0 mA
Current
Reverse Output Current LT1579-3 VOUT = 3V, VIN1 = VIN2 = 0V 3 12 µA
LT1579-3.3 VOUT = 3.3V, VIN1 = VIN2 = 0V 3 12 µA
LT1579-5 VOUT = 5V, VIN1 = VIN2 = 0V 3 12 µA
The q denotes specifications which apply over the full operating Note 6: Standby current is the minimum quiescent current for a given
temperature range. input while the other input supplies the load and bias currents.
Note 1: Operating conditions are limited by maximum junction Note 7: Current flow is out of the pin.
temperature. The regulated output voltage specification will not apply for Note 8: Minimum input voltage is the voltage required on either input to
all possible combinations of input voltage and output current. When maintain the 1.5V reference for the error amplifier and low-battery
operating at maximum input voltage, output current must be limited. comparators.
When operating at maximum output current, the input voltage range must Note 9: Total quiescent current in shutdown will be approximately equal to
be limited. IVIN1 + IVIN2 – ISRC. Both IVIN1 and IVIN2 are specified for worst-case
Note 2: The LT1579 (adjustable version) is tested and specified with the conditions. IVIN1 is specified under the condition that VIN1 > VIN2 and IVIN2
adjust pin connected to the output pin and a 3µA DC load. is specified under the condition that VIN2 > VIN1. ISRC is drawn from the
Note 3: Dropout voltage is the minimum input-to-output voltage highest input voltage only. For normal operating conditions, the quiescent
differential required to maintain regulation at the specified output current. current of the input with the lowest input voltage will be equal to the
In dropout, the output voltage will be equal to VIN – VDROPOUT. specified quiescent current minus ISRC. For example, if VIN1 = 20V, VIN2 =
Note 4: To meet the requirements for minimum input voltage, the LT1579 6V then IVIN1 = 5µA and IVIN2 = 5µA – 3µA = 2µA.
(adjustable version) is connected with an external resistor divider for a Note 10: The specification applies to both inputs independently
3.3V output voltage (see curve of Minimum Input Voltage vs Temperature (LBI1, LBI2).
in the Typical Performance Characteristics). For this configuration, Note 11: Low-battery comparator hysteresis will change as a function of
VOUT(NOMINAL) = 3.3V. current in the low-battery comparator output. See the curve of Low-Battery
Note 5: Ground pin current will rise at TJ > 75°C. This is due to internal Comparator Hysteresis vs Sink Current in the Typical Performance
circuitry designed to compensate for leakage currents in the output Characteristics.
transistor at high temperatures. This allows quiescent current to be
minimized at lower temperatures, yet maintain output regulation at high
temperatures with light loads. See the curve of Quiescent Current vs
Temperature in the Typical Performance Characteristics.
4
LT1579
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TYPICAL PERFORMANCE CHARACTERISTICS
Guaranteed Dropout Voltage Dropout Voltage Quiescent Current
0.8 0.7 100
= TEST POINTS A: ILOAD = 300mA 90 VIN = 6V
0.7 B: ILOAD = 150mA A RL = ∞ (FIXED)
TJ ≤ 125°C 0.6 C: ILOAD = 100mA RL = 500k (ADJUSTABLE)
D: ILOAD = 50mA QUIESCENT CURRENT (µA) 80
DROPOUT VOLTAGE (V) 0.6 DROPOUT VOLTAGE (V) 0.5 E: ILOAD = 10mA
B 70
0.5 F: ILOAD = 1mA 60 OPERATING
TJ = 25°C 0.4 C QUIESCENT
0.4 50 CURRENT
0.3 D 40
0.3
0.2 E 30
0.2 STANDBY
20 QUIESCENT
0.1 0.1 10
F CURRENT
0 0 0
0 50 100 150 200 250 300 – 50 – 25 0 25 50 75 100 125 – 50 –25 0 25 50 75 100 125
OUTPUT CURRENT (mA) TEMPERATURE (°C) TEMPERATURE (°C)
1579 G35 1579 G01 1579 G02
Quiescent Current in Shutdown LT1579-3 Output Voltage LT1579-3.3 Output Voltage
7 3.08 3.38
VIN1 = 20V ILOAD = 1mA ILOAD = 1mA
6 VIN2 = 6V 3.06 3.36
QUIESCENT CURRENT (µA) VSHDN = 0V
5 OUTPUT VOLTAGE (V) 3.04 OUTPUT VOLTAGE (V) 3.34
3.02 3.32
4
IVIN1 3.00 3.30
3
2.98 2.28
2 IVIN2 2.96 2.26
1 2.94 2.24
0 2.92 2.22
– 50 – 25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
1579 G36 1579 G03 1579 G04
LT1579-5 Output Voltage Adjust Pin Voltage Input Current
5.12 1.54 60 IIN2
ILOAD = 1mA ILOAD = 1mA
5.09 1.53 50 IIN1
5.06 ADJUST PIN VOLTAGE (V) 1.52 VOUT = 5V
OUTPUT VOLTAGE (V) INPUT CURRENT (µA) 40 VIN2 = 6V
5.03 1.51 ILOAD = 0
5.00 1.50 30
4.97 1.49 20
4.94 1.48
4.91 1.47 10
4.88 1.46 0
– 50 – 25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
TEMPERATURE (°C) TEMPERATURE (°C) VIN1 – VOUT (V)
1579 G05 1579 G05 1579 G07
5
LT1579
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TYPICAL PERFORMANCE CHARACTERISTICS
Input and Ground Pin Current Input and Ground Pin Current
1.2 300 12 600
IIN2 IIN1 IIN2 IIN1
1.0 VOUT = 5V 250 10 VOUT = 5V 500
VIN2 = 6V GROUND PIN CURRENT (µA) VIN2 = 6V GROUND PIN CURRENT (µA)
(mA) ILOAD = 1mA (mA) ILOAD = 10mA
0.8 200 8 400
CURRENT 0.6 150 CURRENT 6 IGND 300
INPUT IGND INPUT
0.4 100 4 200
0.2 50 2 100
0 0 0 0
–0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VIN1 – VOUT (V) VIN1 – VOUT (V)
1579 G08 1579 G09
Input and Ground Pin Current Input and Ground Pin Current
60 1.2 120 3.0
IIN2 IIN1 IIN2 IIN1
50 1.0 GROUND PIN CURRENT (mA) 100 2.5 GROUND PIN CURRENT (mA)
VOUT = 5V
INPUT CURRENT (mA) INPUT CURRENT (mA) VIN2 = 6V
40 IGND 0.8 80 ILOAD = 100mA 2.0
30 VOUT = 5V 0.6 60 IGND 1.5
VIN2 = 6V
ILOAD = 50mA
20 0.4 40 1.0
10 0.2 20 0.5
0 0 0 0
–0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VIN1 – VOUT (V) VIN1 – VOUT (V)
1579 G10 1579 G11
Input and Ground Pin Current Input and Ground Pin Current
160 4.0 350 14
IIN2 IIN1 IIN2 IIN1
140 3.5 300 12
INPUT CURRENT (mA) 120 3.0 GROUND PIN CURRENT (mA) INPUT CURRENT (mA) 250 10 GROUND PIN CURRENT (mA)
100 IGND 2.5 IGND
200 8
80 VOUT = 5V 2.0
VIN2 = 6V 150 6
60 ILOAD = 150mA 1.5 VOUT = 5V
40 1.0 100 VIN2 = 6V 4
ILOAD = 300mA
20 0.5 50 2
0 0 0 0
–0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VIN1 – VOUT (V) VIN1 – VOUT (V)
1579 G12 1579 G13
6
LT1579
UW
TYPICAL PERFORMANCE CHARACTERISTICS
Ground Pin Current Minimum Input Voltage Shutdown Pin Threshold
8 3.0 1.0
VIN1 = VIN2 = VOUT(NOMINAL) + 1V 2.9 ILOAD = 1mA
7 SHUTDOWN PIN THRESHOLD (V)
GROUND PIN CURRENT (mA) MINIMUM INPUT VOLTAGE (V) 2.8 0.8
6
2.7
5 2.6 0.6
4 2.5
3 2.4 0.4
2.3
2 0.2
2.2
1 2.1
0 2.0 0
0 50 100 150 200 250 300 – 50 –25 0 25 50 75 100 125 – 50 – 25 0 25 50 75 100 125
OUTPUT CURRENT (mA) TEMPERATURE (°C) TEMPERATURE (°C)
1579 G37 1579 G14 1579 G15
Secondary Select Threshold Secondary Select Threshold
Shutdown Pin Current (Switch to VIN2) (Switch to VIN1)
2.5 2.0 ILOAD = 1mA 2.0
VSHDN = 0V SECONDARY SELECT PIN THRESHOLD (V) 1.8 SECONDARY SELECT PIN THRESHOLD (V) 1.8
SHUTDOWN PIN CURRENT (µA) 2.0 1.6 1.6 ILOAD = 300mA
1.4 1.4 ILOAD = 1mA
1.5 1.2 1.2
1.0 1.0
1.0 0.8 0.8
0.6 0.6
0.5 0.4 0.4
0.2 0.2
0 0 0
– 50 – 25 0 25 50 75 100 125 – 50 –25 0 25 50 75 100 125 – 50 –25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
1579 G16 1579 G17 1579 G18
Logic Flag Output Voltage Logic Flag Output Voltage
Secondary Select Pin Current (Output Low) (Output Low)
1.0 1.0 1.2
SECONDARY SELECT PIN CURRENT (µA) 0.9 VSS = 0V 0.9
0.8 LOGIC FLAG OUTPUT VOLTAGE (V) 0.8 LOGIC FLAG OUTPUT VOLTAGE (V) 1.0
0.7 0.7 ISINK = 5mA
0.8
0.6 0.6
0.5 0.5 0.6
0.4 0.4
0.3 0.3 0.4
0.2 0.2 ISINK = 20µA
0.2
0.1 0.1
0 0 0
– 50 –25 0 25 50 75 100 125 1µA 10µA 100µA 1mA 10mA – 50 – 25 0 25 50 75 100 125
TEMPERATURE (°C) LOGIC FLAG SINK CURRENT TEMPERATURE (°C)
1579 G19 1579 G20 1579 G21
7
LT1579
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TYPICAL PERFORMANCE CHARACTERISTICS
Logic Flag Input Current Low-Battery Comparator
(Output High) Control Pin Input Current Hysteresis
25 25 20
LOGIC FLAG INPUT CURRENT (mA) 20 CONTROL PIN INPUT CURRENT (mA) 20 COMPARATOR HYSTERESIS (mV) 15
15 15
10
10 10
5
5 5
0 0 0
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 10 20 30 40 50
LOGIC FLAG VOLTAGE (V) CONTROL PIN VOLTAGE (V) ILBO SINK CURRENT (µA)
1579 G22 1579 G23 1579 G24
Low-Battery Comparator
Hysteresis Reverse Output Current Reverse Output Current
25 25 20
ILBO(SINK) = 50µA TJ = 25°C 18 VIN1 = VIN2 = 0V
COMPARATOR HYSTERESIS (mV) REVERSE OUTPUT CURRENT (µA) VIN1 = VIN2 = 0V REVERSE OUTPUT CURRENT (µA) VOUT = 3V (LT1579-3)
20 20 CURRENT FLOWS INTO 16 VOUT = 3.3V (LT1579-3.3)
OUTPUT PIN VOUT = 5V (LT1579-5)
14
15 15 12
10
10 10 8
LT1579-3.3 6
LT1579-3
5 5 4
LT1579-5 2
0 0 0
– 50 – 25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 9 – 50 –25 0 25 50 75 100 125
TEMPERATURE (°C) OUTPUT VOLTAGE (V) TEMPERATURE (°C)
1579 G25 1579 G26 1579 G27
Adjust Pin Input Current Current Limit Current Limit
1.0 0.6 0.7
0.9 TJ = 25°C VOUT = 0V VIN1 = VIN2 = VOUT(NOMINAL) + 1V
ADJUST PIN INPUT CURRENT (mA) VIN1 = VIN2 = 0V 0.5 0.6 ∆VOUT = – 0.1V
0.8
0.5 TYPICAL
0.7 CURRENT LIMIT (A) 0.4 CURRENT LIMIT (A)
0.6 0.4
0.5 0.3 GUARANTEED
0.4 0.3
0.3 0.2 0.2
0.2 0.1
0.1
0.1
0 0 0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 2 3 4 5 6 7 – 50 – 25 0 25 50 75 100 125
ADJUST PIN VOLTAGE (V) INPUT VOLTAGE (V) TEMPERATURE (°C)
1579 G28 1579 G29 1579 G38
8
LT1579
UW
TYPICAL PERFORMANCE CHARACTERISTICS
LT1579-5 “Hot” Plugging and
Ripple Rejection Load Regulation Unplugging Transient Response
100 0 ∆ILOAD = 1mA TO 300mA
90 ILOAD = 150mA LT1579 6V
VIN = 6V + 50mVRMS RIPPLE –2 LT1579-3
80 –4 VIN1
RIPPLE REJECTION (dB) 70 COUT = 47µF LOAD REGULATION (mV) LT1579-5 5V
60 SOLID –6
TANTALUM VOUT
50 –8 50mV/DIV
40 LT1579-3.3
–10
30 COUT = 4.7µF
20 SOLID –12
TANTALUM
10 –14 UNPLUG REPLACE
0 –16 VIN1 VIN1
10 100 1k 10k 100k 1M – 50 – 25 0 25 50 75 100 125
FREQUENCY (Hz) TEMPERATURE (°C)
1579 G30 1579 G40
LT1579-5 Transient Response LT1579-5 Transient Response
OUTPUT VOLTAGE DEVIATION (mV) 100 OUTPUT VOLTAGE DEVIATION (mV) 100
50 50
0 0
– 50 VIN = 6V – 50 VIN = 6V
–100 CIN = 1µF CERAMIC –100 CIN = 1µF CERAMIC
COUT = 4.7µF TANTALUM COUT = 22µF TANTALUM
(mA) 100 (mA)
CURRENT 75 CURRENT 300
50 200
LOAD 25 LOAD 100
0
0 50 100 150 200 250 300 350 400 450 500 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1,0
TIME (µs) TIME (ms)
1579 G33 1579 G34
PIN FUNCTIONS U U U
VIN1: The primary power source is connected to VIN1. A rises with frequency, so it is advisable to include a bypass
bypass capacitor is required on this pin if the device is capacitor in battery-powered circuits. A bypass capacitor
more than six inches away from the main input filter in the range of 1µF to 10µF is sufficient.
capacitor. In general, the output impedance of a battery OUT: The output supplies power to the load. A minimum
rises with frequency, so it is advisable to include a bypass output capacitor of 4.7µF is required to prevent oscilla-
capacitor in battery-powered circuits. A bypass capacitor tions. Larger output capacitors will be required for appli-
in the range of 1µF to 10µF is sufficient. cations with large transient loads to limit peak voltage
VIN2: The secondary power source is connected to VIN2. transients.
A bypass capacitor is required on this pin if the device is ADJ: For the adjustable LT1579, this is the input to the
more than six inches away from the main input filter error amplifier. This pin is internally clamped to 7V and
capacitor. In general, the output impedance of a battery – 0.6V (one VBE). It has a bias current of 6nA which flows
9
LT1579
UPIN FUNCTIONSU U
out of the pin (see curve of Adjust Pin Bias Current vs nally clamped to 7V and – 0.6V (one VBE). If unused, this
Temperature in the Typical Performance Characteristics). pin can be left open circuit. Device operation is unaffected
A DC load of 3µA is needed on the output of the adjustable if this pin is not connected.
part to maintain regulation. The adjust pin voltage is 1.5V DROPOUT: The dropout flag is an open collector output
referenced to ground and the output voltage range is 1.5V which pulls low when both input voltages drop suffi-
to 20V. ciently for the LT1579 to enter the dropout region. This
SHDN: The shutdown pin is used to put the LT1579 into signals that the output is beginning to go unregulated.
a low power shutdown state. All functions are disabled if The DROPOUT output voltage is 1V when sinking 5mA,
the shutdown pin is pulled low. The output will be off, all dropping to under 200mV at 20µA (see curve of Logic
logic outputs will be high impedance and the voltage Flag Voltage vs Current in the Typical Performance Char-
comparators will be off when the shutdown pin is pulled acteristics). This makes the DROPOUT pin equally useful
low. The shutdown pin is internally clamped to 7V and in driving both bipolar and CMOS logic inputs with the
– 0.6V (one VBE), allowing the shutdown pin to be driven addition of an external pull-up resistor. It is also capable
either by 5V logic or open collector logic with a pull-up of driving higher current devices, such as LEDs. This pin
resistor. The pull-up resistor is only required to supply is internally clamped to 7V and – 0.6V (one VBE). If
the pull-up current of the open collector gate, normally unused, this pin can be left open circuit. Device operation
several microamperes. If unused, the shutdown pin can is unaffected if this pin is not connected.
be left open circuit. The device is active if the shutdown BIASCOMP: This is a compensation point for the internal
pin is not connected. bias circuitry. It must be bypassed with a 0.01µF capaci-
SS: The secondary select pin forces the LT1579 to switch tor for stability during the switch from VIN1 to VIN2.
power draw to the secondary input (VIN2). This pin is LBI1: This is the noninvering input to low-battery com-
active low. The current drawn out of VIN1 is reduced to parator LB1 which is used to detect a low input/battery
3µA when this pin is pulled low. The secondary select pin condition. The inverting input is connected to a 1.5V
is internally clamped to 7V and – 0.6V (one VBE), allowing reference. The low-battery comparator input has 18mV of
the pin to be driven directly by either 5V logic or open hysteresis with more than 20µA of sink current on the
collector logic with a pull-up resistor. The pull-up resistor output (see Applications Information section). This pin is
is required only to supply the leakage current of the open internally clamped to 7V and – 0.6 (one VBE). If not used,
collector gate, normally several microamperes. If sec- this pin can be left open circuit, with no effect on normal
ondary select is not used, it can be left open circuit. The circuit operation. If unconnected, the pin will float to 1.5V
LT1579 draws power from the primary first if the second- and the logic output of LB1 will be high impedance.
ary select pin is not connected.
BACKUP: The backup flag is an open collector output LBI2: This is the noninverting input to low-battery com-
which pulls low when the LT1579 starts drawing power parator LB2 which is used to detect a low input/battery
from the secondary input (VIN2). The BACKUP output condition. The inverting input is connected to a 1.5V
voltage is 1V when sinking 5mA, dropping to under reference. The low-battery comparator input has 18mV of
200mV at 20µA (see curve of Logic Flag Voltage vs hysteresis with more than 20µA of sink current on the
Current in the Typical Performance Characteristics). This output (see Applications Information section). This pin is
makes the BACKUP pin equally useful in driving both internally clamped to 7V and – 0.6V (one VBE). If not used,
bipolar and CMOS logic inputs with the addition of an this pin can be left open circuit, with no effect on normal
external pull-up resistor. It is also capable of driving circuit operation. If unconnected, the pin will float to 1.5V
higher current devices, such as LEDs. This pin is inter- and the logic output of LB2 will be high impedance.
10
LT1579
UPIN FUNCTIONSUU
LBO1: This is the open collector output of the low-battery LBO2: This is the open collector output of the low-battery
comparator LB1. This output pulls low when the com- comparator LB2. This output pulls low when the com-
parator input drops below the threshold voltage. The parator input drops below the threshold voltage. The
LBO1 output voltage is 1V when sinking 5mA, dropping LBO2 output voltage is 1V when sinking 5mA, dropping
to under 200mV at 20µA (see curve of Logic Flag Voltage to under 200mV at 20µA (see curve of Logic Flag Voltage
vs Current in the Typical Performance Characteristics). vs Current in the Typical Performance Characteristics).
This makes the LBO1 pin equally useful in driving both This makes the LBO2 pin equally useful in driving both
bipolar and CMOS logic inputs with the addition of an bipolar and CMOS logic inputs with the addition of an
external pull-up resistor. It is also capable of driving external pull-up resistor. It is also capable of driving
higher current devices, such as LEDs. This pin is inter- higher current devices, such as LEDs. This pin is
nally clamped to 7V and – 0.6V (one VBE). If unused, this internally clamped to 7V and – 0.6V (one VBE). If unused,
pin can be left open circuit. Device operation is unaffected this pin can be left open circuit. Device operation is
if this pin is not connected. unaffected if this pin is not connected.
W
BLOCK DIAGRAM
VIN1
VIN2
VOUT
DROPOUT
DETECT
SHDN BIAS CURRENT INTERNAL
CONTROL RESISTOR DIVIDER
FOR FIXED VOLTAGE
SS DEVICES ONLY
– ADJ
BIASCOMP OUTPUT DRIVER E/A
CONTROL
1.5V REFERENCE +
+ WARNING BACKUP
LBI1 FLAGS DROPOUT
LB1 LBO1
–
LBI2 +
LB2 LBO2
–
1579 • BD
11
LT1579
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APPLICATIONS INFORMATION
Device Overview currents and logic functions. In shutdown, quiescent
The LT1579 is a dual input, single output, low dropout currents are 2µA from the primary input, 2µA from the
linear regulator. The device is designed to provide an secondary input and an additional 3µA which is drawn
uninterruptible output voltage from two independent input from the higher of the two input voltages.
voltage sources on a priority basis. All of the circuitry Adjustable Operation
needed to switch smoothly and automatically between
inputs is incorporated in the device. All power supplied to The adjustable version of the LT1579 has an output
the load is drawn from the primary input (VIN1) until the voltage range of 1.5V to 20V. The output voltage is set by
device senses that the primary input is failing. At this point the ratio of two external resistors as shown in Figure 1. The
the LT1579 smoothly switches from the primary input to device servos the output to maintain the voltage at the
the secondary input (VIN2) to maintain output regulation. adjust pin at 1.5V. The current in R1 is then equal to 1.5V/
The device is capable of providing 300mA from either R1 and the current in R2 is the current in R1 minus the
input at a dropout voltage of 0.4V. Total quiescent current adjust pin bias current. The adjust pin bias current, 6nA at
when operating from the primary input is 50µA, which is 25°C, flows out of the adjust pin through R1 to ground. The
45µA from the primary input, 2µA from the secondary and output voltage can now be calculated using the formula:
a minimum input current of 3µA which will be drawn from VOUT = 1.5V1+ RR21 – (IADJ)(R2)
the higher of the two input voltages.
A single error amplifier controls both output stages so
regulation remains tight regardless of which input is The value of R1 should be less than 500k to minimize the
providing power. Threshold levels for the error amplifier error in the output voltage caused by adjust pin bias
and low-battery detectors are set by the internal 1.5V current. With 500k resistors for both R1 and R2, the error
reference. Output voltage is set by an internal resistor induced by adjust pin bias current at 25°C is 3mV or 0.1%
divider for fixed voltage parts and an external divider for of the total output voltage. With appropriate value and
adjustable parts. Internal bias circuitry powers the refer- tolerance resistors, the error due to adjust pin bias current
ence, error amplifier, output driver controls, logic flags may often be ignored. Note that in shutdown, the output is
and low-battery comparators. turned off and the divider current is zero. The parallel
The LT1579 aids power management with the use of two combination of R1 and R2 should be greater than 20k to
independent low-battery comparators and two status flags. allow the error amplifier to start. In applications where the
The low-battery comparators can be used to monitor the minimum parallel resistance requirement cannot be met,
input voltage levels. The BACKUP flag signals when any a 20k resistor may be placed in series with the adjust pin.
power is being drawn from the secondary input and the This introduces an error in the reference point for the
DROPOUT flag provides indication that both input volt- resistor divider equal to (IADJ)(20k).
ages are critically low and the output is unregulated.
Additionally, the switch to the secondary input from the
primary can be forced externally through the use of the
secondary select pin (SS). This active low logic pin, when OUT + VOUT
pulled below the threshold, will cause power draw to R2 CFB COUT
switch from the primary input to the secondary input. ADJ
Current flowing in the primary input is reduced to only a GND R1
few microamperes, while all power draw (load current and 1579 • F01
bias currents) switches to the secondary. The LT1579 has
a low power shutdown state which shuts off all bias Figure 1. Adjustable Operation
12
LT1579
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APPLICATIONS INFORMATION
A small capacitor placed in parallel with the top resistor BIASCOMP Pin Compensation
(R2) of the output divider is necessary for stability and The BIASCOMP pin is a connection to a compensation
transient performance of the adjustable LT1579. The point for the internal bias circuitry. It must be bypassed
impedance of CFB at 10kHz should be less than the value with a 0.01µF capacitor for stability during the switch from
of R1. VIN1 to VIN2.
The adjustable LT1579 is tested and specified with the
output pin tied to the adjust pin and a 3µA load (unless “Hot” Plugging and Unplugging of Inputs
otherwise noted) for an output voltage of 1.5V. Specifica- The LT1579 is designed to maintain regulation even if one
tions for output voltages greater than 1.5V are propor- of the outputs is instantaneously removed. If the primary
tional to the ratio of the desired output voltage to 1.5V; input is supplying load current, removal and insertion of
(VOUT/1.5V). For example, load regulation for an output the secondary input creates no noticeable transient at the
current change of 1mA to 300mA is – 2mV typical at output. In this case, the LT1579 continues to supply
VOUT = 1.5V. At VOUT = 12V, load regulation is: current from the primary; no switching is required. How-
( ) 12V ever, when load current is being supplied from the primary
1.5V –2mV = –16mV input and it is removed, load current must be switched
from the primary to the secondary input. In this case, the
LT1579 sees the input capacitor as a rapidly discharging
Output Capacitance and Transient Response battery. If it discharges too quickly, the LT1579 does not
The LT1579 is designed to be stable with a wide range of have ample time to switch over without a large transient
output capacitors. The ESR of the output capacitor affects occurring at the output. The input capacitor must be large
stability, most notably with small capacitors. A minimum enough to supply load current during the transition from
output capacitor of 4.7µF with an ESR of 3Ω or less is primary to secondary input. Replacement of the primary
recommended to prevent oscillations. Smaller value ca- creates a smaller transient on the output because both
pacitors may be used, but capacitors which have a low inputs are present during the transition. For a 100mA load,
ESR (i.e. ceramics) may need a small series resistor added input and output capacitors of 10µF will limit peak output
to bring the ESR into the range suggested in Table 1. The deviations to less than 50mV. See the “Hot” Plugging and
LT1579 is a micropower device and output transient Unplugging Transient Response in the Typical Perfor-
response is a function of output capacitance. Larger mance Characteristics. Proportionally larger values for
values of output capacitance decrease the peak deviations input and output capacitors are needed to limit peak
and provide improved output transient response for larger deviations on the output when delivering larger load
load current changes. Bypass capacitors, used to decouple currents.
individual components powered by the LT1579, will Standby Mode
increase the effective output capacitor value. “Standby” mode is where one input draws a minimum
Table 1. Suggested ESR Range quiescent current when the other input is delivering all
OUTPUT CAPACITANCE SUGGESTED ESR RANGE bias and load currents . In this mode, the standby current
1.5µF 1Ω to 3Ω is the quiescent current drawn from the standby input. The
2.2µF 0.5Ω to 3Ω secondary input will be in standby mode, when the pri-
3.3µF 0.2Ω to 3Ω mary input is delivering all load and bias currents. When
≥ 4.7µF 0Ω to 3Ω the secondary input is in standby mode the current drawn
from the secondary input will be 3µA if VIN1 > VIN2 and 5µA
13
LT1579
U U W U
APPLICATIONS INFORMATION
if VIN2 >VIN1, so typically only 3µA. The primary input will Low-Battery Comparators
automatically go into standby mode as the primary input There are two independent low-battery comparators in the
drops below the output voltage. The primary input can also LT1579. This allows for individual monitoring of each
be forced into standby mode by asserting the SS pin. In input. The inverting inputs of both comparators are con-
either case, the current drawn from the primary input is nected to an internal 1.5V reference. The low-battery
reduced to a maximum of 7µA. comparator trip point is set by an external resistor divider
Shutdown as shown in Figure 3. The current in R1 at the trip point is
1.5V/R1. The current in R2 is equal to the current in R1.
The LT1579 has a low power shutdown state where all The low-battery comparator input bias current, 2nA flow-
functions of the device are shut off. The device is put into ing out of the pin, is negligible and may be ignored. The
shutdown mode when the shutdown pin is pulled below value of R1 should be less than 1.5M in order to minimize
0.7V. The quiescent current in shutdown has three com- errors in the trip point. The value of R2 for a given trip point
ponents: 2µA drawn from the primary, 2µA drawn from the is calculated using the formulas in Figure 3.
secondary and 3µA which is drawn from the higher of the The low-battery comparators have a small amount of
two inputs. hysteresis built-in. The amount of hysteresis is dependent
Protecting Batteries Using Secondary Select (SS) upon the output sink current (ISINK) when the comparator
Some batteries, such as lithium-ion cells, are sensitive to is tripped low. At no load, comparator hysteresis is zero,
deep discharge conditions. Discharging these batteries increasing to a maximum of 18mV for sink currents above
below a certain threshold severely shortens battery life. To 20µA. See the curve of Low-Battery Comparator Hyster-
prevent deep discharge of the primary cells, the LT1579 esis in the Typical Performance Characteristics. If larger
secondary select (SS) pin can be used to switch power amounts of hysteresis are desired, R3 and D1 can be
draw from the primary input to the secondary. When this added. D1 can be any small diode, typically a 1N4148.
pin is pulled low, current out of the primary is reduced to Calculating VLBO can be done using a load line on the curve
2µA. A low-battery detector with the trip point set at the of Logic Flag Output Voltage vs Sink Current in the Typical
critical discharge point can signal the low battery condi- Performance Characteristics.
tion and force the switchover to the secondary as shown VTRIP VOUT
in Figure 2. The second low-battery comparator can be
used to set a latch to shutdown the LT1579 (see the Typical R2
LBI + R4
Applications). LBO
R1 – ISINK
VCC 1.5V
RP R3 D1
LBO LTC1579 • F02
R2 = (VTRIP ( ) – 1.5V)R1
1.5V
SS ( ) HYSTERESIS = VHYST1 + R2
GND R1
1579 F02 FOR ADDED HYSTERESIS
R3 = (1.5V + VHYST – 0.6V – VLBO)(R2)
VHYST(ADDED)
Figure 2. Connecting SS to Low-Battery Detector FOR ISINK ≥ 20µA, VHYST = 18mV,
Output to Prevent Damage to Batteries FOR ISINK < 20µA, SEE THE TYPICAL
PERFORMANCE CHARACTERISTICS
Figure 3. Low-Battery Comparator Operation
14
LT1579
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APPLICATIONS INFORMATION
Example: The low-battery detector must be tripped at a current supplied to the load from each input. Normal
terminal voltage of 5.5V. There is a 100k pull-up resistor output deviation during transient load conditions (with
to 5V on the output of the comparator and 200mV of sufficient input voltages) will not set the status flags.
hysteresis is needed to prevent chatter. With a 1M resistor
for R1, what other resistor values are needed? Timing Diagram
Using the formulas in Figure 3, The timing diagram for the 5V dual battery supply is shown
in Figure 4. The schematic is the same as the 5V Dual
R2 = (5.5V – 1.5V)(1MΩ) = 2.67MΩ Battery Supply on the front of the data sheet. All logic flag
1.5V outputs have 100k pull-up resistors added. Note that there
Use a standard value of 2.7MΩ. With the 100k pull-up is no time scale for the timing diagram. The timing diagram
resistor, this gives a sink current and logic flag voltage of is meant as a tool to help in understanding basic operation
approximately 45µA at 0.4V. The hysteresis in this case of the LT1579. Actual discharge rates will be a function of
will be: the load current and the type of batteries used. The load
current used in the example was 100mA DC.
2.7MΩ A B C D E
Hysteresis = 18mV1+ 1MΩ = 67mV 6V
VIN1
An additional 133mV of hysteresis is needed, so a resistor 5V
and diode must be added. The value of R3 will be:
6V
R3 = (1.5V + 18mV – 0.6V – 0.4V)(2.7MΩ) = 10.5MΩ VIN2
133mV
A standard value of 10MΩ can be used. The additional 5V
current flowing through R3 into the comparator output is VOUT 5V
negligible and can usually be ignored 4.8V
100mA
Logic Flags IIN1
The low-battery comparator outputs and the status flags
of the LT1579 are open collector outputs capable of 0
100mA
sinking up to 5mA. See the curve of Logic Flag Output
Voltage vs. Current in the Typical Performance Character- IIN2
istics. 0
There are two status flags on the LT1579. The BACKUP 1
flag and the DROPOUT flag provide information on which LB01 0
input is supplying power to the load and give early warning 1
of loss of output regulation. The BACKUP flag goes low BACKUP
0
when the secondary input begins supplying power to the LB02 1
load. The DROPOUT flag signals the dropout condition on 0
both inputs, warning of an impending drop in output DROPOUT 1
voltage. The conditions that set either status flag are 0
LTC1579 • F03
determined by input to output voltage differentials and Figure 4. Basic Dual Battery Timing Diagram
15
LT1579
U U W U
APPLICATIONS INFORMATION
Five milestones are noted on the timing diagram. Time A 1. The output current from each input multiplied by the
is where the primary input voltage drops enough to trip the respective input to output voltage differential:
low-battery detector LB1. The trip threshold for LB1 is set (IOUT)(VIN – VOUT) and
at set at 5.5V, slightly above the dropout voltage of the 2. Ground pin current from the associated inputs multi-
primary input. At time B, the BACKUP flag goes low, plied by the respective input voltage: (IGND)(VIN).
signaling the beginning of the transition from the primary
source to the secondary source. Between times B and C, If the primary input is not in dropout, all significant power
the input current makes a smooth transition from VIN1 to dissipation is from the primary input. Conversely, if SS has
VIN2. By time C, the primary battery has dropped below the been asserted to minimize power draw from the primary,
point where it can deliver useful current to the output. The all significant power dissipation will be from the second-
primary input will still deliver a small amount of current to ary. When the primary input enters dropout, calculation of
the load, diminishing as the primary input voltage drops. power dissipation requires consideration of power dissi-
By time D, the secondary battery has dropped to a low pation from both inputs. Worst-case power dissipation is
enough voltage to trip the second low-battery detector, found using the worst-case input voltage from either input
LB2. The trip threshold for LB2 is also set at 5.5V, slightly and the worst-case load current.
above where the secondary input reaches dropout. At time Ground pin current is found by examining the Ground Pin
E, both inputs are low enough to cause the LT1579 to enter Current curves in the Typical Performance Characteris-
dropout, with the DROPOUT flag signaling the impending tics. Power dissipation will be equal to the sum of the two
loss of output regulation. After time E, the output voltage components above for the input supplying power to the
drops out of regulation. load. Power dissipation from the other input is negligible.
Some interesting things can be noted on the timing The LT1579 has internal thermal limiting designed to
diagram. The amount of current available from a given protect the device during overload conditions. For con-
input is determined by the input/output voltage differen- tinuous normal load conditions, the maximum junction
tial. As the differential voltage drops, the amount of temperature rating of 125°C must not be exceeded. It is
current drawn from the input also drops, which slows the important to give careful consideration to all sources of
discharge of the battery. Dropout detection circuitry will thermal resistance from junction to ambient. Additional
maintain the maximum current draw from the input for the heat sources nearby must also be considered.
given input/output voltage differential. In the case shown, Heating sinking for the device is accomplished by using
this causes the current drawn from the primary input to the heat spreading capabilities of the PC board and its
approach zero, though never actually dropping to zero. copper traces. Copper board stiffeners and plated through-
Note that the primary begins to supply significant current holes can also be used to spread the heat. All ground pins
again when the output drops out of regulation. This occurs on the LT1579 are fused to the die paddle for improved
because the input/output voltage differential of the pri- heat spreading capabilities.
mary input increases as the output voltage drops. The
LT1579 will automatically maximize the power drawn The following tables list thermal resistances for each pack-
from the inputs to maintain the highest possible output age. Measured values of thermal resistance for several
voltage. different board sizes and copper areas are listed for each
Thermal Considerations package. All measurements were taken in still air on 3/32”
FR-4 board with one ounce copper. All ground leads were
The power handling capability of the LT1579 is limited by connected to the ground plane. All packages for the
the maximum rated junction temperature (125°C). Power LT1579 have all ground leads fused to the die attach
dissipated is made up of two components: paddle to lower thermal resistance. Typical thermal
16
LT1579
U U W U
APPLICATIONS INFORMATION
resistance from the junction to a ground lead is 40°C/W for Therefore,
16-lead SSOP, 32°C/W for 16-lead SO and 35°C/W for P = (150mA)(7V – 5V) + (2mA)(7V) = 0.31W
8-lead S0. When switched to the secondary input, current from the
Table 2. 8-Lead SO Package (S8) primary input is negligible and worst-case power dissipa-
COPPER AREA THERMAL RESISTANCE tion will be:
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) (IOUT(MAX))(VIN2(MAX) – VOUT) + (IGND)(VIN2(MAX))
2500 sq mm 2500 sq mm 2500 sq mm 73°C/W
1000 sq mm 2500 sq mm 2500 sq mm 75°C/W Where:
225 sq mm 2500 sq mm 2500 sq mm 80°C/W IOUT(MAX) = 150mA
100 sq mm 2500 sq mm 2500 sq mm 90°C/W VIN2(MAX) = 10V
*Device is mounted on topside. IGND at (IOUT = 150mA, VIN2 = 10V) = 2mA
Table 3. 16-Lead SO Package (S) Therefore,
COPPER AREA THERMAL RESISTANCE P = (150mA)(10V – 5V) + (2mA)(10V) = 0.77W
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) Using a 16-lead SO package, the thermal resistance will be
2500 sq mm 2500 sq mm 2500 sq mm 55°C/W in the range of 55°C/W to 68°C/W dependent upon the
1000 sq mm 2500 sq mm 2500 sq mm 58°C/W copper area. So the junction temperature rise above
225 sq mm 2500 sq mm 2500 sq mm 60°C/W ambient will be approximately equal to:
100 sq mm 2500 sq mm 2500 sq mm 68°C/W (0.77W)(65°C/W) = 50.1°C
*Device is mounted on topside.
Table 4. 16-Lead SSOP Package (GN) The maximum junction temperature will then be equal to
COPPER AREA THERMAL RESISTANCE the maximum temperature rise above ambient plus the
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) maximum ambient temperature or:
2500 sq mm 2500 sq mm 2500 sq mm 70°C/W TJMAX = 50.1°C + 50°C = 100.1°C
1000 sq mm 2500 sq mm 2500 sq mm 75°C/W
225 sq mm 2500 sq mm 2500 sq mm 80°C/W Protection Features
100 sq mm 2500 sq mm 2500 sq mm 95°C/W The LT1579 incorporates several protection features that
*Device is mounted on topside.
make it ideal for use in battery-powered circuits. In addi-
Calculating Junction Temperature tion to the normal protection features associated with
Example: Given an output voltage of 5V, an input voltage monolithic regulators, such as current limiting and ther-
range of 5V to 7V for VIN1 and 8V to 10V for VIN2, with an mal limiting, the device is protected against reverse input
output current range of 10mA to 150mA and a maximum voltages, reverse output voltages and reverse voltages
ambient temperature of 50°C, what will the maximum from output to input.
junction temperature be? Current limit protection and thermal overload protection
When run from the primary input, current drawn from the are intended to protect the device against current overload
secondary input is negligible and worst-case power dissi- conditions at the output of the device. For normal opera-
pation will be: tion, the junction temperature should not exceed 125°C.
Current limit protection is designed to protect the device
(IOUT(MAX))(VIN1(MAX) – VOUT) + (IGND)(VIN1(MAX)) if the output is shorted to ground. With the output shorted
Where: to ground, current will be drawn from the primary input
IOUT(MAX) = 150mA until it is discharged. The current drawn from VIN2 will not
VIN1(MAX) = 7V increase until the primary input is discharged. This pre-
IGND at (IOUT = 150mA, VIN1 = 7V) = 2mA vents a short-circuit on the output from discharging both
inputs simultaneously.
17
LT1579
U U W U
APPLICATIONS INFORMATION
The inputs of the device can withstand reverse voltages up flow from one input to another will be limited to less than
to 20V. Current flow into the device will be limited to less 1mA. Output voltage will be unaffected. In the case of
than 1mA (typically less than 100µA) and no negative reverse inputs, no reverse voltages will appear at the load.
voltage will appear at the output. The device will protect Pulling the SS pin low will cause all load currents to come
both itself and the load. This provides protection against from the secondary input. If the secondary input is not
batteries which can be plugged in backwards. Internal present, the output will be turned off. If the part is put into
protection circuitry isolates the inputs to prevent current current limit with the SS pin pulled low, current limit will
flow from one input to the other. Even with one input be drawn from the secondary input until it is discharged,
supplying all bias currents and the other being plugged in at which point the current limit will drop to zero.
backwards (a maximum total differential of 40V), current
PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
16 15 14 13 12 11 10 9
0.229 – 0.244 0.150 – 0.157**
(5.817 – 6.198) (3.810 – 3.988)
1 2 3 4 5 6 7 8
0.015 ± 0.004 × 45° 0.053 – 0.068 0.004 – 0.0098
(0.38 ± 0.10) (1.351 – 1.727) (0.102 – 0.249)
0.007 – 0.0098 0° – 8° TYP
(0.178 – 0.249)
0.016 – 0.050 0.008 – 0.012 0.025
(0.406 – 1.270) (0.203 – 0.305) (0.635)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE GN16 (SSOP) 1197
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
18
LT1579
PACKAGE DESCRIPTION U Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8 7 6 5
0.228 – 0.244 0.150 – 0.157**
(5.791 – 6.197) (3.810 – 3.988)
1 2 3 4
0.010 – 0.020 × 45° 0.053 – 0.069
(0.254 – 0.508) (1.346 – 1.752)
0.008 – 0.010 0.004 – 0.010
(0.203 – 0.254) 0°– 8° TYP (0.101 – 0.254)
0.016 – 0.050 0.014 – 0.019 0.050
0.406 – 1.270 (0.355 – 0.483) (1.270)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE SO8 0996
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
16 15 14 13 12 11 10 9
0.228 – 0.244 0.150 – 0.157**
(5.791 – 6.197) (3.810 – 3.988)
1 2 3 4 5 6 7 8
0.010 – 0.020 × 45° 0.053 – 0.069
(0.254 – 0.508) (1.346 – 1.752)
0.008 – 0.010 0.004 – 0.010
(0.203 – 0.254) 0° – 8° TYP (0.101 – 0.254)
0.016 – 0.050 0.014 – 0.019 0.050
0.406 – 1.270 (0.355 – 0.483) (1.270)
TYP S16 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 19
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1579
TYPICAL APPLICATION U
Additional Logic Forces LT1579 Into Shutdown to Protect Input Batteries
IN1 OUT VOUT
IN1 C1 R2 R10 C3 5V/300mA
1µF 2.7M 1M 4.7µF
LBI1 BACKUP MAIN GOOD
R1 R3
D2 1M D1 1M
D1 TO D3: 1N4148 R4 LBO1 DROPOUT NC
10M
SS
IN2
C2 R6
IN2 1µF 2.7M LT1579-5
D3 R5 LBI2
1M R7
R8 1M
330k
D4 C5 VCC LBO2 BIASCOMP
5.1V 0.1µF C4
1N751A 1/4 1/4 0.01µF
74C02 74C02
SHDN
GND GND
1579 TA03
RESET
R9 1/4
1.5M 74C02
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Hot Swap and PowerPath are trademarks of Linear Technology Corporation.
20 Linear Technology Corporation 1579f LT/TP 0398 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417q (408) 432-1900
FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com © LINEAR TECHNOLOGY CORPORATION 1998
Mouser Electronics
Authorized Distributor
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LT1579CGN-5#PBF LT1579CS8-5#PBF LT1579CS8#TR LT1579CGN-3.3#TR LT1579CS-3#TRPBF LT1579IGN-
3.3#TR LT1579IGN-3#TRPBF LT1579IGN LT1579CGN#TR LT1579CGN-3#PBF LT1579CS LT1579IGN-3.3
LT1579CS8#TRPBF LT1579IGN-3.3#TRPBF LT1579IGN#PBF LT1579IGN-5#TR LT1579CS#PBF LT1579CS-3.3
LT1579CGN#TRPBF LT1579CGN-3#TR LT1579CGN-3.3 LT1579CS-3.3#TRPBF LT1579CS-5#TRPBF
LT1579CS8-3#TR LT1579CS8-3.3#PBF LT1579IGN-5 LT1579CGN-3 LT1579CGN-5#TR LT1579IGN-3
LT1579IGN#TR LT1579CS8-3#TRPBF LT1579CS-3#PBF LT1579CGN-5#TRPBF LT1579CGN-3#TRPBF
LT1579CS#TR LT1579CGN LT1579CGN-3.3#TRPBF LT1579CS-5 LT1579CS8-5 LT1579CS#TRPBF LT1579CGN-
3.3#PBF LT1579CS-5#TR LT1579IGN-3#TR LT1579CS8-3.3 LT1579IGN#TRPBF LT1579CS-3.3#PBF LT1579IGN-
5#TRPBF LT1579CS8-5#TRPBF LT1579IGN-3#PBF LT1579CS8#PBF LT1579CS-3#TR LT1579IGN-5#PBF
LT1579CS8-3.3#TRPBF LT1579CS8-3 LT1579CS-3.3#TR LT1579CS8 LT1579CS-3 LT1579IGN-3.3#PBF
LT1579CGN#PBF LT1579CS8-3#PBF LT1579CS8-5#TR LT1579CS-5#PBF LT1579CS8-3.3#TR LT1579CGN-5