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LP5900SD-2.5EV

器件型号:LP5900SD-2.5EV
器件类别:开发板/开发套件/开发工具   
厂商名称:Texas Instruments
厂商官网:http://www.ti.com/
标准:
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器件描述

Power Management IC Development Tools LP5900SD-2.5 EVAL BOARD

参数
产品属性属性值
Product AttributeAttribute Value
制造商:
Manufacturer:
Texas Instruments
产品种类:
Product Category:
Power Management IC Development Tools
RoHS:YES
产品:
Product:
Development Kits
系列:
Series:
LP5900
商标:
Brand:
Texas Instruments
产品类型:
Product Type:
Power Management IC Development Tools
工厂包装数量:
Factory Pack Quantity:
1
子类别:
Subcategory:
Development Tools

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LP5900SD-2.5EV器件文档内容

                                                                                                          User's Guide

                                                                                     SNVA173B – September 2006 – Revised April 2013

              AN-1494 LP5900SD 6 Pin WSON Evaluation Board

1  Introduction

   This evaluation board is designed to enable the evaluation of the LP5900 Voltage Regulator. Each board

   is assembled and tested in the factory. This evaluation board has the 6 pin WSON package mounted.

2  General Description

   The LP5900 is a linear regulator capable of suppling 150mA output current. Designed to meet the

   requirements of RF/Analog circuits, the LP5900 provides low device noise, high PSRR, low quiescent

   current, and low line transient response. Using new innovative design techniques the LP5900 offers class-

   leading noise performance without a noise bypass capacitor.

   The device has been designed to work with 0.47µF input and output ceramic capacitors down to 0603

   component size.

3  Operation

   The input voltage, applied between VIN and GND, should be at least 1.0V greater than VOUT and no more

   than 5.5V. The minimum operating voltage is 2.5V. Loads can be connected to VOUT with reference to

   GND. VOUT and VIN sense pins are provided on the board to allow accurate measurements directly onto the

   input and output pins of the device, eliminating any voltage drop on the PCB traces or connecting wires to

   the load.

   ON/OFF control is provided by a logic signal on the VEN pin. A minimum of 1.2V is required at this pin to

   enable the LDO. The LDO will be shutdown when the VEN pin is set to 0.4V or less.

   In applications were the LP5900 is operated continuously from the battery then VIN and VEN can be tied

   together. However if ON/OFF control is required the VEN pin should be driven from a separate signal to

   ensure correct operation of the fast start-up circuit. The device has a 1MΩ internal resistor from VEN to

   GND.

4  Schematic Diagram

                 VIN

                 sense                                                 LP5900                      VOUT

                                                             (6)

                 VIN                                              VIN                              sense

                                                0.47 PF                              (1)

                                                                               VOUT                VOUT

                                                CIN                                       0.47 PF

                                                                                          COUT

                                                             (4)  VEN

                 VEN

                                                                       GND

                                                                       (3)

                                                                       GND

                               Figure 1. Evaluation Board Schematic.

All trademarks are the property of their respective owners.

SNVA173B – September 2006 – Revised April 2013                                 AN-1494 LP5900SD 6 Pin WSON Evaluation Board          1

Submit Documentation Feedback

                               Copyright © 2006–2013, Texas Instruments Incorporated
PCB  Layout                                                                                                   www.ti.com

5    PCB Layout

                        Figure 2.   Evaluation Board Component and                        Pin Layout

                                    Board Size: 1.200" × 1.000"

6    Bill of Materials

             Designator                            Value      Qty                         Footprint           Note

                 U1                                LP5900     1                           NGF0006A            Texas Instruments

                 CIN                               0.47µF     1                           0603                X7R, X5R

                 COUT                              0.47µF     1                           0603                X7R, X5R

     IN, OUT, IN SENSE, OUT SENSE,                 Test Pins  6

             ON/OFF, GND

2    AN-1494 LP5900SD 6 Pin WSON Evaluation Board                   SNVA173B – September                      2006 – Revised April 2013

                                                                                                      Submit  Documentation Feedback

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