212 Series of Decoders
Features Address/Data number combination
- HT12D: 8 address bits and 4 data bits
Operating voltage: 2.4V~12V - HT12F: 12 address bits only
Low power and high noise immunity CMOS
Built-in oscillator needs only 5% resistor
technology Valid transmission indicator
Low standby current Easy interface with an RF or an infrared
Capable of decoding 12 bits of information
Pair with Holteks 212 series of encoders transmission medium
Binary address setting Minimal external components
Received codes are checked 3 times
Car alarm system
Applications Security system
Cordless telephones
Burglar alarm system Other remote control systems
Smoke and fire alarm system
Garage door controllers their local addresses. If no error or unmatched
Car door controllers codes are found, the input data codes are de-
coded and then transferred to the output pins.
General Description The VT pin also goes high to indicate a valid
transmission.
The 212 decoders are a series of CMOS LSIs for The 212 series of decoders are capable of decod-
remote control system applications. They are ing informations that consist of N bits of ad-
paired with Holteks 212 series of encoders (re- dress and 12-N bits of data. Of this series, the
fer to the encoder/decoder cross reference ta- HT12D is arranged to provide 8 address bits
ble). For proper operation, a pair of and 4 data bits, and HT12F is used to decode 12
encoder/decoder with the same number of ad- bits of address information.
dresses and data format should be chosen.
The decoders receive serial addresses and data
from a programmed 212 series of encoders that
are transmitted by a carrier using an RF or an
IR transmission medium. They compare the se-
rial input data three times continuously with
Selection Table
Function Address Data VT Oscillator Trigger Package
Part No. No. No. Type
HT12D 8 4 L RC oscillator DIN active Hi 18 DIP/20 SOP
RC oscillator DIN active Hi 18 DIP/20 SOP
HT12F 12 0
Notes: Data type: L stands for latch type data output.
VT can be used as a momentary data output.
1 July 12, 1999
212 Series of Decoders
Block Diagram D iv id e r D a ta S h ift
R e g is te r
O SC2 O SC1
O s c illa to r
L a tc h C ir c u it D a ta
D IN B u ffe r D a ta D e te c to r
S y n c . D e te c to r C o m p a ra to r C o m p a ra to r C o n tr o l L o g ic
T r a n s m is s io n G a te C ir c u it B u ffe r VT
A d d re s s VDD VSS
Note: The address/data pins are available in various combinations (see the address/data table).
Pin Assignment
8 -A d d re s s 8 -A d d re s s 1 2 -A d d re s s 1 2 -A d d re s s
4 -D a ta 4 -D a ta 0 -D a ta 0 -D a ta
NC 1 20 NC NC 1 20 NC
VDD VDD
A0 1 18 VDD A0 2 19 VT A0 1 18 VDD A0 2 19 VT
VT O SC1 VT O SC1
A1 2 17 O SC1 A1 3 18 O SC2 A1 2 17 O SC1 A1 3 18 O SC2
O SC2 D IN O SC2 D IN
A2 3 16 D IN A2 4 17 D 11 A2 3 16 D IN A2 4 17 A 11
D 11 D 10 A 11 A 10
A3 4 15 D 10 A3 5 16 D9 A3 4 15 A 10 A3 5 16 A9
D9 D8 A9 A8
A4 5 14 D8 A4 6 15 A4 5 14 A8 A4 6 15
A5 6 13 A5 7 14 A5 6 13 A5 7 14
A6 7 12 A6 8 13 A6 7 12 A6 8 13
A7 8 11 A7 9 12 A7 8 11 A7 9 12
VSS 9 10 V S S 10 11 VSS 9 10 V S S 10 11
H T12D H T12D H T12F H T12F
1 8 D IP 20 S O P 1 8 D IP 20 S O P
2 July 12, 1999
212 Series of Decoders
Pin Description
Pin Name I/O Internal Description
Connection
A0~A11 I NMOS Input pins for address A0~A11 setting
TRANSMISSION They can be externally set to VDD or VSS.
GATE
D8~D11 O CMOS OUT Output data pins
DIN I CMOS IN Serial data input pin
VT O CMOS OUT Valid transmission, active high
OSC1 I OSCILLATOR Oscillator input pin
OSC2 O OSCILLATOR Oscillator output pin
VSS I Negative power supply (GND)
VDD I Positive power supply
Approximate internal connection circuits
NM OS CM OS OUT C M O S IN O S C IL L A T O R
T R A N S M IS S IO N
G ATE
EN O SC2
O SC1
Absolute Maximum Ratings Storage Temperature.................-50C to 125C
Operating Temperature ..............-20C to 75C
Supply Voltage...............................-0.3V to 13V
Input Voltage....................VSS-0.3 to VDD+0.3V
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maxi-
mum Ratings may cause substantial damage to the device. Functional operation of this de-
vice at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
3 July 12, 1999
212 Series of Decoders
Electrical Characteristics Ta=25C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage 2.4 5 12 V
ISTB Standby Current
5V 0.1 1 mA
Oscillator stops
2 4 mA
12V
IDD Operating Current 5V No load 200 400 mA
fOSC=150kHz
Data Output Source 5V VOH=4.5V -1 -1.6 mA
Current (D8~D11)
IO 5V VOL=0.5V 1 1.6 mA
Data Output Sink
Current (D8~D11)
IVT VT Output Source Current VOH=4.5V -1 -1.6 mA
5V VOL=0.5V
VIH 1 1.6 mA
VIL VT Output Sink Current
fOSC
H Input Voltage 5V ROSC=51kW 3.5 5 V
L Input Voltage 5V 0 1 V
Oscillator Frequency 5V 150 kHz
4 July 12, 1999
212 Series of Decoders
Functional Description
Operation Flowchart
The 212 series of decoders provides various com- The oscillator is disabled in the standby state
binations of addresses and data pins in differ- and activated when a logic high signal applies
ent packages so as to pair with the 212 series of to the DIN pin. That is to say, the DIN should be
encoders. kept low if there is no signal input.
The decoders receive data that are transmitted P ow eron
by an encoder and interpret the first N bits of
code period as addresses and the last 12-N bits S ta n d b y m o d e
as data, where N is the address code number. A
signal on the DIN pin activates the oscillator No C o d e in ? D is a b le V T &
which in turn decodes the incoming address ig n o r e th e r e s t o f
and data. The decoders will then check the re-
ceived address three times continuously. If the th is w o r d
received address codes all match the contents of
the decoders local address, the 12-N bits of Y es
data are decoded to activate the output pins
and the VT pin is set high to indicate a valid A d d r e s s b its No
transmission. This will last unless the address
code is incorrect or no signal is received. m a tc h e d ?
The output of the VT pin is high only when the Y es
transmission is valid. Otherwise it is always S to re d a ta
low.
Output type M a tc h No
Of the 212 series of decoders, the HT12F has no p r e v io u s s to r e d
data output pin but its VT pin can be used as a d a ta ?
momentary data output. The HT12D, on the
other hand, provides 4 latch type data pins Y es
whose data remain unchanged until new data
are received. No 3 tim e s
o f c h e c k in g
c o m p le te d ?
Y es
Part Data Address Output Operating L a tc h d a ta
No. Pins Pins Type Voltage to o u tp u t &
a c tiv a te V T
HT12D 4 8 Latch 2.4V~12V No A d d re s s o r
HT12F 0 12 2.4V~12V d a ta e rro r ?
Y es
5 July 12, 1999
212 Series of Decoders
Decoder timing < 1 w o rd T r a n s m itte d 4 w o rd s
4 w o rd s C o n tin u o u s ly
E ncoder check 2 1 4 c lo c k s 2 1 4 c lo c k s
T r a n s m is s io n
check
E n a b le
E ncoder
DOUT
D ecoder V T
L a tc h e d
D a ta O u t
Encoder/Decoder cross reference table
Decoders Data Pins Package
Part No. Address Pins VT Pair Encoder Encoder Decoder
DIP SOP DIP SOP
HT12D 4 8 HT12A 18 20 18 20
HT12E 18 20
HT12F 0 12 HT12A 18 20 18 20
HT12E 18 20
Address/Data sequence
The following table provides address/data sequence for various models of the 212 series of decoders. A
correct device should be chosen according to the requirements of the individual addresses and data.
Part No. Address/Data Bits
0 1 2 3 4 5 6 7 8 9 10 11
HT12D A0 A1 A2 A3 A4 A5 A6 A7 D8 D9 D10 D11
HT12F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
6 July 12, 1999
212 Series of Decoders
Oscillator frequency vs supply voltage R o s c (9 )
fo s c
(S c a le )
4 .0 0
27k
3 .5 0
30k
33k
3 .0 0
36k
39k
43k
2 .5 0
47k
51k
2 .0 0 56k
62k
68k
75k
1 .5 0 82k
100k
(1 0 0 k H z )1 .0 0 120k
150k
180k
220k
0 .5 0
0 .2 5
2 3 4 5 6 7 8 9 10 11 12 1 3 V D D (V D C )
The recommended oscillator frequency is fOSCD (decoder) @ 50 fOSCE (HT12E encoder)
@ 1 fOSCE (HT12A encoder).
3
7 July 12, 1999
212 Series of Decoders
Application Circuits
R e c e iv e r C ir c u it R e c e iv e r C ir c u it
1 A0 V D D 18 VDD 1 VDD
2 A1 A0 V D D 18
3 A2 V T 17
4 A3 2 V T 17
5 A4 O S C 1 16 A1 O S C 1 16
6 A5 O S C 2 15 R O SC O S C 2 15 R O SC
7 3 A2
D IN 1 4 4 A3 D IN 1 4
A6 5 A4 A 11 13
8 D 11 13 6 A5 A 10 12
7 A6
A7 D 10 12 8 A7 A 9 11
9 9 VSS
D 9 11 A 8 10
VSS
D 8 10
H T12D H T12F
Notes: Typical infrared receiver: PIC-12043T/PIC-12043S (KODESHI CORP.)
or LTM9052 (LITEON CORP.)
Typical RF receiver: JR-200 (JUWA CORP.)
RE-99 (MING MICROSYSTEM, U.S.A.)
8 July 12, 1999
212 Series of Decoders
Holtek Semiconductor Inc. (Headquarters)
No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C.
Tel: 886-3-563-1999
Fax: 886-3-563-1189
Holtek Semiconductor Inc. (Taipei Office)
5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C.
Tel: 886-2-2782-9635
Fax: 886-2-2782-9636
Fax: 886-2-2782-7128 (International sales hotline)
Holtek Microelectronics Enterprises Ltd.
RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong
Tel: 852-2-745-8288
Fax: 852-2-742-8657
Copyright 1999 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek
assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are
used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications
will be suitable without further modification, nor recommends the use of its products for application that may pres-
ent a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior
notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
9 July 12, 1999
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