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AK7738VQ: 器件型号：AK7738VQ; 厂商名称：AKM [Asahi Kasei Microsystems]

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器件描述

Multi DSP with 5ch ADC 4ch DAC 8ch SRC

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[AK7738]

AK7738

Multi DSP with 5ch ADC + 4ch DAC + 8ch SRC

1. General Description

The AK7738 is a highly integrated digital signal processor, including a 24-bit stereo ADC with MIC gain

amplifiers, a 24-bit stereo ADC with input selector, a monaural ADC, two 32-bit stereo DACs, 4 stereo

sampling rate convertors supporting the sampling frequency up to 192kHz, two DSPs and a Sub DSP for

Audio/HF process. Each two DSPs and a Sub DSP has 2560step/fs (when fs=48kHz) parallel processing

power. The AK7738 is capable of processing sound and voice such as for hands-free function simultaneously

because two DSPs are able to work on different but synchronized sampling frequencies. As the AK7738 is a

RAM based DSP, it is freely programmable for user requirements, such as acoustic effects and proprietary

high performance hands-free function. The AK7738 is available in a 64-pin LQFP package.

2. Features

□

DSP1/DSP2: (Memory areas are shared by DSP1 and DSP2)

- Word length:

28-bit (Simple floating point supported)

- Instruction cycle:

8.1ns (2560fs at fs=48kHz)

- Multiplier:

24 x 24 → 48-bit (Double

precision arithmetic available)

- Divider:

24 / 24 → 24-bit (Floating point normalization function)

- ALU:

52-bit arithmetic operation (with 4bits overflow margin)

- Program RAM:

8192 word x 36-bit

- Coefficient RAM:

6144 word x 24-bit

- Data RAM:

6144 word x 28-bit

- Delay RAM:

20480 word x 28-bit

- JX pins (Interrupt)

- Clock Mode Selector for DSP1, DSP2

- Independent Power Management Function for DSP1, DSP2

□

Sub DSP

- Word length:

28-bit (Simple floating point supported)

- Instruction cycle:

8.1ns (2560fs at fs=48kHz)

- Multiplier:

24 x 24 → 48-bit (Double

precision arithmetic available)

- Divider:

24 / 24 → 24-bit (Floating point normalization function)

- ALU:

52-bit arithmetic operation (with 4bits overflow margin)

- Program RAM:

1024 word x 36-bit

- Coefficient RAM:

2048 word x 24-bit

- Data RAM:

4096 word x 28-bit

□

ADC1: 24-bit Stereo ADC with MIC Gain Amplifiers

- Sampling Frequency:

fs=8kHz to 192kHz

- Channel Independent Analog Gain Amplifiers

(0 to 18dB(2dB Step), 18 to 36dB(3dB step))

- Differential Input or Single-ended Input

- ADC Characteristics

S/N: 102dB (fs=48kHz, Differential Input, MIC Gain=0dB,)

- Channel Independent Digital Volume Control (+24 to -103dB, 0.5dB Step, Mute)

- Analog DRC (Dynamic Range Control)

- Digital HPF for DC Offset Cancelling

- Low Noise MIC Power Output: 2ch

- 4 types of Digital Filter for Sound Color Selection

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□

ADC2: 24-bit Stereo ADC with Input Selector

- Sampling Frequency:

fs=8kHz to 192kHz

- Analog Input Selector: Differential Input x1 or Single-ended Input x2,

Semi-Differential Input x1

- ADC Characteristics

S/N: 102dB (fs=48kHz, Differential Input)

- Channel Independent Digital Volume (+24 to -103dB, 0.5dB Step, Mute)

- Digital HPF for DC Offset Cancelling

- 4 types of Digital Filter for Sound Color Selection

□

ADCM: 24-bit Monaural ADC

- Sampling Frequency: fs=8kHz to 192kHz

- Differential Input or Single-ended Input

- ADC Characteristics

S/N: 102dB (fs=48kHz, Differential Input)

- Channel Independent Digital Volume (+24 to -103dB, 0.5dB Step, Mute)

- Digital HPF for DC Offset Cancelling

- 4 types of Digital Filter for Sound Color Selection

□

DAC: Advanced 32-bit DAC

- 2ch x2

- Sampling Frequency: fs=8kHz to 192kHz

- Single-ended Output

- DAC Characteristics

S/N: 108dB (fs=48kHz)

- Channel Independent Digital Volume Control (+12 to -115dB, 0.5dB Step, Mute)

- 4 types of Digital Filter for Sound Color Selection

□

SRC:

- 2ch x4

- FSI = 8kHz to 192kHz, FSO = 8kHz to 192kHz (FSO/FSI = 0.167 to 6.0)

□

FSCONV: Monaural Simple SRC

- 1ch x2

- FSI = 44.1kHz to 48kHz, FSO = 8kHz to 16kHz (FSO/FSI = 0.167 to 0.363)

□

DIT:

- S/PDIF, IEC60958, AES/EBU, EIAJ CP1201 Compatible

- 24-bit Stereo Output

□

Digital Interface:

- Digital Input Port: max 24ch when TDM mode

- Digital Output Port: max 28ch when TDM mode

- Independent LRCK/BICK Input port x 5 Lines

- Data Format: MSB 32,24-bit / LSB 24,20,16-bit / I

- PCM Short / Long Frame Supported

- TDM Format Supported

□

Digital Mixer Circuit

□

PLL Circuit

□

μP Interface: SPI(7MHz max), I

C-bus (1MHz, Fast Mode Plus)

□

Power Supply:

- Analog AVDD: 3.0 to 3.6V (typ. 3.3V)

- Digital LVDD: 3.0 to 3.6V (typ. 3.3V) (3.3V → 1.2V regulator integrated)

- I/F

VDD33: 3.0 to 3.6V (typ. 3.3V)

TVDD1: 1.7 to 3.6V (typ. 3.3V)

TVDD2: 1.7 to 3.6V (typ. 3.3V)

□

Operating Temperature Range: -40C to 85C

□

Package: 64-pin LQFP (10mm x 10mm, 0.5mm pitch)

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3. Table of Contents

General Description ......................................................................................................................................... 1

Features ........................................................................................................................................................... 1

Table of Contents ............................................................................................................................................ 3

Block Diagram and Functions ......................................................................................................................... 4

■

Block Diagram.......................................................................................................................................... 4

■

DSP1 Block Diagram ............................................................................................................................... 5

■

DSP2 Block Diagram ............................................................................................................................... 6

■

Sub DSP Block Diagram .......................................................................................................................... 7

Pin Configurations and Functions ................................................................................................................... 8

■

Ordering Guide ......................................................................................................................................... 8

■

Pin Layout ................................................................................................................................................ 8

■

Pin Functions ............................................................................................................................................ 9

■

Handling of Unused Pins ........................................................................................................................ 12

■

Internal Pulled-down Pin Status ............................................................................................................. 12

■

Power-down Status of Output Pins ......................................................................................................... 13

■

Relationship between Power Supplies and Digital Pins ......................................................................... 13

Absolute Maximum Ratings .......................................................................................................................... 14

Recommended Operating Conditions............................................................................................................ 14

Electrical Characteristics ............................................................................................................................... 15

■

Analog Characteristics............................................................................................................................ 15

■

Power Consumption ............................................................................................................................... 20

Digital Filter Characteristics.......................................................................................................................... 21

10. DC Characteristics ......................................................................................................................................... 31

■

DC Characteristics .................................................................................................................................. 31

11. Switching Characteristics .............................................................................................................................. 32

12. Package.......................................................................................................................................................... 40

■

Outline Dimensions ................................................................................................................................ 40

■

Material and Lead Finish ........................................................................................................................ 40

■

Marking .................................................................................................................................................. 41

13. Revision History ............................................................................................................................................ 41

IMPORTANT NOTICE ...................................................................................................................................... 42

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4. Block Diagram and Functions

■

Block Diagram

(Synchronous)

(Asynchronous)

Figure 1. Block Diagram

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DSP1 Block Diagram

Pointer

CP0, CP1

DP0, DP1

Data RAM

6144w x 28Bit max

2048w Unit

DLP0, DLP1

Delay RAM

20480w x 28Bit max

4096w Unit

OFREG

64w x 15Bit

Coefficient RAM

6144w×24Bit max

2048w Unit

CBUS(24Bit)

DBUS(28Bit)

Micon I/F

MPX24

Control

Program RAM

Multiply

24×24

→

48Bit

DEC

8192w×36Bit max

2048w Unit

Stack: 5 Level (max)

28Bit

TMP 12×28Bit

PTMP(LIFO) 6×28Bit

DBUS

SHIFT

48Bit

ALU

52Bit

Overflow Margin: 4Bit

52-Bit

DR0



52Bit

Over Flow Data

Generator

28bit x fifo16 DTMP (Connect to DSP2)

28bit x fifo8

CTMP (Connect to Sub DSP)

2 x 32Bit

2 x 32Bit x fifo12

DOUT6

DOUT5

DOUT4

DOUT3

DOUT2

DOUT1

2 x 24Bit

2 x 24Bit x fifo12

DIN6

DIN5

DIN4

DIN3

DIN2

DIN1

Serial I/F

48Bit

MUL

52Bit

Division 2424→24

Peak Detector

Figure 2. DSP1 Block Diagram (Note

Note 1. Coefficient RAM, Data RAM, Delay RAM, Program RAM areas are shared by DSP1 and DSP2 and

the sizes are configurable by control registers.

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