150 mA, Low Quiescent Current,
CMOS Linear Regulator
Data Sheet ADP121
FEATURES TYPICAL APPLICATION CIRCUITS
Input voltage range: 2.3 V to 5.5 V
Output voltage range: 1.2 V to 3.3 V VIN = 2.3V VIN VOUT VOUT = 1.8V
1 5
Output current: 150 mA CIN COUT
Low quiescent current 1µF 2 GND 1µF
IGND = 11 μA with 0 μA load ON 3 EN NC 4
IGND = 30 μA with 150 mA load OFF 06901-001
Low shutdown current: <1 μA NC = NO CONNECT
Low dropout voltage Figure 1. ADP121 TSOT with Fixed Output Voltage, 1.8 V
90 mV @ 150 mA load
High PSRR
70 dB @ 1 kHz at VOUT = 1.2 V VIN = 2.3V VOUT = 1.8V
70 dB @ 10 kHz at VOUT = 1.2 V VIN VOUT
CIN COUT
Low noise: 40 μV rms at VOUT = 1.2 V 1µF 1µF
No noise bypass capacitor required ON 06901-002
Output voltage accuracy: ±1% OFF EN GND
Stable with a small 1 μF ceramic output capacitor Figure 2. ADP121 WLCSP with Fixed Output Voltage, 1.8 V
Current limit and thermal overload protection
Logic controlled enable
5-lead TSOT package
4-ball 0.4 mm pitch WLCSP
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Post regulation
GENERAL DESCRIPTION
The ADP121 is a quiescent current, low dropout, linear regulator The ADP121 is available in output voltages ranging from 1.2 V
that operates from 2.3 V to 5.5 V and provides up to 150 mA of to 3.3 V. The parts are optimized for stable operation with small
output current. The low 135 mV dropout voltage at 150 mA 1 μF ceramic output capacitors. The ADP121 delivers good
load improves efficiency and allows operation over a wide transient performance with minimal board area.
input voltage range. The low 30 μA of quiescent current at full Short-circuit protection and thermal overload protection circuits
load makes the ADP121 ideal for battery-operated portable prevent damage in adverse conditions. The ADP121 is available
equipment. in a tiny 5-lead TSOT and 4-ball 0.4 mm pitch halide-free
WLCSP packages and utilizes the smallest footprint solution to
meet a variety of portable applications.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.
ADP121* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS REFERENCE DESIGNS
View a parametric search of comparable parts. • CN0164
• CN0185
EVALUATION KITS • CN0187
• ADP121 Evaluation Board • CN0190
• ADSP-SC584 Evaluation Hardware for the ADSP-SC58x/ • CN0280
ADSP-2158x SHARC Family (349-ball CSPBGA)
• ADSP-SC589 Evaluation Hardware for the ADSP-SC58x/ DESIGN RESOURCES
ADSP-2158x SHARC Family (529-ball CSPBGA) • ADP121 Material Declaration
DOCUMENTATION • PCN-PDN Information
Application Notes • Quality And Reliability
• AN-1072: How to Successfully Apply Low Dropout • Symbols and Footprints
Regulators
Data Sheet DISCUSSIONS
• ADP121: 150 mA, Low Quiescent Current, CMOS Linear View all ADP121 EngineerZone Discussions.
Regulator Data Sheet
User Guides SAMPLE AND BUY
• UG-052: RedyKit for the ADP121 LDO Visit the product page to see pricing options.
TOOLS AND SIMULATIONS TECHNICAL SUPPORT
• ADI Linear Regulator Design Tool and Parametric Search Submit a technical question or find your regional support
• ADIsimPower™ Voltage Regulator Design Tool number.
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ADP121 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7
Applications....................................................................................... 1 Theory of Operation ...................................................................... 11
Typical Application Circuits............................................................ 1 Applications Information .............................................................. 12
General Description ......................................................................... 1 Capacitor Selection .................................................................... 12
Revision History ............................................................................... 2 Undervoltage Lockout ............................................................... 13
Specifications..................................................................................... 3 Enable Feature ............................................................................ 13
Recommended Specifications: Input and Output Capacitors 4 Current Limit and Thermal Overload Protection ................. 14
Absolute Maximum Ratings............................................................ 5 Thermal Considerations............................................................ 14
Thermal Data ................................................................................ 5 PCB Layout Considerations...................................................... 17
Thermal Resistance ...................................................................... 5 Outline Dimensions ....................................................................... 18
ESD Caution.................................................................................. 5 Ordering Guide .......................................................................... 19
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
8/12—Rev. F to Rev. G Changes to Table 3.............................................................................5
Change to Ordering Guide.............................................................19 Changes to Figure 46 Caption and Figure 47 Caption .............. 17
7/12—Rev. E to Rev. F Changes to Ordering Guide .......................................................... 19
Updated Outline Dimensions ........................................................18 9/09—Rev. A to Rev. B
Change to Ordering Guide.............................................................19 Updated Outline Dimensions ....................................................... 18
8/11—Rev. D to Rev. E Changes to Ordering Guide .......................................................... 19
Changes to Figure 22........................................................................ 9 3/09—Rev. 0 to Rev. A
Changes to Ordering Guide .......................................................... 19 Changes to Features and General Description Sections ..............1
1/10—Rev. C to Rev. D Changes to Input and Output Capacitor Parameter.....................4
Changes to Figure 17 to Figure 20...................................................9
Changes to Ordering Guide .......................................................... 19 Changes to Figure 49...................................................................... 17
11/09—Rev. B to Rev. C Added Figure 50 ............................................................................. 17
Changes to Figure 1, Figure 2, and General Description Changes to Ordering Guide .......................................................... 19
Section................................................................................................ 1 7/08—Revision 0: Initial Version
Rev. G | Page 2 of 20
Data Sheet ADP121
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.3 V, whichever is greater; EN = VIN; IOUT = 10 mA; CIN = COUT = 1 µF; TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT VOLTAGE RANGE VIN TJ = −40°C to +125°C 2.3 5.5 V
OPERATING SUPPLY CURRENT IGND IOUT = 0 µA 11 µA
IOUT = 0 µA, TJ = −40°C to +125°C 21 µA
IOUT = 10 mA 15 µA
IOUT = 10 mA, TJ = −40°C to +125°C 29 µA
IOUT = 150 mA 30 µA
IOUT = 150 mA, TJ = −40°C to +125°C 40 µA
SHUTDOWN CURRENT IGND-SD EN = GND 0.1 µA
EN = GND, TJ = −40°C to +125°C 1.5 µA
FIXED OUTPUT VOLTAGE ACCURACY VOUT IOUT = 10 mA −1 +1 %
100 µA < IOUT < 150 mA, −2 +2 %
VIN = (VOUT + 0.5 V) to 5.5 V
100 µA < IOUT < 150 mA, −3 +3 %
VIN = (VOUT + 0.5 V) to 5.5 V
TJ = −40°C to +125°C
REGULATION
Line Regulation ∆VOUT/∆VIN VIN = (VOUT + 0.5 V) to 5.5 V, IOUT = 1 mA −0.03 +0.03 %/V
TJ = −40°C to +125°C
Load Regulation1 ∆VOUT/∆IOUT IOUT = 1 mA to 150 mA 0.001 %/mA
IOUT = 1 mA to 150 mA 0.005 %/mA
TJ = −40°C to +125°C
DROPOUT VOLTAGE2 VDROPOUT VOUT = 3.3 V
TSOT IOUT = 10 mA 8 mV
IOUT = 10 mA, TJ = −40°C to +125°C 12 mV
IOUT = 150 mA 120 mV
IOUT = 150 mA, TJ = −40°C to +125°C 180 mV
WLCSP IOUT = 10 mA 6 mV
IOUT = 10 mA, TJ = −40°C to +125°C 9 mV
IOUT = 150 mA 90 mV
IOUT = 150 mA, TJ = −40°C to +125°C 135 mV
START-UP TIME3 TSTART-UP VOUT = 3.3 V 120 µs
CURRENT-LIMIT THRESHOLD4 ILIMIT 160 225 350 mA
THERMAL SHUTDOWN
Thermal Shutdown Threshold TSSD TJ rising 150 °C
Thermal Shutdown Hysteresis TSSD-HYS 15 °C
EN INPUT
EN Input Logic High VIH 2.3 V ≤ VIN ≤ 5.5 V 1.2 V
EN Input Logic Low VIL 2.3 V ≤ VIN ≤ 5.5 V 0.4 V
EN Input Leakage Current VI-LEAKAGE EN = VIN or GND 0.05 µA
EN = VIN or GND, TJ = −40°C to +125°C 1
UNDERVOLTAGE LOCKOUT UVLO
Input Voltage Rising UVLORISE 2.25 V
Input Voltage Falling UVLOFALL 1.5 V
Hysteresis UVLOHYS 120 mV
OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V 65 µV rms
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V 52 µV rms
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V 40 µV rms
Rev. G | Page 3 of 20
ADP121 Data Sheet
Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR 10 kHz, VIN = 5 V, VOUT = 3.3 V 60 dB
10 kHz, VIN = 5 V, VOUT = 2.5 V 66 dB
10 kHz, VIN = 5 V, VOUT = 1.2 V 70 dB
1 Based on an end-point calculation using 1 mA and 100 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.3 V.
3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITORS
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT AND OUTPUT CAPACITOR1
Minimum Input and Output Capacitance CMIN TA = −40°C to +125°C 0.70 µF
Capacitor ESR RESR TA = −40°C to +125°C 0.001 1 Ω
1 The minimum input and output capacitance should be greater than 0.70 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. G | Page 4 of 20
Data Sheet ADP121
ABSOLUTE MAXIMUM RATINGS
Table 3. Junction-to-ambient thermal resistance, θJA, is based on
Parameter Rating modeling and calculation using a four-layer board. The
junction-to-ambient thermal resistance is highly dependent
VIN to GND −0.3 V to +6.5 V on the application and board layout. In applications where high
VOUT to GND −0.3 V to VIN maximum power dissipation exists, close attention to thermal
EN to GND −0.3 V to +6.5 V board design is required. The value of θJA may vary, depending
Storage Temperature Range −65°C to +150°C on PCB material, layout, and environmental conditions. The
Operating Junction Temperature Range −40°C to +125°C specified values of θJA are based on a 4-layer, 4” × 3”, circuit
Soldering Conditions JEDEC J-STD-020 board. Refer to JESD 51-7 and JESD 51-9 for detailed
information on the board construction. For additional
Stresses above those listed under Absolute Maximum Ratings information, see AN-617 Application Note, MicroCSPTM
may cause permanent damage to the device. This is a stress Wafer Level Chip Scale Package.
rating only; functional operation of the device at these or any ΨJB is the junction-to-board thermal characterization parameter
other conditions above those indicated in the operational measured in °C/W. ΨJB is based on modeling and calculation
section of this specification is not implied. Exposure to absolute using a four-layer board. The JESD51-12 Guidelines for Reporting
maximum rating conditions for extended periods may affect and Using Package Thermal Information states that thermal
device reliability. characterization parameters are not the same as thermal
THERMAL DATA resistances. ΨJB measures the component power flowing
Absolute maximum ratings apply individually only, not in through multiple thermal paths rather than a single path as in
combination. The ADP121 can be damaged when the junction thermal resistance, θJB. Therefore, ΨJB thermal paths include
temperature limits are exceeded. Monitoring the ambient convection from the top of the package as well as radiation
temperature does not guarantee that the junction temperature from the package, factors that make ΨJB more useful in real-
(TJ) is within the specified temperature limits. In applications world applications. Maximum TJ is calculated from the board
with high power dissipation and poor thermal resistance, the temperature (TB) and PD using the following formula:
maximum ambient temperature may have to be derated. TJ = TB + (PD × ΨJB)
In applications with moderate power dissipation and low PCB Refer to JESD51-8 and JESD51-12 for more detailed
thermal resistance, the maximum ambient temperature can information about ΨJB.
exceed the maximum limit as long as the junction temperature
is within specification limits. TJ of the device is dependent on THERMAL RESISTANCE
the ambient temperature (TA), the power dissipation of the θJA and ΨJB are specified for the worst-case conditions, that is, a
device (PD), and the junction-to-ambient thermal resistance of device soldered in a circuit board for surface-mount packages.
the package (θJA). TJ is calculated from TA and PD using the
following formula: Table 4. Thermal Resistance
TJ = TA + (PD × θJA) Package Type θJA ΨJB Unit
5-Lead TSOT 170 43 °C/W
4-Ball 0.4 mm Pitch WLCSP 260 58 °C/W
ESD CAUTION
Rev. G | Page 5 of 20
ADP121 Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1 2
VIN 1 5 VOUT A VIN VOUT
GND 2 TOP VIEW TOP VIEW
(Not to Scale) (Not to Scale)
EN 3 4 NC 06901-003 06901-004
B EN GND
NC = NO CONNECT
Figure 3. 5-Lead TSOT Pin Configuration Figure 4. 4-Ball WLCSP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
TSOT WLCSP Mnemonic Description
1 A1 VIN Regulator Input Supply. Bypass VIN to GND with a 1 µF or larger capacitor.
2 B2 GND Ground.
3 B1 EN Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic
startup, connect EN to VIN.
4 N/A NC No Connect. Not connected internally.
5 A2 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 µF or greater capacitor.
Rev. G | Page 6 of 20
Data Sheet ADP121
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, CIN = COUT = 1 µF, TA = 25°C, unless otherwise noted.
1.804 40
VOUT = 1.8V VOUT = 1.8V
1.802 VIN = 2.3V 35 VIN = 2.3V
1.800 30
1.798 (µA)
GROUND CURRENT 25
VOUT (V) 1.796
20
1.794
ILOAD = 10µA 15
1.792 ILOAD = 100µA ILOAD = 10µA
ILOAD = 1mA 10 ILOAD = 100µA
1.790 ILOAD = 10mA ILOAD = 1mA
ILOAD = 100mA 5 ILOAD = 10mA
1.788 ILOAD = 150mA ILOAD = 100mA
ILOAD = 150mA
1.786 06901-005 0 06901-008
–40°C –5°C 25°C 85°C 125°C –40°C –5°C 25°C 85°C 125°C
TJ (°C) TJ (°C)
Figure 5. Output Voltage vs. Junction Temperature Figure 8. Ground Current vs. Junction Temperature
1.806 35
VOUT = 1.8V VOUT = 1.8V
VIN = 2.3V 30 VIN = 2.3V
1.804 TA = 25°C TA = 25°C
(µA) 25
1.802
VOUT (V) GROUND CURRENT 20
1.800
15
1.798
10
1.796 5
1.794 06901-006 0 06901-009
0.001 0.01 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 1000
ILOAD (mA) ILOAD (mA)
Figure 6. Output Voltage vs. Load Current Figure 9. Ground Current vs. Load Current
1.806 35
VOUT = 1.8V ILOAD = 10µA VOUT = 1.8V
TA = 25°C ILOAD = 100µA 30 TA = 25°C
1.804 ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA (µA) 25
1.802 ILOAD = 100mA
VOUT (V) GROUND CURRENT 20
1.800
15
1.798 ILOAD = 10µA
10 ILOAD = 100µA
ILOAD = 1mA
1.796 5 ILOAD = 10mA
ILOAD = 100mA
0 ILOAD = 150mA
1.794 06901-007 06901-010
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
VIN (V) VIN (V)
Figure 7. Output Voltage vs. Input Voltage Figure 10. Ground Current vs. Input Voltage
Rev. G | Page 7 of 20
ADP121 Data Sheet
0.35 140
VIN = 2.30 TA = 25°C
0.30 VIN = 2.50 120
VIN = 3.00
(µA) VIN = 3.50
0.25 VIN = 4.20 100
SHUTDOWN CURRENT VIN = 5.50 VDROPOUT (mV)
0.20 80
0.15 60
VOUT = 2.5V
0.10 40
VOUT = 3.3V
0.05 20
0 06901-011 0 06901-012
–50 –25 0 25 50 75 100 125 1 10 100 1000
TEMPERATURE (°C) ILOAD (mA)
Figure 11. Shutdown Current vs. Temperature at Various Input Voltages Figure 14. Dropout Voltage vs. Load Current, WLCSP
3.35
180 VOUT = 3.3V
TA = 25°C TA = 25°C
160 3.30
140
3.25
VDROPOUT (mV) 120 VOUT (V)
100 3.20
80 VOUT @ 1mA
VOUT = 2.5V 3.15 VOUT @ 10mA
60 VOUT @ 20mA
VOUT = 3.3V VOUT @ 50mA
40 3.10 VOUT @ 100mA
20 VOUT @ 150mA
3.05 06901-013
0 06901-018 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60
1 10 100 1000 VIN (V)
ILOAD (mA)
Figure 12. Dropout Voltage vs. Load Current, TSOT Figure 15. Output Voltage vs. Input Voltage (In Dropout), WLCSP
3.35 60
VOUT = 3.3V VOUT = 3.3V
TA = 25°C TA = 25°C
3.30 50
3.25 (µA) 40
VOUT (V) 3.20 GROUND CURRENT 30
3.15 VOUT @ 1mA 20
VOUT @ 10mA
VOUT @ 20mA
3.10 VOUT @ 50mA 10 ILOAD = 1mA ILOAD = 50mA
VOUT @ 100mA ILOAD = 10mA ILOAD = 100mA
VOUT @ 150mA ILOAD = 20mA ILOAD = 150mA
3.05 06901-019 0 06901-020
3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60
VIN (V) VIN (V)
Figure 13. Output Voltage vs. Input Voltage (In Dropout), TSOT Figure 16. Ground Current vs. Input Voltage (In Dropout)
Rev. G | Page 8 of 20
Data Sheet ADP121
0 0
VRIPPLE = 50mV 3.3V/150mA 1.2V/150mA 1.8V/150mA
–10 VIN = 5V 3.3V/100µA 1.2V/100µA 1.8V/100µA
–20 VOUT = 1.2V –20
COUT = 1µF
–30 150mA
100mA –40
–40 10mA
PSRR (dB) 1mA PSRR (dB)
–50 100µA –60
0µA
–60
–70 –80
–80 –100
–90
–100 06901-014 –120 06901-017
10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 17. Power Supply Rejection Ratio vs. Frequency Figure 20. Power Supply Rejection Ratio vs. Frequency at Various Output
Voltages and Load Currents
0 10
VRIPPLE = 50mV 1.2V
–10 VIN = 5V 150mA
VOUT = 1.8V 100mA 1.8V
–20 COUT = 1µF 10mA 3.3V
1mA
–30 100µA 1
0µA NOISE (µV/√Hz)
PSRR (dB) –40
–50
–60
–70 0.1
–80
–90
–100 06901-015 0 06901-021
10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 18. Power Supply Rejection Ratio vs. Frequency Figure 21. Output Noise Spectrum, VIN = 5 V, ILOAD = 10 mA, COUT = 1 µF
0 70
VRIPPLE = 50mV 150mA
–10 VIN = 5V 60
VOUT = 3.3V 100mA
–20 COUT = 1µF 10mA
1mA 50
–30 100µA OUTNOISE (µV rms)
0µA
PSRR (dB) –40 40
–50
–60 30
–70 20 3.3V
2.5V
–80 1.8V
10 1.5V
–90 1.2V
–100 06901-016 0 06901-022
10 100 1k 10k 100k 1M 10M 0.001 0.01 0.1 1 10 100 1000
FREQUENCY (Hz) ILOAD (mA)
Figure 19. Power Supply Rejection Ratio vs. Frequency Figure 22. Output Noise vs. Load Current and Output Voltage, VIN = 5 V, COUT = 1 μF
Rev. G | Page 9 of 20
ADP121 Data Sheet
ILOAD VIN
(150mA/DIV) 1mA TO 150mA LOAD STEP,
2.5A/µs (1V/DIV) 4V TO 5V INPUT VOLTAGE STEP,
2V/µs
VOUT
(50mV/DIV) (10mV/DIV) VOUT
VIN = 5V VOUT = 1.8V,
VOUT = 1.8V 06901-024 CIN = COUT = 1µF 06901-037
(40µs/DIV) (4µs/DIV)
Figure 23. Load Transient Response, CIN = COUT = 1 μF Figure 25. Line Transient Response, Load Current = 150 mA
VOUT = 1.8V,
(150mA/DIV) 1mA TO 150mA LOAD STEP, ILOAD CIN = COUT = 1µF
2.5A/µs (1V/DIV) VIN
4V TO 5V INPUT VOLTAGE STEP,
2V/µs
(50mV/DIV) VOUT (10mV/DIV)
VOUT
VIN = 5V
VOUT = 1.8V 06901-025 06901-038
(40µs/DIV) (10µs/DIV)
Figure 24. Load Transient Response, CIN = COUT = 4.7 μF Figure 26. Line Transient Response, Load Current = 1 mA
Rev. G | Page 10 of 20
Data Sheet ADP121
THEORY OF OPERATION
The ADP121 is a low quiescent current, low dropout linear Internally, the ADP121 consists of a reference, an error amplifier,
regulator that operates from 2.3 V to 5.5 V and provides up a feedback voltage divider, and a PMOS pass transistor. Output
to 150 mA of output current. Drawing a low 30 μA quiescent current is delivered via the PMOS pass device, which is con-
current (typical) at full load makes the ADP121 ideal for battery- trolled by the error amplifier. The error amplifier compares the
operated portable equipment. Shutdown current consumption reference voltage with the feedback voltage from the output and
is typically 100 nA. amplifies the difference. If the feedback voltage is lower than
Optimized for use with small 1 µF ceramic capacitors, the reference voltage, the gate of the PMOS device is pulled
the ADP121 provides excellent transient performance. lower, allowing more current to flow and increasing the output
voltage. If the feedback voltage is higher than the reference
VIN VOUT voltage, the gate of the PMOS device is pulled higher, allowing
less current to flow and decreasing the output voltage.
R1 The ADP121 is available in output voltages ranging from 1.2 V to
GND SHORT CIRCUIT, 3.3 V. The ADP121 uses the EN pin to enable and disable the
UVLO, AND VOUT pin under normal operating conditions. When EN is
THERMAL
PROTECT high, VOUT turns on; when EN is low, VOUT turns off. For
automatic startup, EN can be tied to VIN.
EN SHUTDOWN 0.8V REFERENCE R2 06901-023
Figure 27. Internal Block Diagram
Rev. G | Page 11 of 20
ADP121 Data Sheet
APPLICATIONS INFORMATION
CAPACITOR SELECTION Input Bypass Capacitor
Output Capacitor Connecting a 1 µF capacitor from VIN to GND reduces the
The ADP121 is designed for operation with small, space-saving circuit sensitivity to the PCB layout, especially when long input
ceramic capacitors, but functions with most commonly used traces or high source impedance is encountered. If output
capacitors as long as care is taken with the effective series resistance capacitance greater than 1 µF is required, the input capacitor
(ESR) value. The ESR of the output capacitor affects stability of the should be increased to match it.
LDO control loop. A minimum of 0.70 µF capacitance with an Input and Output Capacitor Properties
ESR of 1 Ω or less is recommended to ensure stability of the Any good quality ceramic capacitor can be used with the
ADP121. The transient response to changes in the load current is ADP121, as long as it meets the minimum capacitance and
also affected by output capacitance. Using a larger value of output maximum ESR requirements. Ceramic capacitors are manufac-
capacitance improves the transient response of the ADP121 to tured with a variety of dielectrics, each with a different behavior
large changes in the load current. Figure 28 and Figure 29 show over temperature and applied voltage. Capacitors must have an
the transient responses for output capacitance values of 1 µF and adequate dielectric to ensure the minimum capacitance over
4.7 µF, respectively. the necessary temperature range and dc bias conditions. X5R
or X7R dielectrics with a voltage rating of 6.3 V or 10 V are
ILOAD recomm ended. Y5V and Z5U dielectrics are not
(150mA/DIV) 1mA TO 150mA LOAD STEP, recommended, due to their poor temperature and dc bias
2.5A/µs characteristics.
CH1 MEAN Figure 30 depicts the capacitance vs. voltage bias characteristic
115.7mA
of an 0402 1 µF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
(50mV/DIV) rating exhibits better stability. The temperature variation of the
X5R dielectric is about ±15% over the −40°C to +85°C tempera-
VOUT = 1.8V, VOUT ture range and is not a function of package or voltage rating.
CIN = COUT = 1µF 06901-039 1.2
(400ns/DIV)
1.0
Figure 28. Output Transient Response, COUT = 1 µF
(µF) 0.8
ILOAD CAPACITANCE 0.6
(150mA/DIV) 1mA TO 150mA LOAD STEP,
2.5A/µs
0.4
0.2
0 06901-036
(50mV/DIV) 0 2 4 6 8 10
VOUT VOLTAGE (V)
Figure 30. Capacitance vs. Voltage Bias Characteristic
VOUT = 1.8V,
CIN = COUT = 4.7µF 06901-040
(400ns/DIV)
Figure 29. Output Transient Response, COUT = 4.7 µF
Rev. G | Page 12 of 20
Data Sheet ADP121
Equation 1 can be used to determine the worst-case capacitance As shown in Figure 31, the EN pin has built in hysteresis. This
accounting for capacitor variation over temperature, compo- prevents on/off oscillations that may occur due to noise on the
nent tolerance, and voltage. EN pin as it passes through the threshold points.
CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL) (1) The active/inactive thresholds of the EN pin are derived from
where: the VIN voltage. Therefore, these thresholds vary with changing
CBIAS is the effective capacitance at the operating voltage. input voltage. Figure 32 shows typical EN active/inactive
TEMPCO is the worst-case capacitor temperature coefficient. thresholds when the input voltage varies from 2.3 V to 5.5 V.
TOL is the worst-case component tolerance. 1.10
In this example, TEMPCO over −40°C to +85°C is assumed to 1.05
be 15% for an X5R dielectric. TOL is assumed to be 10%, and TYPICAL EN THRESHOLDS (V) 1.00
CBIAS is 0.94 μF at 1.8 V from the graph in Figure 30. EN ACTIVE
Substituting these values in Equation 1 yields 0.95
CEFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF 0.90
Therefore, the capacitor chosen in this example meets the 0.85
minimum capacitance requirement of the LDO over EN INACTIVE
0.80
temperature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP121, it is imperative 0.75
that the effects of dc bias, temperature, and tolerances on the 0.70 06901-027
2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50
behavior of the capacitors are evaluated for each application. VIN (V)
UNDERVOLTAGE LOCKOUT Figure 32. Typical EN Pin Thresholds vs. Input Voltage
The ADP121 has an internal undervoltage lockout circuit that The ADP121 utilizes an internal soft start to limit the inrush
disables all inputs and the output when the input voltage is less current when the output is enabled. The start-up time for the
than approximately 2.2 V. This ensures that the inputs of the 1.8 V option is approximately 120 µs from the time the EN
ADP121 and the output behave in a predictable manner during active threshold is crossed to when the output reaches 90% of its
power-up. final value. The start-up time is somewhat dependant on the
ENABLE FEATURE output voltage setting and increases slightly as the output
voltage increases.
The ADP121 uses the EN pin to enable and disable the VOUT 6
pin under normal operating conditions. Figure 31 shows a EN
rising voltage on EN crossing the active threshold, and then 5
VOUT turns on. When a falling voltage on EN crosses the
inactive threshold, VOUT turns off. 4
VIN = 5V VOLTS (V) 3
VOUT = 1.8V 3.3V
CIN = COUT = 1µF VOUT 2
ILOAD = 100mA
1.8V
500mV/DIV 1 1.2V
EN
0 06901-041
0 20 40 60 80 100 120 140 160 180 200
TIME (µs)
Figure 33. Typical Start-Up Time
40ms/DIV 06901-026
Figure 31. ADP121 Typical EN Pin Operation
Rev. G | Page 13 of 20
ADP121 Data Sheet
CURRENT LIMIT AND THERMAL OVERLOAD dissipation in the power device, and thermal resistances between
PROTECTION the junction-and-ambient air (θJA). The θJA number is dependent
The ADP121 is protected against damage due to excessive on the package assembly compounds used and the amount of
power dissipation by current and thermal overload protection copper to which the GND pins of the package are soldered on the
circuits. The ADP121 is designed to current limit when the PCB. Table 6 shows typical θJA values for various PCB copper
output load reaches 225 mA (typical). When the output load sizes and Table 7 shows the typical ΨJB values for the ADP121.
exceeds 225 mA, the output voltage is reduced to maintain a Table 6. Typical θJA Values
constant current limit. Copper Size (mm2) TSOT (°C/W) WLCSP (°C/W)
Thermal overload protection is built-in, which limits the 01 170 260
junction temperature to a maximum of 150°C (typical). Under 50 152 159
extreme conditions (that is, high ambient temperature and 100 146 157
power dissipation) when the junction temperature starts to 300 134 153
rise above 150°C, the output is turned off, reducing the output 500 131 151
current to zero. When the junction temperature drops below 1 Device soldered to minimum size pin traces.
135°C, the output is turned on again and output current is
restored to its nominal value. Table 7. Typical ΨJB Values
Consider the case where a hard short from VOUT to GND occurs. TSOT (°C/W) WLCSP (°C/W)
At first, the ADP121 current limits, so that only 225 mA is con- 42.8 58.4
ducted into the short. If self-heating of the junction is great The junction temperature of the ADP121 can be calculated
enough to cause its temperature to rise above 150°C, thermal from the following equation:
shutdown activates turning off the output and reducing the
output current to zero. As the junction temperature cools and TJ = TA + (PD × θJA) (2)
drops below 135°C, the output turns on and conducts 225 mA where:
into the short, again causing the junction temperature to rise TA is the ambient temperature.
above 150°C. This thermal oscillation between 135°C and PD is the power dissipation in the die, given by
150°C causes a current oscillation between 225 mA and 0 mA PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND) (3)
that continues as long as the short remains at the output.
Current and thermal limit protections are intended to protect where:
the device against accidental overload conditions. For reliable ILOAD is the load current.
operation, device power dissipation must be externally limited IGND is the ground current.
so junction temperatures do not exceed 125°C. VIN and VOUT are input and output voltages, respectively.
THERMAL CONSIDERATIONS Power dissipation due to ground current is quite small and
In most applications, the ADP121 does not dissipate a lot of heat can be ignored. Therefore, the junction temperature equation
due to high efficiency. However, in applications with a high simplifies to
ambient temperature and high supply voltage to an output voltage TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA} (4)
differential, the heat dissipated in the package is large enough As shown in Equation 4, for a given ambient temperature,
that it can cause the junction temperature of the die to exceed input-to-output voltage differential, and continuous load
the maximum junction temperature of 125°C. current, there exists a minimum copper size requirement for
When the junction temperature exceeds 150°C, the converter the PCB to ensure that the junction temperature does not rise
enters thermal shutdown. It recovers only after the junction above 125°C. Figure 34 to Figure 47 show junction temperature
temperature has decreased below 135°C to prevent any permanent calculations for different ambient temperatures, load currents,
damage. Therefore, thermal analysis for the chosen application VIN-to-VOUT differentials, and areas of PCB copper.
is very important to guarantee reliable performance over all In cases where the board temperature is known, the thermal
conditions. The junction temperature of the die is the sum of characterization parameter, ΨJB, can be used to estimate the
the ambient temperature of the environment and the tempera- junction temperature rise. TJ is calculated from TB and PD using
ture rise of the package due to the power dissipation, as shown the formula
in Equation 2. TJ = TB + (PD × ΨJB) (5)
To guarantee reliable operation, the junction temperature of the
ADP121 must not exceed 125°C. To ensure that the junction
temperature stays below this maximum value, the user needs to
be aware of the parameters that contribute to junction temperature
changes. These parameters include ambient temperature, power
Rev. G | Page 14 of 20
Data Sheet ADP121
140 140
MAX JUNCTION TEMPERATURE MAX JUNCTION TEMPERATURE
(°C) 120 ILOAD = 1mA (°C) 120
ILOAD = 10mA
TJ 100 ILOAD = 25mA TJ 100
TEMPERATURE, ILOAD = 50mA TEMPERATURE,
ILOAD = 75mA
80 ILOAD = 100mA 80
ILOAD = 150mA
60 60
JUNCTION 40 JUNCTION 40
ILOAD = 1mA ILOAD = 75mA
20 20 ILOAD = 10mA ILOAD = 100mA
ILOAD = 25mA ILOAD = 150mA
ILOAD = 50mA
0 06901-028 0 06901-031
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V) VIN – VOUT (V)
Figure 34. TSOT, 500 mm2 of PCB Copper, TA = 25°C Figure 37. TSOT, 500 mm2 of PCB Copper, TA = 50°C
140 140
MAX JUNCTION TEMPERATURE MAX JUNCTION TEMPERATURE
(°C) 120 ILOAD = 1mA (°C) 120
ILOAD = 10mA
TJ 100 ILOAD = 25mA TJ 100
TEMPERATURE, ILOAD = 50mA TEMPERATURE,
ILOAD = 75mA
80 ILOAD = 100mA 80
ILOAD = 150mA
60 60
JUNCTION 40 JUNCTION 40
ILOAD = 1mA ILOAD = 75mA
20 20 ILOAD = 10mA ILOAD = 100mA
ILOAD = 25mA ILOAD = 150mA
ILOAD = 50mA
0 06901-029 0 06901-032
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V) VIN – VOUT (V)
Figure 35. TSOT, 100 mm2 of PCB Copper, TA = 25°C Figure 38. TSOT, 100 mm2 of PCB Copper, TA = 50°C
140 140
MAX JUNCTION TEMPERATURE MAX JUNCTION TEMPERATURE
(°C) 120 ILOAD = 1mA (°C) 120
ILOAD = 10mA
TJ 100 ILOAD = 25mA TJ 100
TEMPERATURE, ILOAD = 50mA TEMPERATURE,
ILOAD = 75mA
80 ILOAD = 100mA 80
ILOAD = 150mA
60 60
JUNCTION 40 JUNCTION 40
ILOAD = 1mA ILOAD = 75mA
20 20 ILOAD = 10mA ILOAD = 100mA
ILOAD = 25mA ILOAD = 150mA
ILOAD = 50mA
0 06901-030 0 06901-033
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V) VIN – VOUT (V)
Figure 36. TSOT, 0 mm2 of PCB Copper, TA = 25°C Figure 39. TSOT, 0 mm2 of PCB Copper, TA = 50°C
Rev. G | Page 15 of 20
ADP121 Data Sheet
140 140
MAX JUNCTION TEMPERATURE MAX JUNCTION TEMPERATURE
(°C) 120 ILOAD = 1mA (°C) 120
TJ ILOAD = 10mA TJ
100 ILOAD = 25mA 100
TEMPERATURE, ILOAD = 50mA TEMPERATURE,
ILOAD = 75mA
80 ILOAD = 100mA 80
ILOAD = 150mA
60 60
JUNCTION 40 JUNCTION 40
ILOAD = 1mA ILOAD = 75mA
20 20 ILOAD = 10mA ILOAD = 100mA
ILOAD = 25mA ILOAD = 150mA
ILOAD = 50mA
0 06901-042 0 06901-045
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V) VIN – VOUT (V)
Figure 40. WLCSP, 500 mm2 of PCB Copper, TA = 25°C Figure 43. WLCSP, 500 mm2 of PCB Copper, TA = 50°C
140 140
MAX JUNCTION TEMPERATURE MAX JUNCTION TEMPERATURE
(°C) 120 ILOAD = 1mA (°C) 120
TJ ILOAD = 10mA TJ
TEMPERATURE, 100 ILOAD = 25mA TEMPERATURE, 100
ILOAD = 50mA
ILOAD = 75mA
80 ILOAD = 100mA 80
ILOAD = 150mA
60 60
JUNCTION 40 JUNCTION 40
ILOAD = 1mA ILOAD = 75mA
20 20 ILOAD = 10mA ILOAD = 100mA
ILOAD = 25mA ILOAD = 150mA
ILOAD = 50mA
0 06901-043 0 06901-046
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V) VIN – VOUT (V)
Figure 41. WLCSP, 100 mm2 of PCB Copper, TA = 25°C Figure 44. WLCSP, 100 mm2 of PCB Copper, TA = 50°C
140 MAX JUNCTION 140
TEMPERATURE MAX JUNCTION
TEMPERATURE
(°C) 120 (°C) 120
TJ 100 TJ 100
TEMPERATURE, 80 TEMPERATURE, 80
60 60
JUNCTION 40 JUNCTION 40
ILOAD = 1mA ILOAD = 75mA
20 ILOAD = 1mA ILOAD = 50mA ILOAD = 100mA 20 ILOAD = 10mA ILOAD = 100mA
ILOAD = 10mA ILOAD = 75mA ILOAD = 150mA ILOAD = 25mA ILOAD = 150mA
ILOAD = 25mA ILOAD = 50mA
0 06901-044 0 06901-047
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V) VIN – VOUT (V)
Figure 42. WLCSP, 0 mm2 of PCB Copper, TA = 25°C Figure 45. WLCSP, 0 mm2 of PCB Copper, TA = 50°C
Rev. G | Page 16 of 20
Data Sheet ADP121
140 GND GND
MAX JUNCTION TEMPERATURE ANALOG DEVICES
120 ADP121-xx-EVALZ
JUNCTION TEMPERATURE, TJ (°C) 100
C1 C2
80 U1
60 ILOAD = 1mA
ILOAD = 10mA
ILOAD = 25mA
40 ILOAD = 50mA
ILOAD = 75mA
ILOAD = 100mA
20 ILOAD = 150mA J1
VIN VOUT
0 06901-048
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V)
Figure 46. TSOT, 100 mm2 of PCB Copper, Board Temperature = 85°C
140
MAX JUNCTION TEMPERATURE 06901-034
120 GND EN GND
(°C) Figure 48. Example of TSOT PCB Layout
TJ 100
TEMPERATURE, 80
60 ILOAD = 1mA
ILOAD = 10mA
JUNCTION ILOAD = 25mA
40 ILOAD = 50mA
ILOAD = 75mA
ILOAD = 100mA
20 ILOAD = 150mA
0 06901-049
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN – VOUT (V)
Figure 47. WLCSP, 100 mm2 of PCB Copper, Board Temperature = 85°C
PCB LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing 06901-050
the amount of copper attached to the pins of the ADP121. However,
as can be seen from Table 6 and Table 7, a point of diminishing Figure 49. Example of WLCSP PCB Layout—Top Side
returns is eventually reached, beyond which an increase in the
copper size does not yield significant heat dissipation benefits.
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use 0402 or 0603 size capacitors and
resistors to achieve the smallest possible footprint solution on
boards where area is limited.
06901-051
Figure 50. Example of WLCSP PCB Layout—Bottom Side
Rev. G | Page 17 of 20
ADP121 Data Sheet
OUTLINE DIMENSIONS
2.90 BSC
5 4
1.60 BSC 2.80 BSC
1 2 3
0.95 BSC
1.90
*0.90 MAX BSC
0.70 MIN
*1.00 MAX 0.20
0.08
8°
0.10 MAX 0.50 SEATING 4° 0.60
0.30 PLANE 0° 0.45
0.30
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH 100708-A
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 51. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions show in millimeters
0.860
0.820 SQ
0.780 2 1
BALL A1 A
IDENTIFIER
0.40 B
REF
TOP VIEW BOTTOM VIEW
(BALL SIDE DOWN) (BALL SIDE UP)
0.660 0.381
0.600 END VIEW 0.356
0.540 0.331
COPLANARITY
0.05
SEATING 0.280 0.230
PLANE 0.200 07-10-2012-A
0.260
0.240 0.170
Figure 52. 4-Ball Wafer Level Chip Scale- Package [WLCSP]
(CB-4-2)
Dimensions show in millimeters
Rev. | Page 18 of 20
Data Sheet ADP121
ORDERING GUIDE
Temperature Output Package
Model1 Range Voltage (V)2 Package Description Option3 Branding
ADP121-AUJZ12R7 −40°C to +125°C 1.2 5-Lead TSOT UJ-5 LC0
ADP121-AUJZ15R7 −40°C to +125°C 1.5 5-Lead TSOT UJ-5 LC1
ADP121-AUJZ18R7 −40°C to +125°C 1.8 5-Lead TSOT UJ-5 LC7
ADP121-AUJZ20R7 −40°C to +125°C 2.0 5-Lead TSOT UJ-5 LC9
ADP121-AUJZ25R7 −40°C to +125°C 2.5 5-Lead TSOT UJ-5 LCA
ADP121-AUJZ28R7 −40°C to +125°C 2.8 5-Lead TSOT UJ-5 LA3
ADP121-AUJZ30R7 −40°C to +125°C 3.0 5-Lead TSOT UJ-5 LA4
ADP121-AUJZ33R7 −40°C to +125°C 3.3 5-Lead TSOT UJ-5 LA5
ADP121-ACBZ12R7 −40°C to +125°C 1.2 4-Ball WLCSP CB-4-2 LC0
ADP121-ACBZ15R7 −40°C to +125°C 1.5 4-Ball WLCSP CB-4-2 LC1
ADP121-ACBZ165R7 −40°C to +125°C 1.65 4-Ball WLCSP CB-4-2 LC4
ADP121-ACBZ18R7 −40°C to +125°C 1.8 4-Ball WLCSP CB-4-2 LC7
ADP121-ACBZ188R7 −40°C to +125°C 1.875 4-Ball WLCSP CB-4-2 LC8
ADP121-ACBZ20R7 −40°C to +125°C 2.0 4-Ball WLCSP CB-4-2 LC9
ADP121-ACBZ25R7 −40°C to +125°C 2.5 4-Ball WLCSP CB-4-2 LCA
ADP121-ACBZ28R7 −40°C to +125°C 2.8 4-Ball WLCSP CB-4-2 LCD
ADP121-ACBZ30R7 −40°C to +125°C 3.0 4-Ball WLCSP CB-4-2 LCF
ADP121-ACBZ33R7 −40°C to +125°C 3.3 4-Ball WLCSP CB-4-2 LCG
ADP121CB-1.2-EVALZ 1.2 ADP121 1.2 V Output Evaluation Board
ADP121CB-1.5-EVALZ 1.5 ADP121 1.5 V Output Evaluation Board
ADP121CB-1.8-EVALZ 1.8 ADP121-1 1.8 V Output Evaluation Board
ADP121CB-2.0-EVALZ 2.0 ADP121-1 2.0 V Output Evaluation Board
ADP121CB-2.5-EVALZ 2.5 ADP121-1 2.5 V Output Evaluation Board
ADP121CB-2.8-EVALZ 2.8 ADP121-1 2.8 V Output Evaluation Board
ADP121CB-3.0-EVALZ 3.0 ADP121-1 3.0 V Output Evaluation Board
ADP121CB-3.3-EVALZ 3.3 ADP121-1 3.3 V Output Evaluation Board
ADP121UJZ-REDYKIT Evaluation Board Kit
1 Z = RoHS Compliant Part.
2 For additional voltage options, contact your local Analog Devices, Inc., sales or distribution representative.
3 The WLCSP package option is halide free.
Rev. G | Page 19 of 20
ADP121 Data Sheet
NOTES
©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06901-0-8/12(G)
Rev. G | Page 20 of 20
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Analog Devices Inc.:
ADP121CB-3.3-EVALZ ADP121-ACBZ165R7 ADP121CB-1.8-EVALZ ADP121CB-2.0-EVALZ ADP121CB-2.5-
EVALZ ADP121CB-3.0-EVALZ ADP121UJZ-REDYKIT ADP121-AUJZ12R7 ADP121CB-2.8-EVALZ ADP121-
ACBZ12R7 ADP121-AUJZ25R7 ADP121-ACBZ188R7 ADP121-AUJZ18R7 ADP121-ACBZ33R7 ADP121-
AUJZ33R7 ADP121CB-1.5-EVALZ ADP121-ACBZ25R7 ADP121-ACBZ30R7 ADP121-AUJZ30R7 ADP121-
ACBZ20R7 ADP121-ACBZ15R7 ADP121-AUJZ15R7 ADP121-AUJZ28R7 ADP121-ACBZ28R7 ADP121-ACBZ18R7
ADP121CB-1.2-EVALZ
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