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器件描述：650 MHz Prescalers
器件厂商：NSC [National Semiconductor]
厂商主页：http://www.national.com
文件大小：156.36KB
文件页数：10
PDF阅读：11C90D.pdf (点击阅读器件资料)
摘要：
TL/F/9892
11C90/11C91
650
MHz
Prescalers
Not Intended For New Designs
August 1992
11C90/11C91
650 MHz Prescalers
General Description
The 11C90 and 11C91 are high-speed prescalers designed
specifically for communication and instrumentation applica-
tions. All discussions and examples in this data sheet are
applicable to the 11C91 as well as the 11C90.
The 11C90 will divide by 10 or 11 and the 11C91 by 5 or 6,
both over a frequency range from DC to typically 650 MHz.
The division ratio is controlled by the Mode Control. The
divide-by-10 or -11 capability allows the use of pulse swal-
lowing techniques to control high-speed counting modulos
by lower-speed circuits. The 11C90 may be used with either
ECL or TTL power supplies.
In addition to the ECL outputs Q and Q, the 11C90 contains
an ECL-to-TTL converter and a TTL output. The TTL output
operates from the same V
CC
and V
EE
levels as the counter,
but a separate pin is used for the TTL circuit V
EE
. This mini-
mizes noise coupling when the TTL output switches and
also allows power consumption to be reduced by leaving
the separate V
EE
pin open if the TTL output is not used.
To facilitate capacitive coupling of the clock signal, a 400X
resistor (V
REF
) is connected internally to the V
BB
reference.
Connecting this resistor to the Clock Pulse input (CP) auto-
matically centers the input about the switching threshold.
Maximum frequency operation is achieved with a 50% duty
cycle.
Each of the Mode Control inputs is connected to an internal
2kXresistor with the other end uncommitted (RM
1
and
RM
2
). An M input can be driven from a TTL circuit operating
from the same V
CC
by connecting the free end of the asso-
ciated 2 kX resistor to V
CCA
. When an M input is driven
from the ECL circuit, the 2 kX resistor can be left open or, if
required, can be connected to V
EE
to act as a pull-down
resistor.
Logic Symbol
TL/F/9892–2
Pin Names Description
CE Count Enable Input (Active LOW)
CP Clock Pulse Input
M
n
Count Modulus Control Input
MS Asynchronous Master Set Input
Q, Q ECL Outputs
QTTL TTL Output
RM
n
2kXResistor to M
n
V
REF
400X Resistor to V
BB
Connection Diagram
16-Pin DIP
TL/F/9892–1
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
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