HT23C256
CMOS 32K8-Bit Mask ROM
Features 327688 bits of mask ROM
Mask options: chip enable CE/CE/OE1/OE1 and
Operating voltage 2.7V~5.5V
Low power consumption output enable OE/OE/NC
TTL compatible inputs and outputs
Operation: 25mA max. (VCC=5V) Tristate outputs
10mA max. (VCC=3V) Fully static operation
Package type: 28-pin DIP/SOP
Standby: 30A max. (VCC=5V)
10A max. (VCC=3V) essors, but also eliminates bus contention in
multiple bus microprocessor systems. An addi-
Access time:150ns max. (VCC=5V) tional feature of the HT23C256 is its ability to
250ns max. (VCC=3V) enter the standby mode whenever the chip en-
able (CE/CE) is inactive, thus reducing current
General Description consumption to below 30A. The combination of
these functions makes the chip suitable for high
The HT23C256 is a read-only memory with density low power memory applications.
high performance CMOS storage device whose
256K of memory is arranged into 32768 words
by 8 bits.
For application flexibility, the chip enable and
output enable control pins can be selected as
active high or active low. This flexibility not
only allows easy interface with most microproc-
Block Diagram
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HT23C256
Pin Assignment
Pin Description I/O Description
Pin Name I Address inputs
A0~A14
D0~D7 O Data outputs
CE/CE/OE1/OE1
OE/OE/NC I Chip enable/Output enable input
VSS
VCC I Output enable input
NC
I Negative power supply
I Positive power supply
-- No connection
Operation Truth Table
Mode CE/CE OE/OE A0~A14 D0~D7
Read H/L H/L Valid Data Out
Deselect H/L L/H X High Z
Standby L/H X X High Z
Note: H=VIH, L=VIL, X=VIH or VIL
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HT23C256
Absolute Maximum Ratings* Storage Temperature ................ 50C to 125C
Operating Temperature .............. 40C to 85C
Supply Voltage ................................ 0.3V to 6V
Input Voltage ....................... 0.3V to VCC+0.3V
*Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maxi-
mum Ratings" may cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Supply voltage: 2.7V~3.6V Ta=40C to 85C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VCC Conditions
VCC Operating Voltage -- -- 2.7 -- 3.6 V
ICC Operating Current 3V O/P Unload, -- -- 10 mA
f= 5MHz
VIL Input Low Voltage
VIH Input High Voltage 3V -- VSS -- 0.4 V
VOL Output Low Voltage
VOH Output High Voltage 3V -- 2.0 -- VCC V
ILI Input Leakage Current
ILO Output Leakage Current 3V IOL= 2.1mA -- -- 0.4 V
ISTB1 Standby Current 3V IOH= 0.4mA 2.4 -- VCC V
3V VIN= 0 to VCC -- -- 10 A
3V VOUT= 0 to VCC -- -- 10 A
3V CE=VIL -- -- 500 A
CE=VIH
ISTB2 Standby Current 3V CE0.2V -- -- 10 A
Input Capacitance (See note) CEVCC-0.2V
CIN Output Capacitance (See note)
COUT -- f= 1MHz -- -- 10 pF
-- -- 10 pF
-- f= 1MHz
Note: These parameters are periodically sampled but not 100% tested.
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HT23C256
Supply voltage: 4.5V~5.5V Ta=40C to 85C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
4.5 -- 5.5 V
VCC Conditions -- -- 25 mA
VCC Operating Voltage -- --
ICC Operating Current 5V O/P Unload,
f=5MHz
VIL Input Low Voltage 5V -- VSS -- 0.8 V
VIH Input High Voltage
VOL Output Low Voltage 5V -- 2.2 -- VCC V
VOH Output High Voltage
ILI Input Leakage Current 5V IOL=3.2mA -- -- 0.4 V
ILO Output Leakage Current
5V IOH=1mA 2.4 -- VCC V
ISTB1 Standby Current
5V VIN=0 to VCC -- -- 10 A
ISTB2 Standby Current
5V VOUT=0 to VCC -- -- 10 A
CIN Input Capacitance (See note)
COUT Output Capacitance (See note) 5V CE=VIL -- -- 1.5 mA
CE=VIH
5V CE 0.2V -- -- 30 A
CE VCC0.2V
-- f=1MHz -- -- 10 pF
-- -- 10 pF
-- f=1MHz
Note: These parameters are periodically sampled but not 100% tested.
A.C. Characteristics Ta=40C to 85C
Symbol Parameter VCC=2.7V~3.6V VCC=4.5V~5.5V
Unit
Min. Max. Min. Max.
tCYC Cycle Time 250 -- 150 -- ns
tAA
tACE Address Access Time -- 250 -- 150 ns
tAOE
tOH Chip Enable Access Time -- 250 -- 150 ns
tOD
tOE Output Enable Access Time -- 150 -- 80 ns
Output Hold Time -- -- 10 -- ns
Output Disable Time (See Note) -- -- -- 70 ns
Output Enable Time (See Note) -- -- 10 -- ns
Note: These parameters are periodically sampled but not 100% tested.
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HT23C256
A.C. test conditions
Output load: see figure right
Input rise and fall time: 10ns
Input pulse levels: 0.4V to 2.4V
Input and output timing reference levels:
0.8V and 2.0V (VCC=5V), 1.5V (VCC=3V)
Output load circuit
Functional Description Data read mode
The HT23C256 has two modes, namely data When both the chip enable (CE/CE/OE/OE1)
read mode and standby mode, controlled by and the output enable (OE/OE/NC) are active,
CE/CE/OE1/OE1 and OE/OE/NC inputs. the chip is in data read mode. Otherwise,
active CE/CE and inactive OE/OE/NC result
Standby mode in deselect mode. The output will remain in
The HT23C256 has lower current consumption, Hi-Z state.
controlled by the chip enable input (CE/CE).
When a low/high level is applied to the CE/CE
input regardless of the output enable
(OE/OE/NC) states the chip will enter the
standby mode.
Timing Diagrams
Propagation delay due to address (CE/CE/OE1/OE1 and OE/OE are active)
Propagation delay due to chip enable and output enable (address valid)
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HT23C256
Characteristic Curves
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HT23C256
7 24th Aug '98
HT23C256
HT23C256 MASK ROM ORDERING SHEET
Custom:
Input Medium:
EPROM DISK File (Mail Address: romfile@holtek.com.tw) OTHER
User No. Type/Ref. Name Q'ty Check Sum Memory Address
Start End
Control Pin and Package Form Option:
(a) 28 Pin Type Pin 20: (1) CE (2) CE (3) OE1 (4) OE1
Pin 22: (1) OE (2) OE (3) NC
(b) Package Form: (1) Chip Form (2) 28 DIP (3) 28 SOP
Companion User No.
Package Marking :
Delivery Date : Q'ty:
CUSTOM CONFIRMED BY:
(NAME, DATE, POSITION & CO. CHOP)
HOLTEK CONFIRMED BY:
(SALES) (SALES MANAGER)
8 24th Aug '98
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