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55852U
EEWorld咨询电话：82357002，82350740－8068 邮件咨询：datasheet@eeworld.com.cn 器件描述：D FLIP-FLOP 器件厂商：MICREL [Micrel Semiconductor] 厂商主页：http://www.micrel.com/ 文件大小：54.53KB 文件页数：7 PDF阅读：55852U.pdf (点击阅读器件资料) 摘要： 1 SuperLite? SY55852UMicrel, Inc. M9999-110705 hbwhelp@micrel.com or (408) 955-1690 DESCRIPTION a73 2.5GHz min. f MAX a73 2.3V to 5.7V power supply a73 Single bit register memory a73 Synchronizes 1 bit of data to a clock a73 Optimized to work with SuperLite? family a73 Fully differential a73 Accepts CML, PECL, LVPECL input logic levels a73 Source terminated CML outputs for fast edge rates a73 Available in a tiny 10-pin MSOP The SY55852U is a flip-flop used to synchronize data to a clock. Its differential output will reproduce and remember the value on its input at the rising edge of the clock. In addition, an asynchronous, level sensitive reset is provided. For a synchonous reset, the SY55851U AnyGate? can be used. SY55852U inputs can be terminated with a single resistor between the true and complement pins of a given input. The SY55852U is a member of Micrel's SuperLite? family of high-speed CML logic. This family features very small packaging and 2.3V to 5.7V operation. FEATURES D FLIP-FLOP SuperLite? SY55852U APPLICATIONS a73 High-speed logic a73 OC-48 communication systems FUNCTIONAL BLOCK DIAGRAM Rev.: D Amendment: /0 Issue Date: November 2005 SuperLite is a trademark of Micrel, Inc. DQ R CLOCK RESET DATA OUT SuperLite? 相关器件：SY55852UKGTR SY55852UKITR SY55852UKG SY55852UKCTR SY55852UKI SY55852UKC SY55852U

55852U

EEWorld咨询电话：82357002，82350740－8068 邮件咨询：datasheet@eeworld.com.cn

器件描述：D FLIP-FLOP
器件厂商：MICREL [Micrel Semiconductor]
厂商主页：http://www.micrel.com/
文件大小：54.53KB
文件页数：7
PDF阅读：55852U.pdf (点击阅读器件资料)

摘要：
1
SuperLite?
SY55852UMicrel, Inc.
M9999-110705
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
a73 2.5GHz min. f
MAX
a73 2.3V to 5.7V power supply
a73 Single bit register memory
a73 Synchronizes 1 bit of data to a clock
a73 Optimized to work with SuperLite? family
a73 Fully differential
a73 Accepts CML, PECL, LVPECL input logic levels
a73 Source terminated CML outputs for fast edge rates
a73 Available in a tiny 10-pin MSOP
The SY55852U is a flip-flop used to synchronize data
to a clock. Its differential output will reproduce and
remember the value on its input at the rising edge of the
clock. In addition, an asynchronous, level sensitive reset
is provided. For a synchonous reset, the SY55851U
AnyGate? can be used.
SY55852U inputs can be terminated with a single
resistor between the true and complement pins of a given
input.
The SY55852U is a member of Micrel's SuperLite?
family of high-speed CML logic. This family features very
small packaging and 2.3V to 5.7V operation.
FEATURES
D FLIP-FLOP
SuperLite?
SY55852U
APPLICATIONS
a73 High-speed logic
a73 OC-48 communication systems
FUNCTIONAL BLOCK DIAGRAM
Rev.: D Amendment: /0
Issue Date: November 2005
SuperLite is a trademark of Micrel, Inc.
DQ
R
CLOCK
RESET
DATA OUT
SuperLite?

相关器件：SY55852UKGTR SY55852UKITR SY55852UKG SY55852UKCTR SY55852UKI SY55852UKC SY55852U

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