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器件描述：3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
器件厂商：TI [Texas Instruments]
厂商主页：http://www.ti.com/
文件大小：94.67KB
文件页数：7
PDF阅读：54LVTH245.pdf (点击阅读器件资料)
摘要：
SN54LVTH245A, SN74LVTH245A
3.3-V ABT OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS130P – MAY 1992 – REVISED APRIL 1999
1POST OFFICE BOX 655303 ? DALLAS, TEXAS 75265
C0068 State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
C0068 Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
C0068 Support Unregulated Battery Operation
Down to 2.7 V
C0068 Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25°C
C0068 I
off
and Power-Up 3-State Support Hot
Insertion
C0068 Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
C0068 Latch-Up Performance Exceeds 500 mA Per
JESD 17
C0068 ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
C0068 Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Packages, and Ceramic
(J) DIPs
description
These octal bus transceivers are designed specifically for low-voltage (3.3-V) V
CC
operation, but with the
capability to provide a TTL interface to a 5-V system environment.
These devices are designed for asynchronous communication between data buses. They transmit data from
the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE) input can be used to disable the devices so the buses are effectively isolated.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54LVTH245A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVTH245A is characterized for operation from –40°C to 85°C.
Copyright ? 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54LVTH245A ...J OR W PACKAGE
SN74LVTH245A . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
3212019
910 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A2 A1 DIR
B7 B6
OE
A8
GND
B8
V
CC
SN54LVTH245A . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
相关器件：SN54LVTH245A SN54LVTH245AJ SN54LVTH245AFK SN54LVTH245AW SN74LVTH245ADB SN74LVTH245A SN74LVTH245ADW SN74LVTH245APW SN74LVTH245
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