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MX35LF1GE4AB-Z4I

器件型号:MX35LF1GE4AB-Z4I
器件类别:存储    FLASH存储器   
厂商:MXIC(旺宏电子)
旺宏电子为全球非挥发性内存整合组件领导厂商,提供跨越广泛规格及容量的ROM只读存储器、NOR型闪存以及NAND型闪存解决方案。旺宏电子以世界级的研发与制造能力,提供最高质量、创新及具备高性能表现的产品,以供客户应用于消费、通讯、计算机、汽车电子、网通及其他等领域
厂商官网:http://www.macronix.com/
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器件描述

存储器类型:Non-Volatile 存储器构架(格式):FLASH 时钟频率:104MHz 技术:NAND Flash 存储器接口类型:Serial 存储器容量:1Gb

参数
产品属性属性值
属性:参数值
商品目录:FLASH存储器
存储器类型:Non-Volatile
存储器构架(格式):FLASH
时钟频率:104MHz
技术:NAND Flash
写周期时间(页):300us
存储器接口类型:Serial
存储器容量:1Gb
写周期时间(字节):-
工作电压:2.7V ~ 3.6V
工作温度:-40℃~+85℃

MX35LF1GE4AB-Z4I产品介绍

MX35LF1GE4AB
MX35LF2GE4AB
3V, 1Gb/2G-bit Serial NAND Flash Memory
MX35LFxGE4AB
P/N: PM2128
1
REV. 1.7, April 23, 2019
MX35LF1GE4AB
MX35LF2GE4AB
Contents
1. FEATURES .........................................................................................................................................5
2. GENERAL DESCRIPTIONS ...............................................................................................................6
Figure 1. Logic Diagram ........................................................................................................................ 6
3. ORDERING INFORMATION ...............................................................................................................7
4. BALL ASSIGNMENT AND DESCRIPTIONS .....................................................................................8
Figure 2. 16-SOP (300mil) .................................................................................................................... 8
5. PIN DESCRIPTIONS...........................................................................................................................8
Figure 3. 8-WSON (8x6mm) (1Gb only)............................................................................................... 8
6. DEVICE OPERATION .........................................................................................................................9
Figure 4. Serial Mode Supported .......................................................................................................... 9
7. ADDRESS MAPPING .......................................................................................................................10
8. COMMAND DESCRIPTION ..............................................................................................................11
Table 1. Command Set.........................................................................................................................11
8-1.
WRITE Operations ...............................................................................................................12
8-1-1. Write Enable ............................................................................................................................ 12
Figure 5. Write Enable (WREN) Sequence ........................................................................................ 12
8-1-2. Write Disable (04h) .................................................................................................................. 12
Figure 6. Write Disable (WRDI) Sequence ....................................................................................... 12
8-2.
Feature Operations ..............................................................................................................13
8-2-1. GET Feature (0Fh) and SET Feature (1Fh) ............................................................................ 13
Table 2-1. Feature Settings (For 2Gb) ................................................................................................ 13
Table 2-2. Feature Settings (For 1Gb) ................................................................................................ 13
Figure 7. GET FEATURE (0Fh) Timing ............................................................................................... 14
Figure 8. SET FEATURE (1Fh) Timing ............................................................................................... 14
8-3.
READ Operations.................................................................................................................15
8-3-1. PAGE READ (13h) .................................................................................................................... 15
Table 3. Wrap Address bit Table (Only for 1Gb) .................................................................................. 15
8-3-2. QE bit ........................................................................................................................................ 15
Figure 9. PAGE READ (13h) Timing x1 .............................................................................................. 16
Figure 10. RANDOM DATA READ (03h or 0Bh) Timing...................................................................... 17
Figure 11. READ FROM CACHE x 2 .................................................................................................. 18
Figure 12. READ FROM CACHE x 4 .................................................................................................. 19
P/N: PM2128
2
REV. 1.7, April 23, 2019
MX35LF1GE4AB
MX35LF2GE4AB
8-3-3. Page Read Cache Sequential (31h) / Page Read Cache End (3Fh) - For 1G Only ...................... 20
Figure 13. Page Read Cache Sequential (31h) .................................................................................. 20
Figure 14. Page Read Cache End (3Fh)............................................................................................. 21
8-3-4. READ ID (9Fh) .......................................................................................................................... 22
Table 4. READ ID Table ...................................................................................................................... 22
Figure 15. READ ID (9Fh) Timing ....................................................................................................... 22
8-4.
8-5.
8-6.
Parameter Page....................................................................................................................23
Table 5. Parameter Page Data Structure ............................................................................................ 24
UniqueID Page .....................................................................................................................25
Internal ECC Status Read (For 1Gb only) ..........................................................................26
Table 6-1. The ECCSR (Internal ECC Status Register) Bits ............................................................... 26
Table 6-2. The Definition of Internal ECC Status
................................................................................ 26
Figure 16. The Page Structure and Internal ECC Segments .............................................................. 26
Figure 17. The Sequence of Internal ECC Status Read ..................................................................... 27
8-7.
Program Operations ............................................................................................................28
8-7-1. PAGE PROGRAM ..................................................................................................................... 28
Figure 18. PROGRAM LOAD (02h) Timing......................................................................................... 28
Figure 19. PROGRAM LOAD RANDOM DATA (84h) Timing .............................................................. 29
8-7-2. QUAD IO PAGE PROGRAM ..................................................................................................... 30
Figure 20. PROGRAM LOAD X4 (32h) Timing ................................................................................... 30
Figure 21. QUAD IO PROGRAM RANDOM INPUT (34h) Timing ...................................................... 31
Figure 22. PROGRAM EXECUTE (10h) Timing ................................................................................. 32
9. BLOCK OPERATIONS .....................................................................................................................33
9-1.
Block Erase (D8h) ................................................................................................................33
Figure 23. Block Erase (BE) Sequence ............................................................................................. 33
10. Feature Register ............................................................................................................................34
10-1. Block Protection Feature ....................................................................................................34
Table 7-1. Definition of Protection Bits (BPx) (For 2Gb)
...................................................................... 35
Table 7-2. Definition of Protection Bits (For 1Gb)
................................................................................ 35
10-2. Secure OTP (One-Time-Programmable) Feature ..............................................................36
Table 8. Secure OTP States ................................................................................................................ 36
10-3. Status Register ....................................................................................................................37
Table 9. Status Register Bit Descriptions ............................................................................................ 37
P/N: PM2128
3
REV. 1.7, April 23, 2019
MX35LF1GE4AB
MX35LF2GE4AB
11. SOFTWARE ALGORITHM ..............................................................................................................38
11-1. Invalid Blocks (Bad Blocks) ...............................................................................................38
Figure 24. Bad Blocks ......................................................................................................................... 38
Table 10. Valid Blocks ......................................................................................................................... 38
11-2. Bad Block Test Flow ............................................................................................................39
Figure 25. Bad Block Test Flow ........................................................................................................... 39
11-3. Failure Phenomena for Read/Program/Erase Operations ...............................................39
Table 11. Failure Modes ...................................................................................................................... 39
11-3-1. Internal ECC Enabled/Disabled ........................................................................................... 40
Table 12. The Distribution of ECC Segment and Spare Area ............................................................. 40
12. DEVICE POWER-UP ......................................................................................................................41
12-1. Power-up ..............................................................................................................................41
Figure 26. Power On Sequence ......................................................................................................... 41
13. PARAMETERS................................................................................................................................42
13-1. ABSOLUTE MAXIMUM RATINGS........................................................................................42
Figure 27. Maximum Negative Overshoot Waveform ......................................................................... 42
Table 13. AC Testing Conditions ......................................................................................................... 42
Table 14. Capacitance......................................................................................................................... 42
Table 15. Operating Range ................................................................................................................. 42
Figure 28. Maximum Positive Overshoot Waveform ........................................................................... 42
Table 16. DC Characteristics .............................................................................................................. 43
Table 17. General Timing Characteristics ........................................................................................... 43
Table 18. PROGRAM/READ/ERASE Characteristics ......................................................................... 43
Figure 29. WP# Setup Timing and Hold Timing during SET FEATURE when BPRWD=1 .................. 44
Figure 30. Serial Input Timing ............................................................................................................. 44
Figure 31. Serial Output Timing .......................................................................................................... 44
Figure 32. Hold Timing ........................................................................................................................ 45
14-1. 8-WSON (8x6mm), E.P. 3.4x4.3mm, Recommended for new design ...............................46
14. PACKAGE INFORMATION .............................................................................................................46
14-2. 16-SOP (300mil) ...................................................................................................................47
15. REVISION HISTORY ......................................................................................................................48
P/N: PM2128
4
REV. 1.7, April 23, 2019
MX35LF1GE4AB
MX35LF2GE4AB
3V, 1Gb/2Gb Serial NAND Flash Memory
1. FEATURES
1Gb/2Gb SLC NAND Flash
- Bus: x4
- Page size: (2048+64) byte
- Block size: (128K+4K) byte
• Fast Read Access
- Supports Random data read out by x1 x2 &
x4 modes, (1-1-1,1-1-2, 1-1-4)
Note 2
- Latency of array to register: 25us
Note1
- Frequency: 104MHz
• Page Program Operation
- Page program time: 300us (typ)
Note1
• Block Erase Operation
-
Block erase time: 1ms (typ.)
Single Voltage Operation:
- VCC: 2.7 to 3.6V
• BP bits for block group protection
• Low Power Dissipation
- Max 30mA
Active current (Read/Program/Erase)
• Sleep Mode
- 50uA (Max) standby current
• High Reliability
-
Program / Erase Endurance: Typical 100K cycles
(with internal 4-bit ECC per (512+16) Byte
- Data Retention: 10 years
• Wide Temperature Operating Range
-40°C to +85°C
Package:
1) 8-WSON (8x6mm) for 1Gb
2)16-SOP (300mil) for 2Gb
All packaged devices are RoHS Compliant and
Halogen-free.
Note 1.
Please refer to the tRD_ECC and
tPROG_ECC specifications if internal ECC
function is turned on.
Note 2.
Which indicates the number of I/O for
command, address and data.
P/N: PM2128
5
REV. 1.7, April 23, 2019
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